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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28

Advanced Compact Holographic Data Storage System

JPL, under current sponsorship from NASA Space Science and Earth Science Programs, is developing a high-density, nonvolatile and rad-hard Advanced Holographic Memory (AHM) system to enable large-capacity, high-speed, low power consumption, and read/write of data in a space environment. The entire read/write operation will be controlled with electro-optic mechanism without any moving parts. This CHDS will consist of laser diodes, photorefractive crystal, spatial light modulator, photodetector array, and I/O electronic interface. In operation, pages of information would be recorded and retrieved with random access and highspeed. The nonvolatile, rad-hard characteristics of the holographic memory will provide a revolutionary memory technology to enhance mission capabilities for all NASA's Earth Science Mission. In this paper, recent technology progress in developing this CHDS at JPL will be presented.

Chao, Tien-Hsin↗

Antibody responses to bacteriophage phi X-174 in human subjects exposed to the antarctic winter-over model of spaceflight

BACKGROUND: It has been proposed that exposure to long-term spaceflight conditions (stress, isolation, sleep disruption, containment, microbial contamination, and solar radiation) or to ground-based models of spaceflight will alter human immune responses, but specific antibody responses have not been fully evaluated. OBJECTIVE: We sought to determine whether exposure to the 8-month Antarctic winter-over model of spaceflight would alter human antibody responses. METHODS: During the 1999 Australian National Antarctic Research Expeditions, 11 adult study subjects at Casey, Antarctica, and 7 control subjects at Macquarie Island, sub-Antarctica, received primary and secondary immunizations with the T cell-dependent neoantigen bacteriophage phi X-174. Periodic plasma samples were analyzed for specific antibody function. RESULTS: All of the subjects from Casey, Antarctica, cleared bacteriophage phi X-174 normally by 1 week after primary immunization, and all had normal primary and secondary antibody responses, including immunologic memory amplification and switch from IgM to IgG antibody production. One subject showed a high normal pattern, and one subject had a low normal pattern. The control subjects from Macquarie Island also had normal immune responses to bacteriophage phi X-174. CONCLUSIONS: These data do not support the hypothesis that de novo specific antibody responses of subjects become defective during the conditions of the Antarctic winter-over. Because the Antarctic winter-over model of spaceflight lacks the important factors of microgravity and solar radiation, caution must be used in interpreting these data to anticipate normal antibody responses in long-term spaceflight.

Non-NASA Center↗

Interaction between Convection and Heat Transfer in Crystal Growth

Crystals are integral components in some of our most sophisticated and rapidly developing industries. Single crystals are solids with the most uniform structures that can be obtained on an atomic scale. Because of their structural uniformity, crystals can transmit acoustic and electromagnetic waves and charged particles with essentially no scattering or interferences. This transparency, which can be selectively modified by controlled additions of impurities known as dopants, is the foundation of modern electronic industry. It has brought about widespread application of crystals in transistors, lasers, microwave devices, infrared detectors, magnetic memory devices, and many other magnets and electro-optic components. The performance of a crystal depends strongly on its compositional homogeneity. For instance, in modern microcircuitry, compositional variations of a few percent (down to a submicron length scale) can seriously jeopardize predicted yields. Since crystals are grown by carefully controlled phase transformations, the compositional adjustment in the solid is often made during growth from the nutrient. Hence, a detailed understanding of mass transfer in the nutrient is essential. Moreover, since mass transfer is often the slowest process during growth, it is usually the rate limiting mechanism. Crystal growth processes are usually classified according to the nature of the parent phase. Nevertheless, whether the growth occurs by solidification from a melt (melt growth), nucleation from a solution (solution growth), condensation from a vapor (physical vapor transport) or chemical reaction of gases (chemical vapor deposition), the parent phase is a fluid. As is with most non-equilibrium processes involving fluids, liquid or vapor, fluid motion plays an important role, affecting both the concentration and temperature gradients at the soli-liquid interface.

Source record↗

S-Band POSIX Device Drivers for RTEMS

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

Lux, James P.↗

Balloon platform for extended-life astronomy research

A configuration has been developed for a long-life balloon platform to carry pointing telescopes weighing as much as 80 pounds (36 kg) to point at selected celestial targets. A platform of this configuration weighs about 375 pounds (170 kg) gross and can be suspended from a high altitude super pressure balloon for a lifetime of several months. The balloon platform contains a solar array and storage batteries for electrical power, up and down link communications equipment, and navigational and attitude control systems for orienting the scientific instrument. A biaxial controller maintains the telescope attitude in response to look-angle data stored in an on-board computer memory which is updated periodically by ground command. Gimbal angles are computed by using location data derived by an on-board navigational receiver.

Ostwald, L. T.↗

Astronaut activity in weightlessness and unsupported space

For the purpose of study of the performance ability of a human operator in prolonged weightless conditions was studied by the following methods: (1) psychophysiological analysis of certain operations; (2) the dynamic characteristics of a man, included in a model control system, with direct and delayed feedback; (3) evaluation of the singularities of analysis and quality of the working memory, in working with outlines of patterned and random lines; and (4) biomechanical analysis of spatial orientation and motor activity in unsupported space.

Ivanov, Y. A.↗

Forbidden Zones for Numerically-Controlled Machine Tools

Computer-controlled machine tool prevented from striking and damaging protruding members on workpiece by creating forbidden zone in control program. With aid of computer graphics, tool profile and coordinates of forbidden zone digitized and stored in computer memory as part of tool path.

Philpot, D.↗

Interfacing a high performance disk array file server to a Gigabit LAN

Our previous prototype, RAID-1, identified several bottlenecks in typical file server architectures. The most important bottleneck was the lack of a high-bandwidth path between disk, memory, and the network. Workstation servers, such as the Sun-4/280, have very slow access to peripherals on busses far from the CPU. For the RAID-2 system, we addressed this problem by designing a crossbar interconnect, Xbus board, that provides a 40MB/s path between disk, memory, and the network interfaces. However, this interconnect does not provide the system CPU with low latency access to control the various interfaces. To provide a high data rate to clients on the network, we were forced to carefully and efficiently design the network software. A block diagram of the system hardware architecture is given. In the following subsections, we describe pieces of the RAID-2 file server hardware that had a significant impact on the design of the network interface.

Seshan, Srinivasan↗

Experiments with a small behaviour controlled planetary rover

A series of experiments that were performed on the Rocky 3 robot is described. Rocky 3 is a small autonomous rover capable of navigating through rough outdoor terrain to a predesignated area, searching that area for soft soil, acquiring a soil sample, and depositing the sample in a container at its home base. The robot is programmed according to a reactive behavior control paradigm using the ALFA programming language. This style of programming produces robust autonomous performance while requiring significantly less computational resources than more traditional mobile robot control systems. The code for Rocky 3 runs on an eight bit processor and uses about ten k of memory.

Miller, David P.↗

Processing Device for High-Speed Execution of an Xrisc Computer Program

A processing device for high-speed execution of a computer program is provided. A memory module may store one or more computer programs. A sequencer may select one of the computer programs and controls execution of the selected program. A register module may store intermediate values associated with a current calculation set, a set of output values associated with a previous calculation set, and a set of input values associated with a subsequent calculation set. An external interface may receive the set of input values from a computing device and provides the set of output values to the computing device. A computation interface may provide a set of operands for computation during processing of the current calculation set. The set of input values are loaded into the register and the set of output values are unloaded from the register in parallel with processing of the current calculation set.

Ng, Tak-Kwong↗

An Adaptable Power System with Software Control Algorithm

A low cost, flexible and modular spacecraft power system design was developed in response to a call for an architecture that could accommodate multiple missions in the small to medium load range. Three upcoming satellites will use this design, with one launch date in 1999 and two in the year 2000. The design consists of modular hardware that can be scaled up or down, without additional cost, to suit missions in the 200 to 600 Watt orbital average load range. The design will be applied to satellite orbits that are circular, polar elliptical and a libration point orbit. Mission unique adaptations are accomplished in software and firmware. In designing this advanced, adaptable power system, the major goals were reduction in weight volume and cost. This power system design represents reductions in weight of 78 percent, volume of 86 percent and cost of 65 percent from previous comparable systems. The efforts to miniaturize the electronics without sacrificing performance has created streamlined power electronics with control functions residing in the system microprocessor. The power system design can handle any battery size up to 50 Amp-hour and any battery technology. The three current implementations will use both nickel cadmium and nickel hydrogen batteries ranging in size from 21 to 50 Amp-hours. Multiple batteries can be used by adding another battery module. Any solar cell technology can be used and various array layouts can be incorporated with no change in Power System Electronics (PSE) hardware. Other features of the design are the standardized interfaces between cards and subsystems and immunity to radiation effects up to 30 krad Total Ionizing Dose (TID) and 35 Mev/cm(exp 2)-kg for Single Event Effects (SEE). The control algorithm for the power system resides in a radiation-hardened microprocessor. A table driven software design allows for flexibility in mission specific requirements. By storing critical power system constants in memory, modifying the system code for other programs is simple. These constants can be altered also by ground command, or in response to an anomolous event. All critical power system functions have backup hardware functions to prevent a software or computer glitch from propagating. A number of battery charge control schemes can be implemented by selecting the proper control terms in the code. The architecture allows the design engineer to tune the system response to various system components and anticipated load profiles without costly alterations. A design trade was made with the size, weight and power dissipation of the electronics versus the performance of the power bus to load variations. Linear, fine control is maintained with a streamlined electronics design. This paper describes the hardware design as well as the software control algorithm. The challenges of closing the system control loop digitally is discussed. Control loop margin and power system performance is presented. Lab measurements are shown and compared to the system response of a hardware model running actual flight software.

Castell, Karen↗

A cycle timer for testing electric vehicles

The paper presents a cycle timer which enables the accurate following and repetition of SAE driving schedules of stop and go cycles, for electric vehicles, by reducing the human factor. The system which consists of a programmable read-only memory (PROM) stores each of these cycles, which are detailed, on its own plug-in card. The actual vehicle speed, and the PROM indicated desired speed are displayed on a dual scale meter allowing the driver to match them. A speed change is preceded by a half second buzzer warning and a new cycle by a one second warning. The PROM controls the recycle start time as well as the buzzer activation. A 5 volt regulator providing logic power, and a 12 volt dc-dc converter providing analog and memory power are described.

Soltis, R. F.↗

Matrix Encoding For Correction Of Errors

Method of matrix encoding and associated decoding provides for correction of errors in digital data recorded on magnetic tape. Intended specifically for use with commercial control circuit board and associated software making it possible to use video cassette recorder as backup for hard-disk memory of personal computer.

Dotson, Ronald S.↗

An architecture for real-time vision processing

To study the feasibility of developing an architecture for real time vision processing, a task queue server and parallel algorithms for two vision operations were designed and implemented on an i860-based Mercury Computing System 860VS array processor. The proposed architecture treats each vision function as a task or set of tasks which may be recursively divided into subtasks and processed by multiple processors coordinated by a task queue server accessible by all processors. Each idle processor subsequently fetches a task and associated data from the task queue server for processing and posts the result to shared memory for later use. Load balancing can be carried out within the processing system without the requirement for a centralized controller. The author concludes that real time vision processing cannot be achieved without both sequential and parallel vision algorithms and a good parallel vision architecture.

Chien, Chiun-Hong↗

Sample Acquisition and Instrument Deployment (SAID)

This report details the interim progress for contract NASW-4818, Sample Acquisition and Instrument Deployment (SAID), a robotic system for deploying science instruments and acquiring samples for analysis. The system is a conventional four degree of freedom manipulator 2 meters in length. A baseline design has been achieved through analysis and trade studies. The design considers environmental operating conditions on the surface of Mars, as well as volume constraints on proposed Mars landers. Control issues have also been studied, and simulations of joint and tip movements have been performed. A passively braked shape memory actuator with the ability to measure load has been developed. The wrist also contains a mechanism which locks the lid output to the bucket so that objects can be grasped and released for instrument deployment. The wrist actuator has been tested for operational power and mechanical functionality at Mars environmental conditions. The torque which the actuator can produce has been measured. Also, testing in Mars analogous soils has been performed.

Boyd, Robert C.↗

A Report of Bethune-Cookman College NASA JOVE Projects

This document is the final report for the Joint Venture (JOVE) in Space Sciences, and describes the tasks, performed with the support of the contract. These tasks include work in: (1) interfacing microprocessor systems to high performance parallel interface chips, SCSI drive and memory, needed for the implementation of a Space Optical Data Recorder; (2) designing a digital interface architecture for a microprocessor controlled sensors monitoring unit for a NASA Jitter Attenuation and Dynamics Experiment (JADE) project; (3) developing an enhanced back-propagation training algorithm; (4) studying the effect of simulated spaceflight on Aortic Contractility; (5) developing a course in astronomy; and (6) improving internet access by running cables, and installing hubs in various places on the campus; and (7) researching the characteristics of Nd:YALO laser resonator.

Agba, Lawrence C.↗

Lisp as an Alternative to Java

In a recent study, Prechelt compared the relative performance of Java and C++ in terms of execution time and memory utilization. Unlike many benchmark studies, Prechelt compared mulitple implementations of the same task by multiple programmers in order to control for the effects of difference in programmer skill.

Lisp Java↗

Rapid evolution of analog circuits configured on a field programmable transistor array

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

SABLES analog circuits field programmable transist↗