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At least 505 records · Page 28
All sourcesNASA NTRSDOE OSTI
NASA NTRS1990

Multilayer ceramic oxide solid electrolyte for fuel cells and electrolysis cells and method for fabrication thereof

An unitary layered ceramic structure is disclosed which comprises co-sintered layers. The co-sintered structure comprises a sintered central layer of yttria stabilized zirconia (YSZ) which is about 8 mole percent yttria and having a density of at least about 95% of theoretical, and sintered outer layers of strontium lanthanum manganite (LSM) having the approximate molecular composition La.sub.0.8 Sr.sub.0.2 MnO.sub.3, having a density from about 50 to about 60% of theoretical, and having interconnected porosity from about 40 to 50% with an interconnected pore diameter from about one micron to about five microns. The sintered central layer is sandwiched by and bonded and sintered to the outer layers and is essentially free of significant amounts of manganese. A process for making the unitary composition-of-matter is also disclosed which involves tape casting a LSM tape and then on top thereof casting a YSZ tape. The process comprises presintering LSM powder at 1250.degree. F., crushing the presintered commercially available LSM powder, forming a slurry with the crushed LSM, a binder and solvent, tape casting the slurry and allowing the slurry to air dry. A mixture of commercially available submicron size particle YSZ powder is milled with a dispersant and solvent to disperse the YSZ particles thereby forming a dispersed YSZ slurry. The YSZ slurry is then tape cast on the dried LSM tape. If desired, a third layer of LSM can be cast on top of the dried YSZ layer. After drying the composite LSM/YSZ and LSM/YSZ/LSM tapes are fired at 1300.degree. C. No migration of manganese into the YSZ layer was observed with scanning electron microscope/edax in the sintered multilayer tape.

Schroeder, James E.↗
NASA NTRS1989

Space deployable domed solar concentrator with foldable panels and hinge therefor

A space deployable solar energy concentrator is formed of a dome-shaped arrangement of compactly stowable flat panel segments mounted on a collapsible, space-deployable support structure of interconnected linear components. The support structure is comprised of a plurality of tensioned, curvilinear edge strips which extend in a radial direction from a prescribed vertex of a surrounding umbrella-like framework of radially extending rib members. Between a respective pair of radially-extending, curvilinear edge strips an individual wedge-shaped panel section is formed of a plurality of multi-segment lens panel strips each of which is supported in tension between the pair of edge strips by a pair of circumferentially extending catenary cord members connected to a pair of ribs of the surrounding umbrella-like framework. A respective lens panel strip is comprised of a plurality of flat, generally rectangular-shaped, energy-directing panels arranged side-by-side in the circumferential direction of the dome. Adjacent panels are interconnected by flexible U-shaped hinges which overlap opposing edges of adjacent panels and engage respective cylindrically-shaped, load distribution bars that slide within the flexible hinges. Because each U-shaped hinge is flexible, it is permitted to shift in the circumferential direction of the panel section to facilitate stowage and deployment of the dome.

Grayson, Fred G.↗
NASA NTRS1990

Artificial dexterous hand

An artificial dexterous hand is provided for conformally engaging and manipulating objects. The hand includes an articulated digit which is connected to an engagement sub-assembly and has a first shape adaption mechanism associated with it. The digit has a digit base and first and second phalanges. The digit base is operatively interconnected to the first phalange by a base joint having a base pulley. The phalanges are operatively interconnected by a separate first phalange joint having a first phalange pulley. The engagement sub-assembly includes a tendon, which is received by the base pulley and by the first phalange pulley, and an actuation device for selectively tensioning the tendon. The first shape adaption mechanism is responsive to and receives the tendon. It is also situated between the base joint and the first phalange joint and is connected to the first phalange. Upon actuation by the actuation device, the phalanges are caused to pivot relative to the base joint and the second phalange is caused to pivot relative to the first phalange. At the same time, the first shape adaption mechanism controls the sequence of the aforementioned pivoting of the phalanges through application of braking force to the tendon.

Lee, Sukhan↗
NASA NTRS2008

The Whole Heliosphere Interval: Campaign Summaries and Early Results

The Whole Heliosphere Interval (WHI) is an internationally coordinated observing and modeling effort to characterize the 3-dimensional interconnected solar-heliospheric-planetary system - a.k.a. the "heliophysical" system. The heart of the WHI campaign is the study of the interconnected 3-D heliophysical domain, from the interior of the Sun, to the Earth, outer planets, and into interstellar space. WHI observing campaigns began with the 3-0 solar structure from solar Carrington Rotation 2068, which ran from March 20 - April 16, 2008. Observations and models of the outer heliosphere and planetary impacts extended beyond those dates as necessary; for example, the solar wind transit time to outer planets can take months. WHI occurs during solar minimum, which optimizes our ability to characterize the 3-D heliosphere and trace the structure to the outer limits of the heliosphere. A summary of some of the key results from the WHI first workshop in August 2008 will be given.

Thompson, Barbara J.↗
NASA NTRS2008

Electromagnetically Clean Solar Arrays

The term 'electromagnetically clean solar array' ('EMCSA') refers to a panel that contains a planar array of solar photovoltaic cells and that, in comparison with a functionally equivalent solar-array panel of a type heretofore used on spacecraft, (1) exhibits less electromagnetic interferences to and from other nearby electrical and electronic equipment and (2) can be manufactured at lower cost. The reduction of electromagnetic interferences is effected through a combination of (1) electrically conductive, electrically grounded shielding and (2) reduction of areas of current loops (in order to reduce magnetic moments). The reduction of cost is effected by designing the array to be fabricated as a more nearly unitary structure, using fewer components and fewer process steps. Although EMCSAs were conceived primarily for use on spacecraft they are also potentially advantageous for terrestrial applications in which there are requirements to limit electromagnetic interference. In a conventional solar panel of the type meant to be supplanted by an EMCSA panel, the wiring is normally located on the back side, separated from the cells, thereby giving rise to current loops having significant areas and, consequently, significant magnetic moments. Current-loop geometries are chosen in an effort to balance opposing magnetic moments to limit far-0field magnetic interactions, but the relatively large distances separating current loops makes full cancellation of magnetic fields problematic. The panel is assembled from bare photovoltaic cells by means of multiple sensitive process steps that contribute significantly to cost, especially if electomagnetic cleanliness is desired. The steps include applying a cover glass and electrical-interconnect-cell (CIC) sub-assemble, connecting the CIC subassemblies into strings of series-connected cells, laying down and adhesively bonding the strings onto a panel structure that has been made in a separate multi-step process, and mounting the wiring on the back of the panel. Each step increases the potential for occurrence of latent defects, loss of process control, and attrition of components. An EMCSA panel includes an integral cover made from a transparent material. The silicone cover supplants the individual cover glasses on the cells and serves as an additional unitary structural support that offers the advantage, relative to glass, of the robust, forgiving nature of the silcone material. The cover contains pockets that hold the solar cells in place during the lamination process. The cover is coated with indium tin oxide to make its surface electrically conductive, so that it serves as a contiguous, electrically grounded shield over the entire panel surface. The cells are mounted in proximity to metallic printed wiring. The painted-wiring layer comprises metal-film traces on a sheet of Kapton (or equivalent) polyimide. The traces include contact pads on one side of the sheet for interconnecting the cells. Return leads are on the opposite side of the sheet, positioned to form the return currents substantially as mirror images of, and in proximity to, the cell sheet currents, thereby minimizing magnetic moments. The printed-wiring arrangement mimics the back-wiring arrangement of conventional solar arrays, but the current-loop areas and the resulting magnetic moments are much smaller because the return-current paths are much closer to the solar-cell sheet currents. The contact pads are prepared with solder fo electrical and mechanical bonding to the cells. The pocketed cover/shield, the solar cells, the printed-wiring layer, an electrical bonding agent, a mechanical-bonding agent, a composite structural front-side face sheet, an aluminum honeycomb core, and a composite back-side face sheet are all assembled, then contact pads are soldered to the cells and the agents are cured in a single lamination process.

Stem, Theodore G.↗
NASA NTRS2009

Regenerative Performance of the NASA Symmetrical Solid Oxide Fuel Cell Design

The NASA Glenn Research Center is developing both a novel cell design (BSC) and a novel ceramic fabrication technique to produce fuel cells predicted to exceed a specific power density of 1.0 kW/kg. The NASA Glenn cell design has taken a completely different approach among planar designs by removing the metal interconnect and returning to the use of a thin, doped LaCrO3 interconnect. The cell is structurally symmetrical. Both electrodes support the thin electrolyte and contain micro-channels for gas flow-- a geometry referred to as a bi-electrode supported cell or BSC. The cell characteristics have been demonstrated under both SOFC and SOE conditions. Electrolysis tests verify that this cell design operates at very high electrochemical voltage efficiencies (EVE) and high H2O conversion percentages, even at the low flow rates predicted for closed loop systems encountered in unmanned aerial vehicle (UAV) applications. For UAVs the volume, weight and the efficiency are critical as they determine the size of the water tank, the solar panel size, and other system requirements. For UAVs, regenerative solid oxide fuel cell stacks (RSOFC) use solar panels during daylight to generate power for electrolysis and then operate in fuel cell mode during the night to power the UAV and electronics. Recent studies, performed by NASA for a more electric commercial aircraft, evaluated SOFCs for auxiliary power units (APUs). System studies were also conducted for regenerative RSOFC systems. One common requirement for aerospace SOFCs and RSOFCs, determined independently in each application study, was the need for high specific power density and volume density, on the order of 1.0 kW/kg and greater than 1.0 kW/L. Until recently the best reported performance for SOFCs was 0.2 kW/kg or less for stacks. NASA Glenn is working to prototype the light weight, low volume BSC design for such high specific power aerospace applications.

Cable, Thomas L.↗
NASA NTRS2008

Spaceborne Processor Array

A Spaceborne Processor Array in Multifunctional Structure (SPAMS) can lower the total mass of the electronic and structural overhead of spacecraft, resulting in reduced launch costs, while increasing the science return through dynamic onboard computing. SPAMS integrates the multifunctional structure (MFS) and the Gilgamesh Memory, Intelligence, and Network Device (MIND) multi-core in-memory computer architecture into a single-system super-architecture. This transforms every inch of a spacecraft into a sharable, interconnected, smart computing element to increase computing performance while simultaneously reducing mass. The MIND in-memory architecture provides a foundation for high-performance, low-power, and fault-tolerant computing. The MIND chip has an internal structure that includes memory, processing, and communication functionality. The Gilgamesh is a scalable system comprising multiple MIND chips interconnected to operate as a single, tightly coupled, parallel computer. The array of MIND components shares a global, virtual name space for program variables and tasks that are allocated at run time to the distributed physical memory and processing resources. Individual processor- memory nodes can be activated or powered down at run time to provide active power management and to configure around faults. A SPAMS system is comprised of a distributed Gilgamesh array built into MFS, interfaces into instrument and communication subsystems, a mass storage interface, and a radiation-hardened flight computer.

Chow, Edward T.↗
NASA NTRS2008

Spiking Neurons for Analysis of Patterns

Artificial neural networks comprising spiking neurons of a novel type have been conceived as improved pattern-analysis and pattern-recognition computational systems. These neurons are represented by a mathematical model denoted the state-variable model (SVM), which among other things, exploits a computational parallelism inherent in spiking-neuron geometry. Networks of SVM neurons offer advantages of speed and computational efficiency, relative to traditional artificial neural networks. The SVM also overcomes some of the limitations of prior spiking-neuron models. There are numerous potential pattern-recognition, tracking, and data-reduction (data preprocessing) applications for these SVM neural networks on Earth and in exploration of remote planets. Spiking neurons imitate biological neurons more closely than do the neurons of traditional artificial neural networks. A spiking neuron includes a central cell body (soma) surrounded by a tree-like interconnection network (dendrites). Spiking neurons are so named because they generate trains of output pulses (spikes) in response to inputs received from sensors or from other neurons. They gain their speed advantage over traditional neural networks by using the timing of individual spikes for computation, whereas traditional artificial neurons use averages of activity levels over time. Moreover, spiking neurons use the delays inherent in dendritic processing in order to efficiently encode the information content of incoming signals. Because traditional artificial neurons fail to capture this encoding, they have less processing capability, and so it is necessary to use more gates when implementing traditional artificial neurons in electronic circuitry. Such higher-order functions as dynamic tasking are effected by use of pools (collections) of spiking neurons interconnected by spike-transmitting fibers. The SVM includes adaptive thresholds and submodels of transport of ions (in imitation of such transport in biological neurons). These features enable the neurons to adapt their responses to high-rate inputs from sensors, and to adapt their firing thresholds to mitigate noise or effects of potential sensor failure. The mathematical derivation of the SVM starts from a prior model, known in the art as the point soma model, which captures all of the salient properties of neuronal response while keeping the computational cost low. The point-soma latency time is modified to be an exponentially decaying function of the strength of the applied potential. Choosing computational efficiency over biological fidelity, the dendrites surrounding a neuron are represented by simplified compartmental submodels and there are no dendritic spines. Updates to the dendritic potential, calcium-ion concentrations and conductances, and potassium-ion conductances are done by use of equations similar to those of the point soma. Diffusion processes in dendrites are modeled by averaging among nearest-neighbor compartments. Inputs to each of the dendritic compartments come from sensors. Alternatively or in addition, when an affected neuron is part of a pool, inputs can come from other spiking neurons. At present, SVM neural networks are implemented by computational simulation, using algorithms that encode the SVM and its submodels. However, it should be possible to implement these neural networks in hardware: The differential equations for the dendritic and cellular processes in the SVM model of spiking neurons map to equivalent circuits that can be implemented directly in analog very-large-scale integrated (VLSI) circuits.

Huntsberger, Terrance↗
NASA NTRS2008

Ring Bus Architecture for a Solid-State Recorder

A document concisely describes a ring bus architecture for a proposed solid-state recorder (SSR) that would serve as buffer of data to be transmitted from a spacecraft to Earth. This architecture would afford fault tolerance needed for reliable operation in an anticipated high-radiation environment in which traditional SSRs cannot operate reliably. Features of the architecture include one or more controller boards and multiple memory boards interconnected in a ringlike topology. The interconnections would be high-speed serial links complying with the Institute of Electrical and Electronics Engineers (IEEE) standard 1393 (which pertains to a spaceborne fiber-optic data bus). Accordingly, each controller and memory board would be equipped with an IEEE-1393-compliant ring-bus-interface unit. The ringlike topology and the multiplicity of memory boards (and, optionally, of controller boards) would afford the redundancy needed for fault tolerance. Each board would be a fault-containment region. The IEEE 1393 links could be routed so that the SSR would continue to function even in the event of multiple failures. This architecture would also support scalability over a wide range. In a fully redundant configuration, it could accommodate between 1 and 125 memory boards.

Walker, W. John↗
NASA NTRS2009

Silicon Wafer-Scale Substrate for Microshutters and Detector Arrays

The silicon substrate carrier was created so that a large-area array (in this case 62,000+ elements of a microshutter array) and a variety of discrete passive and active devices could be mounted on a single board, similar to a printed circuit board. However, the density and number of interconnects far exceeds the capabilities of printed circuit board technology. To overcome this hurdle, a method was developed to fabricate this carrier out of silicon and implement silicon integrated circuit (IC) technology. This method achieves a large number of high-density metal interconnects; a 100-percent yield over a 6-in. (approximately equal to 15-cm) diameter wafer (one unit per wafer); a rigid, thermally compatible structure (all components and operating conditions) to cryogenic temperatures; re-workability and component replaceability, if required; and the ability to precisely cut large-area holes through the substrate. A method that would employ indium bump technology along with wafer-scale integration onto a silicon carrier was also developed. By establishing a silicon-based version of a printed circuit board, the objectives could be met with one solution. The silicon substrate would be 2 mm thick to survive the environmental loads of a launch. More than 2,300 metal traces and over 1,500 individual wire bonds are required. To mate the microshutter array to the silicon substrate, more than 10,000 indium bumps are required. A window was cut in the substrate to allow the light signal to pass through the substrate and reach the microshutter array. The substrate was also the receptacle for multiple unpackaged IC die wire-bonded directly to the substrate (thus conserving space over conventionally packaged die). Unique features of this technology include the implementation of a 2-mmthick silicon wafer to withstand extreme mechanical loads (from a rocket launch); integrated polysilicon resistor heaters directly on the substrate; the precise formation of an open aperture (approximately equal to 3x3cm) without any crack propagation; implementation of IR transmission blocking techniques; and compatibility with indium bump bonding. Although designed for the microshutter arrays for the NIRSpec instrument on the James Webb Space Telescope, these substrates can be linked to microshutter applications in the photomask generation and stepper equipment used to make ICs and microelectromechanical system (MEMS) devices.

Jhabvala, Murzy↗
NASA NTRS2007

SiC Multi-Chip Power Modules as Power-System Building Blocks

The term "SiC MCPMs" (wherein "MCPM" signifies "multi-chip power module") denotes electronic power-supply modules containing multiple silicon carbide power devices and silicon-on-insulator (SOI) control integrated-circuit chips. SiC MCPMs are being developed as building blocks of advanced expandable, reconfigurable, fault-tolerant power-supply systems. Exploiting the ability of SiC semiconductor devices to operate at temperatures, breakdown voltages, and current densities significantly greater than those of conventional Si devices, the designs of SiC MCPMs and of systems comprising multiple SiC MCPMs are expected to afford a greater degree of miniaturization through stacking of modules with reduced requirements for heat sinking. Moreover, the higher-temperature capabilities of SiC MCPMs could enable operation in environments hotter than Si-based power systems can withstand. The stacked SiC MCPMs in a given system can be electrically connected in series, parallel, or a series/parallel combination to increase the overall power-handling capability of the system. In addition to power connections, the modules have communication connections. The SOI controllers in the modules communicate with each other as nodes of a decentralized control network, in which no single controller exerts overall command of the system. Control functions effected via the network include synchronization of switching of power devices and rapid reconfiguration of power connections to enable the power system to continue to supply power to a load in the event of failure of one of the modules. In addition to serving as building blocks of reliable power-supply systems, SiC MCPMs could be augmented with external control circuitry to make them perform additional power-handling functions as needed for specific applications: typical functions could include regulating voltages, storing energy, and driving motors. Because identical SiC MCPM building blocks could be utilized in a variety of ways, the cost and difficulty of designing new, highly reliable power systems would be reduced considerably. Several prototype DC-to-DC power-converter modules containing SiC power-switching devices were designed and built to demonstrate the feasibility of the SiC MCPM concept. In anticipation of a future need for operation at high temperature, the circuitry in the modules includes high-temperature inductors and capacitors. These modules were designed to be stacked to construct a system of four modules electrically connected in series and/or parallel. The packaging of the modules is designed to satisfy requirements for series and parallel interconnection among modules, high power density, high thermal efficiency, small size, and light weight. Each module includes four output power connectors two for serial and two for parallel output power connections among the modules. Each module also includes two signal connectors, electrically isolated from the power connectors, that afford four zones for signal interconnections among the SOI controllers. Finally, each module includes two input power connectors, through which it receives power from an in-line power bus. This design feature is included in anticipation of a custom-designed power bus incorporating sockets compatible with snap-on type connectors to enable rapid replacement of failed modules.

Lostetter, Alexander↗
NASA NTRS2007

Mo/Ti Diffusion Bonding for Making Thermoelectric Devices

An all-solid-state diffusion bonding process that exploits the eutectoid reaction between molybdenum and titanium has been developed for use in fabricating thermoelectric devices based on skutterudite compounds. In essence, the process is one of heating a flat piece of pure titanium in contact with a flat piece of pure molybdenum to a temperature of about 700 C while pushing the pieces together with a slight pressure [a few psi (of the order of 10 kPa)]. The process exploits the energy of mixing of these two metals to form a strong bond between them. These two metals were selected partly because the bonds formed between them are free of brittle intermetallic phases and are mechanically and chemically stable at high temperatures. The process is a solution of the problem of bonding hot-side metallic interconnections (denoted hot shoes in thermoelectric jargon) to titanium-terminated skutterudite n and p legs during the course of fabrication of a unicouple, which is the basic unit cell of a thermoelectric device (see figure). The hot-side operating temperature required for a skutterudite thermoelectric device is 700 C. This temperature precludes the use of brazing to attach the hot shoe; because brazing compounds melt at lower temperatures, the hot shoe would become detached during operation. Moreover, the decomposition temperature of one of the skutterudite compounds is 762 C; this places an upper limit on the temperature used in bonding the hot shoe. Molybdenum was selected as the interconnection metal because the eutectoid reaction between it and the titanium at the ends of the p and n legs has characteristics that are well suited for this application. In addition to being suitable for use in the present bonding process, molybdenum has high electrical and thermal conductivity and excellent thermal stability - characteristics that are desired for hot shoes of thermoelectric devices. The process takes advantage of the chemical potential energy of mixing between molybdenum and titanium. These metals have a strong affinity for each other. They are almost completely soluble in each other and remain in the solid state at temperatures above the eutectoid temperature of 695 C. As a result, bonds formed by interdiffusion of molybdenum and titanium are mechanically stable at and well above the original bonding temperature of about 700 C. Inasmuch as the bonds are made at approximately the operating temperature, thermomechanical stresses associated with differences in thermal expansion are minimized.

Sakamoto, Jeffrey↗
NASA NTRS2010

High-Speed Ring Bus

The high-speed ring bus at the Jet Propulsion Laboratory (JPL) allows for future growth trends in spacecraft seen with future scientific missions. This innovation constitutes an enhancement of the 1393 bus as documented in the Institute of Electrical and Electronics Engineers (IEEE) 1393-1999 standard for a spaceborne fiber-optic data bus. It allows for high-bandwidth and time synchronization of all nodes on the ring. The JPL ring bus allows for interconnection of active units with autonomous operation and increased fault handling at high bandwidths. It minimizes the flight software interface with an intelligent physical layer design that has few states to manage as well as simplified testability. The design will soon be documented in the AS-1393 standard (Serial Hi-Rel Ring Network for Aerospace Applications). The framework is designed for "Class A" spacecraft operation and provides redundant data paths. It is based on "fault containment regions" and "redundant functional regions (RFR)" and has a method for allocating cables that completely supports the redundancy in spacecraft design, allowing for a complete RFR to fail. This design reduces the mass of the bus by incorporating both the Control Unit and the Data Unit in the same hardware. The standard uses ATM (asynchronous transfer mode) packets, standardized by ITU-T, ANSI, ETSI, and the ATM Forum. The IEEE-1393 standard uses the UNI form of the packet and provides no protection for the data portion of the cell. The JPL design adds optional formatting to this data portion. This design extends fault protection beyond that of the interconnect. This includes adding protection to the data portion that is contained within the Bus Interface Units (BIUs) and by adding to the signal interface between the Data Host and the JPL 1393 Ring Bus. Data transfer on the ring bus does not involve a master or initiator. Following bus protocol, any BIU may transmit data on the ring whenever it has data received from its host. There is no centralized arbitration or bus granting. The JPL design provides for autonomous synchronization of the nodes on the ring bus. An address-synchronous latency adjust buffer (LAB) has been designed that cannot get out of synchronization and needs no external input. Also, a priority-driven cable selection behavior has been programmed into each unit on the ring bus. This makes the bus able to connect itself up, according to a maximum redundancy priority system, without the need for computer intervention at startup. Switching around a failed or switched-off unit is also autonomous. The JPL bus provides a map of all the active units for the host computer to read and use for fault management. With regard to timing, this enhanced bus recognizes coordinated timing on a spacecraft as critical and addresses this with a single source of absolute and relative time, which is broadcast to all units on the bus with synchronization maintained to the tens of nanoseconds. Each BIU consists of up to five programmable triggers, which may be programmed for synchronization of events within the spacecraft of instrument. All JPL-formatted data transmitted on the ring bus are automatically time-stamped.

Wysocky, Terry↗
NASA NTRS2009

NASA 2009 Body of Knowledge (BoK) Through-Slicon Via Technology

Through-silicon via (TSV) is the latest in a progression of technologies for stacking silicon devices in three dimensions (3D). Driven by the need for improved performance, methods to use short vertical interconnects to replace the long interconnects found in 2D structures have been developed. The industry is moving past the feasibility (research and development [R and D]) phase for TSV technology into the commercialization phase where economic realities will determine which technologies are adopted. Low-cost fine via hole formation and highly reliable via filling technologies have been demonstrated; process equipment and materials are available. Even though design, thermal, and test issues remain, much progress has been made.

3D packaging↗
NASA NTRS2009

Smart and Intelligent Sensors

John C. Stennis Space Center (SSC) provides rocket engine propulsion testing for NASA's space programs. Since the development of the Space Shuttle, every Space Shuttle Main Engine (SSME) has undergone acceptance testing at SSC before going to Kennedy Space Center (KSC) for integration into the Space Shuttle. The SSME is a large cryogenic rocket engine that uses Liquid Hydrogen (LH2) as the fuel. As NASA moves to the new ARES V launch system, the main engines on the new vehicle, as well as the upper stage engine, are currently base lined to be cryogenic rocket engines that will also use LH2. The main rocket engines for the ARES V will be larger than the SSME, while the upper stage engine will be approximately half that size. As a result, significant quantities of hydrogen will be required during the development, testing, and operation of these rocket engines.Better approaches are needed to simplify sensor integration and help reduce life-cycle costs. 1.Smarter sensors. Sensor integration should be a matter of "plug-and-play" making sensors easier to add to a system. Sensors that implement new standards can help address this problem; for example, IEEE STD 1451.4 defines transducer electronic data sheet (TEDS) templates for commonly used sensors such as bridge elements and thermocouples. When a 1451.4 compliant smart sensor is connected to a system that can read the TEDS memory, all information needed to configure the data acquisition system can be uploaded. This reduces the amount of labor required and helps minimize configuration errors. 2.Intelligent sensors. Data received from a sensor be scaled, linearized; and converted to engineering units. Methods to reduce sensor processing overhead at the application node are needed. Smart sensors using low-cost microprocessors with integral data acquisition and communication support offer the means to add these capabilities. Once a processor is embedded, other features can be added; for example, intelligent sensors can make a health assessment to inform the data acquisition client when sensor performance is suspect. 3.Distributed sample synchronization. Networks of sensors require new ways for synchronizing samples. Standards that address the distributed timing problem (for example, IEEE STD 1588) provide the means to aggregate samples from many distributed smart sensors with sub-microsecond accuracy. 4. Reduction in interconnect. Alternative means are needed to reduce the frequent problems associated with cabling and connectors. Wireless technologies offer the promise of reducing interconnects and simultaneously making it easy to quickly add a sensor to a system.

Lansaw, John↗
NASA NTRS2010

Development and Testing of an Ultracapacitor Based Uninterruptible Power Supply (UPS) System

The NASA Glenn Research Center (GRC) initiated the development and testing of an ultracapacitor based uninterruptible power supply (UPS) system as a means to provide backup power for the many critical NASA applications. A UPS system typically utilizes batteries for energy storage. The battery is the most vulnerable part of the UPS system, requiring regular maintenance and replacement. Battery performance is also extremely temperature dependent. Ultracapacitors are ideal for UPS systems where long life, maintenance free operation, and excellent low temperature performance is essential. State of the art symmetric ultracapacitors were used for these tests. The ultracapacitors were interconnected in an innovative configuration to minimize interconnection impedance, and to provide voltage balancing. Ultracapacitors can be charged extremely rapidly and supply high current, which are essential characteristics for an effective UPS system. Charging ultracapacitors is significantly less complex than charging batteries since there is no chemical reaction occurring while charging ultracapacitors. The report concludes that the implementation of symmetric ultracapacitors in a UPS system can provide significant improvements in power system performance and reliability.

Eichenberg, Dennis J.↗
NASA NTRS2010

Multiple Differential-Amplifier MMICs Embedded in Waveguides

Compact amplifier assemblies of a type now being developed for operation at frequencies of hundreds of gigahertz comprise multiple amplifier units in parallel arrangements to increase power and/or cascade arrangements to increase gains. Each amplifier unit is a monolithic microwave integrated circuit (MMIC) implementation of a pair of amplifiers in differential (in contradistinction to single-ended) configuration. Heretofore, in cascading amplifiers to increase gain, it has been common practice to interconnect the amplifiers by use of wires and/or thin films on substrates. This practice has not yielded satisfactory results at frequencies greater than 200 Hz, in each case, for either or both of two reasons: Wire bonds introduce large discontinuities. Because the interconnections are typically tens of wavelengths long, any impedance mismatches give rise to ripples in the gain-vs.-frequency response, which degrade the performance of the cascade.

Kangaslahti, Pekka↗
NASA NTRS2010

The Assurance Challenges of Advanced Packaging Technologies for Electronics

Advances in microelectronic parts performance are driving towards finer feature sizes, three-dimensional geometries and ever-increasing number of transistor equivalents that are resulting in increased die sizes and interconnection (I/O) counts. The resultant packaging necessary to provide assemble-ability, environmental protection, testability and interconnection to the circuit board for the active die creates major challenges, particularly for space applications, Traditionally, NASA has used hermetically packaged microcircuits whenever available but the new demands make hermetic packaging less and less practical at the same time as more and more expensive, Some part types of great interest to NASA designers are currently only available in non-hermetic packaging. It is a far more complex quality and reliability assurance challenge to gain confidence in the long-term survivability and effectiveness of nonhermetic packages than for hermetic ones. Although they may provide more rugged environmental protection than the familiar Plastic Encapsulated Microcircuits (PEMs), the non-hermetic Ceramic Column Grid Array (CCGA) packages that are the focus of this presentation present a unique combination of challenges to assessing their suitability for spaceflight use. The presentation will discuss the bases for these challenges, some examples of the techniques proposed to mitigate them and a proposed approach to a US MIL specification Class for non-hermetic microcircuits suitable for space application, Class Y, to be incorporated into M. IL-PRF-38535. It has recently emerged that some major packaging suppliers are offering hermetic area array packages that may offer alternatives to the nonhermetic CCGA styles but have also got their own inspectability and testability issues which will be briefly discussed in the presentation,

Sampson, Michael J.↗