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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28
All sourcesNASA NTRSDOE OSTI
NASA NTRS1989

Multichannel, Active Low-Pass Filters

Multichannel integrated circuits cascaded to obtain matched characteristics. Gain and phase characteristics of channels of multichannel, multistage, active, low-pass filter matched by making filter of cascaded multichannel integrated-circuit operational amplifiers. Concept takes advantage of inherent equality of electrical characteristics of nominally-identical circuit elements made on same integrated-circuit chip. Characteristics of channels vary identically with changes in temperature. If additional matched channels needed, chips containing more than two operational amplifiers apiece (e.g., commercial quad operational amplifliers) used. Concept applicable to variety of equipment requiring matched gain and phase in multiple channels - radar, test instruments, communication circuits, and equipment for electronic countermeasures.

Lev, James J.↗
NASA NTRS1971

Metallization failures

Metallization-related failure mechanisms were shown to be a major cause of integrated circuit failures under accelerated stress conditions, as well as in actual use under field operation. The integrated circuit industry is aware of the problem and is attempting to solve it in one of two ways: (1) better understanding of the aluminum system, which is the most widely used metallization material for silicon integrated circuits both as a single level and multilevel metallization, or (2) evaluating alternative metal systems. Aluminum metallization offers many advantages, but also has limitations particularly at elevated temperatures and high current densities. As an alternative, multilayer systems of the general form, silicon device-metal-inorganic insulator-metal, are being considered to produce large scale integrated arrays. The merits and restrictions of metallization systems in current usage and systems under development are defined.

Beatty, R.↗
NASA NTRS2026

The Hyperspectral Microwave Photonic Instrument (HyMPI) and its NEDT Performance

This work presents an overview of a hyperspectral microwave-photonic spectrometer and demonstrates the system end-to-end noise equivalent delta temperature (NEDT) performance. The system aims at augmenting the remote sensing capability from space, with a focus on the Earth’s planetary boundary layer (PBL) thermal microwave (MW) spectral region (0-200 GHz). Combining a Photonic Integrated Circuit (PIC) channelizer and an application-specific integrated circuit (ASIC) spectrometer, the PIC & ASIC (PICASIC) module is capable of processing 40 GHz spectra at hyperspectral (4 MHz) resolution. The photonic technology is agnostic to the spectral region and multiple photonic modules can cover the entire 200 GHz spectrum. Measured results of the end-to-end system NEDT agree with predicted values confirming that the NEDT is primarily dominated by the noise figure of the MW front-end, with the optical link adding no significant noise. The data also demonstrate that a single module enables simultaneous super- and hyper-spectral resolution channel analysis across a 40 GHz range.

spectrometer↗
NASA NTRS1994

Versatile Dual-Channel Waveform Generator

Programmable waveform generator synthesizes two independent waveforms simultaneously at frequencies up to 250 MHz. Can be in phase or out of phase with each other. Use of commercial integrated circuits helps keep cost low. Operation governed by BASIC source code enabling any user equipped with suitable personal computer to specify waveforms. User can modify source code to satisfy special needs. Other applications include simulation of Doppler waveforms for radar, and of video signals for testing color displays and computer monitors. With eventual substitution of gallium arsenide integrated circuits for its present silicon integrated circuits, instrument able to generate waveforms with 14-bit precision and sample rates as high as 2 GHz.

Staples, Edward J.↗
DOE OSTI2024

Efficient excitation and control of integrated photonic circuits with virtual critical coupling

Critical coupling in integrated photonic devices enables the efficient transfer of energy from a waveguide to a resonator, a key operation for many applications. This condition is achieved when the resonator loss rate is equal to the coupling rate to the bus waveguide. Carefully matching these quantities is challenging in practice, due to variations in the resonator properties resulting from fabrication and external conditions. Here, we demonstrate that efficient energy transfer to a non-critically coupled resonator can be achieved by tailoring the excitation signal in time. We rely on excitations oscillating at complex frequencies to load an otherwise overcoupled resonator, demonstrating that a virtual critical coupling condition is achieved if the imaginary part of the complex frequency equals the mismatch between loss and coupling rate. We probe a microring resonator with tailored pulses and observe a minimum intensity transmission T = 0.11 in contrast to a continuous-wave transmission T = 0.58, corresponding to 8 times enhancement of intracavity intensity. Our technique opens opportunities for enhancing and controlling on-demand light-matter interactions for linear and nonlinear photonic platforms.

42 ENGINEERING↗
DOE OSTI2025

Aligned carbon nanotubes for 1,000x improvement in computing (CRADA Final Report)

As part of the Cyclotron Road program, the Aligned Carbon team worked to improve and bring to market their technology to manufacture carbon nanotubes (CNTs) for integrated circuits. There are multiple applications which can benefit from the use of CNT based transistors in integrated circuits, including high performance computing, RF data transmission, and biosensing. Each of these applications faces a problem of poor starting CNT material to come to market. Aligned Carbon offers material with the highest ceiling of performance based around a fully aligned, uniform, on-wafer growth of CNTs and our proprietary purification process to remove metallic CNTs leaving only the semi-conducting ones behind. Further, Aligned Carbon has been guided by scalable manufacturing processes that will fit seamlessly into the integrated circuit foundry model of chip fabrication.

36 MATERIALS SCIENCE↗
NASA NTRS1976

High and low threshold P-channel metal oxide semiconductor process and description of microelectronics facility

The fabrication techniques and detail procedures for creating P-channel Metal-Oxide-Semiconductor (P-MOS) integrated circuits at George C. Marshall Space Flight Center (MSFC) are described. Examples of P-MOS integrated circuits fabricated at MSFC together with functional descriptions of each are given. Typical electrical characteristics of high and low threshold P-MOS discrete devices under given conditions are provided. A general description of MSFC design, mask making, packaging, and testing procedures is included. The capabilities described in this report are being utilized in: (1) research and development of new technology, (2) education of individuals in the various disciplines and technologies of the field of microelectronics, and (3) fabrication of many types of specially designed integrated circuits which are not commercially feasible in small quantities for in-house research and development programs.

Bouldin, D. L.↗
NASA NTRS1986

Cross-contact chain

A system is provided for use with wafers that include multiple integrated circuits that include two conductive layers in contact at multiple interfaces. Contact chains are formed beside the integrated circuits, each contact chain formed of the same two layers as the circuits, in the form of conductive segments alternating between the upper and lower layers and with the ends of the segments connected in series through interfaces. A current source passes a current through the series-connected segments, by way of a pair of current tabs connected to opposite ends of the series of segments. While the current flows, voltage measurements are taken between each of a plurality of pairs of voltage tabs, the two tabs of each pair connected to opposite ends of an interface that lies along the series-connected segments. A plot of interface conductances on normal probability chart enables prediction of the yield of good integrated circuits from the wafer.

Lieneweg, U.↗
NASA NTRS1988

Cross-contact chain

A system is provided for use with wafers that include multiple integrated circuits that include two conductive layers in contact at multiple interfaces. Contact chains are formed beside the integrated circuits, each contact chain formed of the same two layers as the circuits, in the form of conductive segments alternating between the upper and lower layers and with the ends of the segments connected in series through interfaces. A current source passes a current through the series-connected segments, by way of a pair of current tabs connected to opposite ends of the series of segments. While the current flows, voltage measurements are taken between each of a plurality of pairs of voltage tabs, the two tabs of each pair connected to opposite ends of an interface that lies along the series-connected segments. A plot of interface conductances on a normal probability chart, enables prediction of the yield of good integrated circuits from the wafer.

Lieneweg, Udo↗
NASA NTRS1980

Technique for mounting pyroelectric detector arrays

Technique is developed at Langley Research Center for mounting pyroelectric detector arrays on silicon integrated circuits. Procedure incorporates normal silicon integrated-circuit technology to form quasi-free mounts for detector arrays. Advantages of technique include lower cost, better image registration, and improved reliability.

Breckenridge, R. A.↗
NASA NTRS2003

Toroidal-Core Microinductors Biased by Permanent Magnets

The designs of microscopic toroidal-core inductors in integrated circuits of DC-to-DC voltage converters would be modified, according to a proposal, by filling the gaps in the cores with permanent magnets that would apply bias fluxes (see figure). The magnitudes and polarities of the bias fluxes would be tailored to counteract the DC fluxes generated by the DC components of the currents in the inductor windings, such that it would be possible to either reduce the sizes of the cores or increase the AC components of the currents in the cores without incurring adverse effects. Reducing the sizes of the cores could save significant amounts of space on integrated circuits because relative to other integrated-circuit components, microinductors occupy large areas - of the order of a square millimeter each. An important consideration in the design of such an inductor is preventing magnetic saturation of the core at current levels up to the maximum anticipated operating current. The requirement to prevent saturation, as well as other requirements and constraints upon the design of the core are expressed by several equations based on the traditional magnetic-circuit approximation. The equations involve the core and gap dimensions and the magnetic-property parameters of the core and magnet materials. The equations show that, other things remaining equal, as the maximum current is increased, one must increase the size of the core to prevent the flux density from rising to the saturation level. By using a permanent bias flux to oppose the flux generated by the DC component of the current, one would reduce the net DC component of flux in the core, making it possible to reduce the core size needed to prevent the total flux density (sum of DC and AC components) from rising to the saturation level. Alternatively, one could take advantage of the reduction of the net DC component of flux by increasing the allowable AC component of flux and the corresponding AC component of current. In either case, permanent-magnet material and the slant (if any) and thickness of the gap must be chosen according to the equations to obtain the required bias flux. In modifying the design of the inductor, one must ensure that the inductance is not altered. The simplest way to preserve the original value of inductance would be to leave the gap dimensions unchanged and fill the gap with a permanent- magnet material that, fortuitously, would produce just the required bias flux. A more generally applicable alternative would be to partly fill either the original gap or a slightly enlarged gap with a suitable permanent-magnet material (thereby leaving a small residual gap) so that the reluctance of the resulting magnetic circuit would yield the desired inductance.

Lieneweg, Udo↗
NASA NTRS2004

AIN-Based Packaging for SiC High-Temperature Electronics

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Savrun, Ender↗
DOE OSTI2020

Integrative Circuit-Host Modeling of a Genetic Switch in Varying Environments

Synthetic biology is advancing into a new phase where real-world applications are emphasized. There is hence an urgent need for mathematical modeling that can quantitatively describe the behaviors of genetic devices in natural, fluctuating environments. We utilize an integrative circuit-host modeling framework to examine the dynamics of a genetic switch and its host cell in varying environments. For both steady-state and transient cases, we find increasing nutrient reduces the bistability region of the phase space and eventually drives the switch from bistability to monostability. In response, cellular growth and proteome partitioning experience the same transition. Antibiotic perturbations cause the similar circuit and host responses as nutrient variations. However, one difference is the trend of growth rate, which augments with nutrient but declines with antibiotic levels. The framework provides a mechanistic scheme to account for both the dynamic and static characteristics of the circuit-host system upon environmental perturbations, underscoring the intimacy of gene circuits and their hosts and elucidating the complexity of circuit behaviors arising from environmental variations.

59 BASIC BIOLOGICAL SCIENCES↗
NASA NTRS2008

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.

Krasowski, Michael J.↗
DOE OSTI2022

Integrated silicon carbide diode rectifier circuits

An integrated silicon carbide rectifier circuit with an on chip isolation diode. The isolation diode can be a channel-to-substrate isolation diode or a channel to channel isolation diode. the circuit teaches an integrated diode rectification circuit for use with a two phase center tap transformer having a first voltage output, a second voltage output, and a center tap output with a single chip having a first half-wave rectifier connected to the first voltage output, a second half-wave rectifier connected to the second voltage output, and a floating substrate connection connected to the center tap output and an on chip first channel-to-substrate isolation diode electrically connected between the first half-wave rectifier and the floating substrate.

Barlow, Matthew↗
NASA NTRS1982

Total-dose radiation effects data for semiconductor devices, volume 3

Volume 3 of this three-volume set provides a detailed analysis of the data in Volumes 1 and 2, most of which was generated for the Galileo Orbiter Program in support of NASA space programs. Volume 1 includes total ionizing dose radiation test data on diodes, bipolar transistors, field effect transistors, and miscellaneous discrete solid-state devices. Volume 2 includes similar data on integrated circuits and a few large-scale integrated circuits. The data of Volumes 1 and 2 are combined in graphic format in Volume 3 to provide a comparison of radiation sensitivities of devices of a given type and different manufacturer, a comparison of multiple tests for a single data code, a comparison of multiple tests for a single lot, and a comparison of radiation sensitivities vs time (date codes). All data were generated using a steady-state 2.5-MeV electron source (Dynamitron) or a Cobalt-60 gamma ray source. The data that compose Volume 3 represent 26 different device types, 224 tests, and a total of 1040 devices. A comparison of the effects of steady-state electrons and Cobat-60 gamma rays is also presented.

Price, W. E.↗
NASA NTRS1993

Interface For MIL-STD-1553B Data Bus

Electronic control-logic subsystem acts as interface between microcontroller and MIL-STD-1553B data bus. Subsystem made of relatively small number of integrated circuits. Advantages include low power, few integrated-circuit chips, and little need for control signals.

Davies, Bryan L.↗