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At least 505 records · Page 28

Potential up-scaling of inkjet-printed devices for logical circuits in flexible electronics

Inkjet Technology is often mis-believed to be a deposition/patterning technology which is not meant for high fabrication throughput in the field of printed and flexible electronics. In this work, we report on the 1) printing, 2) fabrication yield and 3) characterization of exemplary simple devices e.g. capacitors, organic transistors etc. which are the basic building blocks for logical circuits. For this purpose, printing is performed first with a Proof of concept Inkjet printing system Dimatix Material Printer 2831 (DMP 2831) using 10 pL small print-heads and then with Dimatix Material Printer 3000 (DMP 3000) using 35 pL industrial print-heads (from Fujifilm Dimatix). Printing at DMP 3000 using industrial print-heads (in Sheet-to-sheet) paves the path towards industrialization which can be defined by printing in Roll-to-Roll format using industrial print-heads. This pavement can be termed as 'Bridging Platform'. This transfer to 'Bridging Platform' from 10 pL small print-heads to 35 pL industrial print-heads help the inkjet-printed devices to evolve on the basis of functionality and also in form of up-scaled quantities. The high printed quantities and yield of inkjet-printed devices justify the deposition reliability and potential to print circuits. This reliability is very much desired when it comes to printing of circuits e.g. inverters, ring oscillator and any other planned complex logical circuits which require devices e.g. organic transistors which needs to get connected in different staged levels. Also, the up-scaled inkjet-printed devices are characterized and they reflect a domain under which they can work to their optimal status. This status is much wanted for predicting the real device functionality and integration of them into a planned circuit.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Optimizing the fabrication process and interplay of device components of polymer solar cells using a field-based multiscale solar-cell algorithm

Both the device composition and fabrication process are well-known to crucially affect the power conversion efficiency of polymer solar cells. Major advances have recently been achieved through the development of novel device materials and inkjet printing technologies, which permit to improve their durability and performance considerably. In this work, we demonstrate the usefulness of a recently developed field-based multiscale solar-cell algorithm to investigate the influence of the material characteristics, like, e.g., electrode surfaces, polymer architectures, and impurities in the active layer, as well as post-production treatments, like, e.g., electric field alignment, on the photovoltaic performance of block-copolymer solar-cell devices. Our study reveals that a short exposition time of the polymer bulk heterojunction to the action of an external electric field can lead to a low photovoltaic performance due to an incomplete alignment process, leading to undulated or disrupted nanophases. With increasing exposition time, the nanophases align in direction to the electric field lines, resulting in an increase of the number of continuous percolation paths and, ultimately, in a reduction of the number of exciton and charge-carrier losses. Moreover, we conclude by modifying the interaction strengths between the electrode surfaces and active layer components that a too low or too high affinity of an electrode surface to one of the components can lead to defective contacts, causing a deterioration of the device performance. Finally, we infer from the study of block-copolymer nanoparticle systems that particle impurities can significantly affect the nanostructure of the polymer matrix and reduce the photovoltaic performance of the active layer. For a critical volume fraction and size of the nanoparticles, we observe a complete phase transformation of the polymer nanomorphology, leading to a drop of the internal quantum efficiency. For other particle-numbers and -sizes, we observe only a local perturbation of the nanostructure, diminishing the number of continuous percolation paths to the electrodes and, therefore, reducing the device performance. From these investigations, we conclude that our multiscale solar-cell algorithm is an effective approach to investigate the impact of device materials and post-production treatments on the photovoltaic performance of polymer solar cells.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In{sub 1−x}Ga{sub x}As channel capping layer

In this work, we study characteristics of 14-nm-gate InGaAs-based trigate MOSFET (metal-oxide-semiconductor field effect transistor) devices with a channel capping layer. The impacts of thickness and gallium (Ga) concentration of the channel capping layer on the device characteristic are firstly simulated and optimized by using three-dimensional quantum-mechanically corrected device simulation. Devices with In{sub 1−x}Ga{sub x}As/In{sub 0.53}Ga{sub 0.47}As channels have the large driving current owing to small energy band gap and low alloy scattering at the channel surface. By simultaneously considering various physical and switching properties, a 4-nm-thick In{sub 0.68}Ga{sub 0.32}As channel capping layer can be adopted for advanced applications. Under the optimized channel parameters, we further examine the effects of channel fin angle and the work-function fluctuation (WKF) resulting from nano-sized metal grains of NiSi gate on the characteristic degradation and variability. To maintain the device characteristics and achieve the minimal variation induced by WKF, the physical findings of this study indicate a critical channel fin angle of 85{sup o} is needed for the device with an averaged grain size of NiSi below 4x4 nm{sup 2}.

36 MATERIALS SCIENCE↗

Lorentz factor determination for local electric fields in semiconductor devices utilizing hyper-thin dielectrics

The local electric field (the field that distorts, polarizes, and weakens polar molecular bonds in dielectrics) has been investigated for hyper-thin dielectrics. Hyper-thin dielectrics are currently required for advanced semiconductor devices. In the work presented, it is shown that the common practice of using a Lorentz factor of L = 1/3, to describe the local electric field in a dielectric layer, remains valid for hyper-thin dielectrics. However, at the very edge of device structures, a rise in the macroscopic/Maxwell electric field E{sub diel} occurs and this causes a sharp rise in the effective Lorentz factor L{sub eff}. At capacitor and transistor edges, L{sub eff} is found to increase to a value 2/3 < L{sub eff} < 1. The increase in L{sub eff} results in a local electric field, at device edge, that is 50%–100% greater than in the bulk of the dielectric. This increase in local electric field serves to weaken polar bonds thus making them more susceptible to breakage by standard Boltzmann and/or current-driven processes. This has important time-dependent dielectric breakdown (TDDB) implications for all electronic devices utilizing polar materials, including GaN devices that suffer from device-edge TDDB.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As the result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Experimental evaluation of cooling efficiency of the high performance cooling device

This work deal with experimental evaluation of cooling efficiency of cooling device capable transfer high heat fluxes from electric elements to the surrounding. The work contain description of cooling device, working principle of cooling device, construction of cooling device. Experimental part describe the measuring method of device cooling efficiency evaluation. The work results are presented in graphic visualization of temperature dependence of the contact area surface between cooling device evaporator and electronic components on the loaded heat of electronic components in range from 250 to 740 W and temperature dependence of the loop thermosiphon condenser surface on the loaded heat of electronic components in range from 250 to 740 W.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Trench formation and corner rounding in vertical GaN power devices

Trench formation and corner rounding are the key processes to demonstrate high-voltage trench-based vertical GaN devices. In this work, we developed a damage-free corner rounding technology combining Tetramethylammonium hydroxide wet etching and piranha clean. By optimizing the inductively coupled plasma dry etching conditions and applying the rounding technology, two main trench shapes were demonstrated: flat-bottom rounded trench and tapered-bottom rounded trench. TCAD simulations were then performed to investigate the impact of trench shapes and round corners on device blocking capability. GaN trench metal-insulator-semiconductor barrier Schottky rectifiers with different trench shapes were fabricated and characterized. A breakdown voltage over 500 V was obtained in the device with flat-bottom rounded trenches, compared to 350 V in the device with tapered-bottom rounded trenches and 150 V in the device with non-rounded trenches. Both experimental and simulation results support the use of rounded flat-bottom trenches to fabricate high-voltage GaN trench-based power devices.

Zhang, Yuhao (ORCID:0000000228495653)↗

Gallium nitride (GaN) devices as a platform technology for radiation hard inertial confinement fusion diagnostics

Inertial Confinement Fusion (ICF) is undergoing more detailed research to increase neutron yield and will require high resolution imaging near the target. Neutron damage to diagnostics remains a serious issue in understanding and achieving ICF. We have demonstrated that Gallium Nitride (GaN) optoelectronic devices have exceptional neutron radiation hardness, by systematic testing of neutron radiation effects in GaN devices and materials with elevated neutron fluence levels and a broad neutron energy spectrum. During the 2013-2017 run cycles at Los Alamos Neutron Science Center (LANSCE), we irradiated various GaN materials and devices with fast and thermal plus resonance neutrons at several beamlines. This work presents a radiation hardness study for Aluminum Gallium Nitride and Gallium Nitride (AlGaN/GaN) deep UV LEDs irradiated at the LANSCE 4FP60R beamline. The fluence level was up to 2.4 × 10 13 neutrons/cm 2 for neutrons with energies greater than 0.1 MeV. The device performance was monitored in real time. After three years of irradiation studies, we found that the GaN devices maintained operation in the forward active region. The current and voltage relation (I-V curves) varied insignificantly in the linear region. Finally, our results demonstrate the radiation hardness needed for laser fusion diagnostics at least up to 10 17 neutron yield per shot, if the diagnostics is placed 1 m away from the target, where the neutron fluence per shot is approximately 8 × 10 11 n/cm 2 . The GaN devices can operate for multiple shots.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Gunn threshold voltage characterization in GaAs devices with wedge-shaped tapering

Here, we fabricate gallium arsenide-based devices with a wedge-shaped tapering region connected to a rectangular-shaped region and measure the threshold voltage required to trigger the Gunn effect. The threshold voltage reduction is attributed to the focusing of the electric field toward the narrower end of the device and is effective when the device has a steep enough tapering. We also model the electric field profile for the tapered devices using an intuitive graphical approach and the finite element method and provide estimates for the threshold voltages of tapered devices. Finally, we compare the estimates to the measured values and provide possible reasons for the discrepancies. We believe the capability of threshold voltage reduction with the wedge-shaped tapering design could be useful in device applications.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Wide bandgap semiconductor materials and devices

The technological and societal impacts of electronic devices based on Ge, Si, and compound semiconductors like GaAs have been profound, fueling the decades long quest in identifying ever-larger bandgap semiconductors to untap new applications and possibilities. Specifically, an increase in the bandgap leads to shorter wavelength emission and an increased breakdown electric field, which has direct consequences for solid-state lighting like light-emitting diodes (LEDs) and laser diodes (LDs) from the visible (blue-green, blue, and violet) and beyond (UV and deep-UV) spectral range and for radically improved power devices supported by a higher intrinsic breakdown strength. Wide bandgap (WBG) semiconductors represent the frontier of materials that satisfy these criteria and include group IV, III–V, and II–VI material families like SiC (3.2 eV), GaN (3.4 eV), and ZnO (3.4 eV), respectively. With even larger bandgaps exceeding 4 eV, ultrawide bandgap (UWBG) semiconductors include diamond, III-nitrides incorporating Al and B (e.g., AlN, BN, and AlGaN), and sesquioxides like Ga 2 O 3 and (Al,Ga) 2 O 3 . These materials span widely varying stages of technological maturity, with SiC and GaN platforms among the most mature with commercially available devices in RF and high-power electronics, while other platforms such as Ga 2 O 3 rapidly advancing and poised to enable new UV and deep-UV optoelectronic devices. This Special Topic on Wide Bandgap Semiconductor Materials and Devices covers broad research subtopics on WBG and UWBG materials that span bulk crystals, epitaxy and substrate technologies, fundamental defect science, and doping, as well as electronic and optoelectronic device fabrication and characterization. Here, we highlight works from the collection, which we categorize by material platform of SiC, III-nitrides, and Ga 2 O 3 and related alloys.

36 MATERIALS SCIENCE↗

Dependence of alpha-particle-driven Alfvén eigenmode linear stability on device magnetic field strength and consequences for next-generation tokamaks

Recently-proposed tokamak concepts use magnetic fields up to 12 T, far higher than in conventional devices, to reduce size and cost. Theoretical and computational study of trends in plasma behavior with increasing field strength is critical to such proposed devices. This paper considers trends in Alfvén eigenmode (AE) stability. Energetic particles, including alphas from deuterium–tritium fusion, can destabilize AEs, possibly causing loss of alpha heat and damage to the device. AEs are sensitive to device magnetic field via the field dependence of resonances, alpha particle beta, and alpha orbit width. We describe the origin and effect of these dependences analytically and by using recently-developed numerical techniques (Rodrigues et al 2015 Nucl. Fusion 55 083003). The work suggests high-field machines where fusion-born alphas are sub-Alfvénic or nearly sub-Alfvénic may partially cut off AE resonances, reducing growth rates of AEs and the energy of alphas interacting with them. High-field burning plasma regimes have non-negligible alpha particle beta and AE drive, but faster slowing down time, provided by high electron density, and higher field strength reduces this drive relative to low-field machines with similar power densities. The toroidal mode number of the most unstable modes will tend to be higher in high magnetic field devices. Finally, the work suggests that high magnetic field devices have unique, and potentially advantageous, AE instability properties at both low and high densities.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Intercomparison of Commercially Available Active Radon Measurement Devices in a Discovered Radon Chamber

An unventilated 70 m 3 underground space, with 2.1 m high ceilings and an inner set of concrete walls to damp vibrations, was discovered to have relatively stable radon levels of ~1,080 Bq m -3 over a 1-y period. The addition of radium sources was not required to achieve high and somewhat variable radon levels, as these arise naturally in the space. Several active radon monitoring devices designed for homeowners, radon screeners, radon mitigation professionals, and researchers were tested in the space. These devices were variable in both cost and intended user sophistication. Data were collected at specific time intervals that varied for each device. A cellphone was deployed with an available camera application to periodically capture photographs of the displays of devices not enabled for automatic temporal recording. Attempts were made to alter the radon concentration using fans, radium-laden objects, and radon impermeable sheets. Statistical methods were employed to compare the device's performance under the minor radon transients produced by the addition of 226 Ra sources during the test period. The evaluation of the overall accuracy, noise, and response to transients revealed highly affordable devices that may be useful for future research applications.While unsuitable for precise calibrations at stable radon levels, the space was determined to be adequate as a radon chamber for general research purposes.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Electrostatic modulation of the lateral carrier density profile in field effect devices with nonlinear dielectrics

The properties of two-dimensional (2D) electronic systems are often effectively controlled using electrostatic gating. The geometry of such field effect devices influences the effectiveness of the gate and the carrier density profile in the 2D device. Here, in this work, we analyze the gate-induced spatial variations in the lateral carrier density in patterned LaAlO 3 /SrTiO 3 devices. We model the electrostatics of the 2D interface using the Thomas-Fermi approximation and compute the gate-induced charge distribution at the interface. We show that the electric field lines generated by the gate are focused at the edges of the device, causing an increased depletion near its edges. This effect is accentuated in LaAlO 3 /SrTiO 3 due to the large, nonlinear dielectric constant of the substrate, and the large distance between the gate electrode and the interface. We experimentally demonstrate one consequence of this effect by directly imaging current distributions in gated heterostructures, finding that insulating regions nucleate at the edges of the device due to the gate. Our results suggest that device geometry and choice of dielectric materials control the charge distribution in 2D systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic Computing

As an emerging non-volatile memory device technology, Ferroelectric Field-Effect Transistors (FeFETs) can enable low-power, adaptive intelligent system design. However, device dimension and operating voltage dependent reliability issues of scaled FeFETs can ultimately lead to degraded performance in solving machine learning tasks. In this article, detailed experimental characterization of FeFET devices of different dimensions have been carried out to explicitly evaluate the non-ideal behavior in device conductance programming properties like number of programming states, cycle-to-cycle (C2C) variations, device-to-device (D2D) variations, and state retention. A hardware-aware software simulation approach has been adopted to capture the adversarial effects of the non-idealities on recognition accuracy through algorithm-level performance assessment by including them in NeuroSim, a popular neural network hardware simulator, to execute a neural network model considering all other hardware constraints. With the added non-idealities, significant accuracy degradation has been observed compared to the ideal scenarios where D2D variations play the most critical role. Thereafter, feasibility of a variation-aware training method has been evaluated to tackle the accuracy drop.

42 ENGINEERING↗

Avoiding Divergent Oscillation of Cascode GaN Device under High Current Turn-off Condition

Cascode structure is widely used for high voltage normally-on GaN devices. However, the capacitance mismatch between the high voltage GaN device and the low voltage normally- off Si MOSFET may induce several undesired features, such as Si MOSFET reaches avalanche during turn-off, and high voltage GaN device loses ZVS turn-on condition internally during soft-switching turn-on process in every switching cycle. This paper presents another issue associated with the capacitance mismatch in the cascode GaN devices. Divergent oscillation could occur at high current turn-off condition, and eventually destroy the device. The intrinsic reason of this phenomenon is analyzed in detail in this paper. A simple solution is proposed by adding an additional capacitor whose position is critical and should be optimized. Experimental results validate the theoretical analysis, and show that the proposed method improves device performance significantly under high current turn-off condition.

Du, Weijing↗

Thermal Stress Reduction in Power Switching Devices Using Distributed Loss PWM Concept for Current Source Inverters

A new modulation scheme is proposed for current source inverters (CSIs) that reduces the variation and peak junction temperature in the CSIs' power devices. The distributed loss pulse-width modulation (DLM) concept is introduced and applied to traditional space vector modulation methods to develop modified modulation schemes that reduce the thermal stress on power devices. The device junction temperatures resulting from conventional and DLM schemes are compared. Simulation and experimental results confirm that the proposed DLM concept reduces thermal stress on the devices while maintaining the same high output current waveform quality compared to traditional CSI modulation schemes. The CSI power device lifetime (i.e., the number of cycles to failure) are estimated using the simulation and experimental results. The proposed DLM significantly increases the device lifetime (by 5 to 6 times) by reducing the junction temperature variation compared to the conventional modulations.

42 ENGINEERING↗

Quantifying Dynamic On-State Resistance of GaN HEMTs for Power Converter Design via a Survey of Low and High Voltage Devices

Designing and optimizing high switching frequency, ultra-efficient converters requires detailed knowledge of the behavior and parasitic parameters for both active and passive components. Recently, wide bandgap transistors have enabled simultaneous increases in both switching frequency and efficiency due to higher maximum operating junction temperature limits, lower dc on-state resistances, and reduced parasitic inductances and capacitances. Yet, the early acceptance of gallium-nitride (GaN) switches was plagued by detrimental dynamic on-state resistance effects. This complex phenomenon for GaN devices is characterized by deviations in on-state resistance from dc operating characteristics based on design choices such as the magnitude and duration of both voltage and current stress, switching mode, and junction temperature. While device manufacturers have made improvements compared to early generation devices, experimental evidence from a survey of commercial GaN transistors highlight measurable change in on-state resistance still exists due to variations in voltage stress during hard-switching operation. After sharing insights for obtaining low noise measurements, an analysis method along with two metrics are proposed to characterize dynamic on-state resistance measurements for power electronics designers. Furthermore, quantifying the performance of GaN devices with standardized metrics facilitates a fair comparison between different GaN device technologies during converter development, enables manufacturing qualification for GaN switches, and provides a benchmark to catalyze improvement for the next generation of GaN device development.

14 SOLAR ENERGY↗

Intelligent Gate Drive for Fast Switching and Crosstalk Suppression of SiC Devices

This study presents an intelligent gate drive for silicon carbide (SiC) devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control gate voltages and gate loop impedances of both devices in a phase-leg configuration during different switching transients. Compared to conventional gate drives, the proposed circuit has the capability of accelerating the switching speed of the phase-leg power devices and suppressing the crosstalk to below device limits. Based on Wolfspeed 1200-V SiC MOSFETs, the test results demonstrate the effectiveness of this intelligent gate drive under varying operating conditions. More importantly, the proposed intelligent gate assist circuitry is embedded into a gate drive integrated circuit, offering a simple, compact, and reliable solution for end-users to maximize benefits of SiC devices in actual power electronics applications.

30 DIRECT ENERGY CONVERSION↗