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At least 505 records · Page 28

Reliable interface design for combining asynchronous and synchronous circuits

In order to successfully integrate asynchronous and synchronous designs, great care must be taken at the interface between the two types of systems. Synchronizing asynchronous inputs with a free running clock can cause well-known problems with metastability in the synchronization circuits. Stretchable clocks allow a clock cycle to expand dynamically in response to the metastability effects of sampling asynchronous inputs. We use an interface organization where the special circuitry for detecting metastability and for stretching the clock that is delivered to the synchronous part of the system is encapsulated in a Q-flop-based interface. This provides a very convenient method for interfacing mixed systems, as the interface and clock generation circuitry are isolated into one special module, and neither the asynchronous nor the synchronous system need be modified internally to accommodate the interface. This is especially important when standard synchronous components are used as there is no opportunity to modify these parts. We show that this interface module is suitable for most mixed design needs and conclude with an example.

Josephson, Lueli↗

Temporal-Spatial Structure of Magnetic Merging at the Magnetopause Inferred from 557.7-nm All-Sky Images

We demonstrate that high-resolution 557.7-nm all-sky images are useful tools for investigating the spatial and temporal evolution of merging on the dayside magnetopause. Analysis of ground and satellite measurements leads us to conclude that high-latitude merging events can occur at multiple sites simultaneously and vary asynchronously on time scales of 30 s to 3 min. Variations of 557.7 nm emissions were observed at a 10 s cadence at Ny-Alesund on 19 December 2001, while significant changes in the IMF clock angle were reaching the magnetopause. The optical patterns are consistent with a scenario in which merging occurs around the rim of the high-latitude cusp at positions dictated by the IMF clock angle. Electrons energized at merging sites represent plausible sources for 557.7 nm emissions in the cusp. Polar observations at the magnetopause have directly linked enhanced fluxes of > or = 0.5 keV electrons with merging. Spectra of electrons responsible for some of the emissions, measured during a DMSP F15 overflight, exhibit "inverted-V" features, indicating further acceleration above the ionosphere. SuperDARN spectral width boundaries, characteristic of open-closed field line transitions, are located at the equatorward edge of the 557.7nm emissions. Optical data suggest that with IMF B(sub Y) > 0, the Northern Hemisphere cusp divides into three source regions. When the IMF clock angle was approx. 150 deg structured 557.7-nm emissions came from east of the 13:00 MLT meridian. At larger clock angles the emissions appeared between 12:00 and 13:00 MLT. No significant 557.7-nm emissions were detected in the prenoon MLT sector. MHD simulations corroborate our scenario, showing that with the observed large dipole-tilt and IMF clock angles, merging sites develop near the front and eastern portions of the high-altitude cusp rim in the Northern Hemisphere and near the western part of the cusp rim in the Southern Hemisphere.

Maynard, N. C.↗

Rapid Corner Detection Using FPGAs

In order to perform precision landings for space missions, a control system must be accurate to within ten meters. Feature detection applied against images taken during descent and correlated against the provided base image is computationally expensive and requires tens of seconds of processing time to do just one image while the goal is to process multiple images per second. To solve this problem, this algorithm takes that processing load from the central processing unit (CPU) and gives it to a reconfigurable field programmable gate array (FPGA), which is able to compute data in parallel at very high clock speeds. The workload of the processor then becomes simpler; to read an image from a camera, it is transferred into the FPGA, and the results are read back from the FPGA. The Harris Corner Detector uses the determinant and trace to find a corner score, with each step of the computation occurring on independent clock cycles. Essentially, the image is converted into an x and y derivative map. Once three lines of pixel information have been queued up, valid pixel derivatives are clocked into the product and averaging phase of the pipeline. Each x and y derivative is squared against itself, as well as the product of the ix and iy derivative, and each value is stored in a WxN size buffer, where W represents the size of the integration window and N is the width of the image. In this particular case, a window size of 5 was chosen, and the image is 640 480. Over a WxN size window, an equidistance Gaussian is applied (to bring out the stronger corners), and then each value in the entire window is summed and stored. The required components of the equation are in place, and it is just a matter of taking the determinant and trace. It should be noted that the trace is being weighted by a constant k, a value that is found empirically to be within 0.04 to 0.15 (and in this implementation is 0.05). The constant k determines the number of corners available to be compared against a threshold sigma to mark a valid corner. After a fixed delay from when the first pixel is clocked in (to fill the pipeline), a score is achieved after each successive clock. This score corresponds with an (x,y) location within the image. If the score is higher than the predetermined threshold sigma, then a flag is set high and the location is recorded.

Morfopoulos, Arin C.↗

Computer Program Recognizes Patterns in Time-Series Data

A computer program recognizes selected patterns in time-series data like digitized samples of seismic or electrophysiological signals. The program implements an artificial neural network (ANN) and a set of N clocks for the purpose of determining whether N or more instances of a certain waveform, W, occur within a given time interval, T. The ANN must be trained to recognize W in the incoming stream of data. The first time the ANN recognizes W, it sets clock 1 to count down from T to zero; the second time it recognizes W, it sets clock 2 to count down from T to zero, and so forth through the Nth instance. On the N + 1st instance, the cycle is repeated, starting with clock 1. If any clock has not reached zero when it is reset, then N instances of W have been detected within time T, and the program so indicates. The program can readily be encoded in a field-programmable gate array or an application-specific integrated circuit that could be used, for example, to detect electroencephalographic or electrocardiographic waveforms indicative of epileptic seizures or heart attacks, respectively.

Hand, Charles↗

A Timer for Synchronous Digital Systems

The Real-Time Interferometer Control Systems Testbed (RICST) timing board is a VersaModule Eurocard (VME)-based board that can generate up to 16 simultaneous, phase-locked timing signals at a rate defined by the user. It can also generate all seven VME interrupt requests (IRQs). The RICST timing board is suitable mainly for robotic, aerospace, and real-time applications. Several circuit boards on the market are capable of generating periodic IRQs. Most are associated with Global Positioning System (GPS) receivers and Inter Range Instrumentation Group (IRIG) time-code generators, whereas this board uses either an internal VME clock or an externally generated clock signal to synchronize multiple components of the system. The primary advantage of this board is that there is no discernible jitter in the output clock waveforms because the signals are divided down from a high-frequency clock signal instead of being phase-locked from a lower frequency. The primary disadvantage to this board, relative to other periodic-IRQ-generating boards, is that it is more difficult to synchronize the system to wall clock time.

McKenney, Elizabeth↗

Launch Support Video Site

The goal of this project is to create a website that displays video, countdown clock, and event times to customers during launches, without needing to be connected to the internal operations network. The requirements of this project are to also minimize the delay in the clock and events to be less than two seconds. The two parts of this are the webpage, which will display the data and videos to the user, and a server to send clock and event data to the webpage. The webpage is written in HTML with CSS and JavaScript. The JavaScript is responsible for connecting to the server, receiving new clock data, and updating the webpage. JavaScript is used for this because it can send custom HTTP requests from the webpage, and provides the ability to update parts of the webpage without having to refresh the entire page. The server application will act as a relay between the operations network, and the open internet. On the operations network side, the application receives multicast packets that contain countdown clock and events data. It will then parse the data into current countdown times and events, and create a packet with that information that can be sent to webpages. The other part will accept HTTP requests from the webpage, and respond to them with current data. The server is written in C# with some C++ files used to define the structure of data packets. The videos for the webpage will be shown in an embedded player from UStream.

OFarrell, Zachary L.↗

A Trilateration Scheme for Relative Positioning

We introduce a trilateration scheme that evaluates the 3-dimensional (3-D) relative position between a reference spacecraft and a target spacecraft using raw-range measurements from a distance baseline of known locations, which we call “anchors”. The anchors can be antennas of a ground-based network (e.g., Deep Space Network (DSN) or Near Earth Network (NEN) stations), or satellites of a spacebased network (e.g., global positioning system (GPS) or tracking and data relay satellite (TDRS)). We define raw-range as the range that includes all the systematic errors that occur during range measurements. A unique feature of this approach is that accurate relative position is derived from a “differencing function” of raw-range measurements of the reference spacecraft and target spacecraft, thereby eliminating most of the systematic errors, such as media effects, ephemeris errors, instrument delays, clock bias, etc. There can be an arbitrary number of target spacecraft, and relative positioning of target spacecraft with respect to the reference spacecraft can be done simultaneously. In this paper, we first assume an idealized system in which clocks on the reference and target spacecraft are synchronized, with clocks of the anchors synchronized as well. We develop a novel iterative algorithm that computes the relative position of the target spacecraft with respect to the reference spacecraft. We illustrate the relative positioning method using the scenario of a network of three ground stations (i.e., the anchors) at Goldstone, California, USA, Madrid, Spain, and Marlargue, Argentina tracking two spacecraft at geosynchronous orbit distance. We demonstrate that the algorithm converges to submeter accuracy in estimating the relative position, in the presence of random errors and systematic errors in raw-range measurements, and in the presence of angular errors in estimating the pointing vectors between the anchors and the reference spacecraft. Next, we relax the requirement of perfect time synchronization between spacecraft, and show that by using an additional anchor, one can estimate and remove the clock biases between the reference and target spacecraft. We add a ground station at Kourou to the above example of three ground stations of Goldstone, Madrid, and Marlargue, and demonstrate that the updated algorithm also converges to meter-level accuracy (submeter in some cases) in the presence of clock biases in addition to the random errors, systematic errors, and angular errors as shown in the above case. We compare this scheme with a similar trilateration scheme for relative positioning scheme first proposed by Montenbruck in 2002.

Cheung, Kar-Ming↗

NIMBUS COMMAND SUBSYSTEM

All satellites have one common requirement, known as the command facility. This is usually a real-time direct RF link from a ground transmitter through the satellite receiver and decoder to a relay or controlled circuit. The more sophisticated research and operational satellites require a command facility which will permit storing of commands to activate systems at predetermined future times when the satellite is beyond the range of the command ground station. These satellites require an accurate clock and a source of precision frequencies. In the Nimbus spacecraft, all these functions are performed by an integrated command and clock subsystem, which includes the command clock and clock-receiver modules in the spacecraft, plus the associated command ground station. This paper will describe the functions and features of these various equipment's.

GROUND SUPPORT SYSTEM↗

Numerical computer peripheral interactive device with manual controls

A computer peripheral device is disclosed which includes a joystick whose displacement from a counter position along two axes X and Y in either a plus (+) or a minus (-) direction is sensed. The displacement magnitude in either direction controls the rate of clock pulses provided by a variable frequency clock. The clock pulses from the two clocks are accumulated in two separate counters, whose contents are displayed. The contents of the counters are suppliable to a computer to update the contents of specific cells which define the position of a cursor on a display which is under computer control.

Zygielbaum, A. I.↗

Four phase logic systems

A four-phase logic system is provided which includes at least four logic networks connected in parallel between a single power line and a reference potential. A four-phase clock generator generates four distinct clock signals from a single-phase clock input at data rate. Each logic network comprises a pair of complementary metal-oxide-semiconductor integrated transistors (CMOST). Each metal-oxide-Semiconductor transistor (MOST) in the pair is responsive to a clock signal which turns the transistor on or off. In each network, there is also at least one MOST which is responsive to a logic signal. The logic transistor is connected in cascade with the pair of CMOSTs.

Petersen, H. L.↗

Common time in a four-dimensional symmetry framework

Following the ideas of Poincare, Reichenbach, and Grunbaum concerning the convention of setting up clock systems, clock systems and light propagation are analyzed within the framework of four-dimensional symmetry. It is possible to construct a new four-dimensional symmetry framework incorporating common time: observers in different inertial frames of reference use one and the same clock system, which is located in any one of the frames. Consequently, simultaneity has a meaning independent of position and independent of frame of reference. A further consequence is that the two-way speeds of light alone are isotropic in any frame. By the choice of clock system there will be one frame in which the one-way speed of light is isotropic. This frame can be arbitrarily chosen. The difference between one-way speeds and two-way speeds of light signals is considered in detail.

Hsu, J. P.↗

Variations in propagation delay times for line ten (TV) based time transfers

Variation in the propagation delay for a 30 km TV (Line Ten) radio link was evaluated for a series of 30 independent measurements. Time marks from TV Channel 5 WTTG in Washington, D.C. were simultaneously measured at the Johns Hopkins University Applied Physics Laboratory and at the United States Naval Observatory against each stations' local cesium standard clocks. Differences in the stations' cesium clocks were determined by portable cesium clock transfers. Thirty independent timing determinations were made. The root mean square deviation in the propagation delay calculated from the timing determinations was 11 ns. The variations seen in the propagation delays are believed to be caused by environmental factors and by errors in the portable clock timing measurements. In correlating the propagation delay variations with local weather conditions, only a moderate dependence on air temperature and absolute humidity was found.

Chiu, M. C.↗

Investigations of laser pumped gas cell atomic frequency standard

The performance characteristics of a rubidium gas cell atomic frequency standard might be improved by replacing the standard rubidium discharge lamp with a single mode laser diode. Aspects of the laser pumped gas cell atomic clock studied include effects due to laser intensity, laser detuning, and the choice of the particular atomic absorption line. Results indicate that the performance of the gas cell clock may be improved by judicious choice of the operating parameters of the laser diode. The laser diode also proved to be a valuable tool in investigating the operation of the conventional gas cell clock. Results concerning linewidths, the light shift effect and the effect of isotopic spin exchange in the conventional gas cell clock are reported.

Volk, C. H.↗

Fast Asynchronous Data Communication Via Fiber Optics

Transmitter and receiver devised for asynchronous digital communication via optical fiber at rates above 100 Mb/s. Transmitter converts parallel data to serial for high-speed transmission; receiver recovers clock signal and converts data back to parallel. No phase-lock loops used. New receiver design avoids over-sampling altogether. Local sampling oscillator operating nominally at clock frequency generates N clock signals of equally spaced phase, used to clock incoming data into N separate shift registers.

Bergman, Larry A.↗

Optical Communication with Semiconductor Laser Diode

Theoretical and experimental performance limits of a free-space direct detection optical communication system were studied using a semiconductor laser diode as the optical transmitter and a silicon avalanche photodiode (APD) as the receiver photodetector. Optical systems using these components are under consideration as replacements for microwave satellite communication links. Optical pulse position modulation (PPM) was chosen as the signal format. An experimental system was constructed that used an aluminum gallium arsenide semiconductor laser diode as the transmitter and a silicon avalanche photodiode photodetector. The system used Q=4 PPM signaling at a source data rate of 25 megabits per second. The PPM signal format requires regeneration of PPM slot clock and word clock waveforms in the receiver. A nearly exact computational procedure was developed to compute receiver bit error rate without using the Gaussion approximation. A transition detector slot clock recovery system using a phase lock loop was developed and implemented. A novel word clock recovery system was also developed. It was found that the results of the nearly exact computational procedure agreed well with actual measurements of receiver performance. The receiver sensitivity achieved was the closest to the quantum limit yet reported for an optical communication system of this type.

Davidson, Frederic↗

Long Duration Exposure Facility (LDEF) attitude measurements of the interplanetary dust experiment

The Long Duration Exposure Facility (LDEF) Interplanetary Dust Experiment (IDE) was unique in providing a time history of impacts of micron-sized particles on six orthogonal faces of LDEF during the first year in orbit. The value of this time resolved data depended on and was enhanced by the proper operation of some basic LDEF systems. Thus, the value of the data is greatly enhanced when the location and orientation of LDEF is known for each time of impact. The location and velocity of LDEF as a function of time can be calculated from the 'two-line elements' published by GSFC during the first year of the LDEF mission. The attitude of LDEF was passively stabilized in a gravity-gradient mode and a magnetically anchored viscous damper was used to dissipate roll, pitch, and yaw motions. Finally, the IDE used a standard LDEF Experiment Power and Data System (EPDS) to collect and store data and also to provide a crystal derived clock pulse (1 count every 13.1072 seconds) for all IDE time measurements. All that remained for the IDE was to provide a system to calibrate the clock, eliminating accumulative errors, and also verify the attitude of LDEF. The IDE used solar cells on six orthogonal faces to observe the LDEF sunrise and provide data about the LDEF attitude. The data was recorded by the EPDS about 10 times per day for the first 345 days of the LDEF mission. This data consist of the number of IDE counts since the last LDEF sunrise and the status of the six solar cells (light or dark) at the time of the last IDE count. The EPDS determined the time that data was recorded and includes, with each record, the master EPDS clock counter (1 count every 1.6384 seconds) that provided the range and resolution for time measurements. The IDE solar cells provided data for an excellent clock calibration, meeting their primary purpose, and the time resolved LDEF attitude measurements that can be gleaned from this data are presented.

Kassel, Philip C., Jr.↗

Special purpose parallel computer architecture for real-time control and simulation in robotic applications

This is a real-time robotic controller and simulator which is a MIMD-SIMD parallel architecture for interfacing with an external host computer and providing a high degree of parallelism in computations for robotic control and simulation. It includes a host processor for receiving instructions from the external host computer and for transmitting answers to the external host computer. There are a plurality of SIMD microprocessors, each SIMD processor being a SIMD parallel processor capable of exploiting fine grain parallelism and further being able to operate asynchronously to form a MIMD architecture. Each SIMD processor comprises a SIMD architecture capable of performing two matrix-vector operations in parallel while fully exploiting parallelism in each operation. There is a system bus connecting the host processor to the plurality of SIMD microprocessors and a common clock providing a continuous sequence of clock pulses. There is also a ring structure interconnecting the plurality of SIMD microprocessors and connected to the clock for providing the clock pulses to the SIMD microprocessors and for providing a path for the flow of data and instructions between the SIMD microprocessors. The host processor includes logic for controlling the RRCS by interpreting instructions sent by the external host computer, decomposing the instructions into a series of computations to be performed by the SIMD microprocessors, using the system bus to distribute associated data among the SIMD microprocessors, and initiating activity of the SIMD microprocessors to perform the computations on the data by procedure call.

Fijany, Amir↗

Timing in private digital telecommunication networks

For proper operation of today's large digital private networks, high quality synchronization must be achieved. A general telecommunication performance objective is to maintain long-term frequency accuracy of ten parts per trillion at all synchronous digital equipment in the network. Many times, however, this is not achieved in private networks. Low quality clocks, errored transmission facilities, and incorrectly designed synchronization plans are often cause for poor performance. It is shown that properly-designed private networks can operate with long term frequency averages between ten parts per trillion to ten parts per million. These performance levels can adversely impact customer applications. The most demanding applications are digital and voice band data, encrypted voice, facsimile, and video. In a typical private network operating at 0.01 parts per million, the user would experience reduced data throughput, dropped encrypted calls, unreadable facsimile pages, or interrupted video transmission dozens of times per day. The major contribution to poor private network synchronization performance is the interaction of Customer Premises Equipment (CPE) clocks and the network facilities used to distribute timing. The performance of typical CPE clocks and facilities, and their impact on customer applications, are discussed. CPE clock performance issues, along with private network architectural constraints, make synchronization planning extremely difficult. Planning is usually costly and requires specialized expertise.

Abate, J. E.↗