SEARCH · Engineering Papers
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Circuit reduces intermittent fan-flutter openings in airflow switch. Circuit ignores brief switch openings due to contact oscillations; however, if switch is open longer than selected interval, control circuit shuts down system and sounds alarm.
Simple circuit when combined with pulse detector detects momentary interruptions of 400-cycle ac signal. Circuit has been used during shock and vibration testing of electronic hardware to determine if tests caused interruptions of normal circuit operation.
A 50 MHz CCD integrated circuit is described that was developed for use in transient analog signal recorders to sample and time expand transient signals. The integrated circuit achieves an effective 200 MHz sample rate by using four 32 stage peristaltic CCDs to sample the transient signal four times each clock period. Dual frequency, 4 phi clocking is used to sample and time expand the sampled data. The output signals of the four CCDs are multiplexed on chip into a single low frequency output data line. When operated with 50 MHz/165 KHz 4 phi clocks, this circuit has a 200 MHz sample rate, a record length of 640 nanoseconds, a time expansion factor of 303, and overall signal to noise ratio of 40:1. The signal to noise ratio is limited by fixed pattern noise of the four CCDs.
In technique, voice circuits connecting crew's cabin to launch station through umbilical connector disconnect automatically unused, or deadened portion of circuits immediately after vehicle is launched, eliminating possibility that unused wiring interferes with voice communications inside vehicle or need for manual cutoff switch and its associated wiring. Technique is applied to other types of electrical actuation circuits, also launch of mapped vehicles, such as balloons, submarines, test sleds, and test chambers-all requiring assistance of ground crew.
Simpler than diffusion fabrication, ion bombardment produces complementary-metal-oxide-semiconductor / silicon-on-sapphire (CMOS/SOS) circuits that are one-third faster. Ion implantation simplifies the integrated circuit fabrication procedure and produces circuits with uniform characteristics.
Integrated sensing circuits were designed, fabricated, and packaged for use in determining the direction and fluence of ionizing radiation passing through a multiwire proportional chamber. CMOS on sapphire was selected because of its high speed and low power capabilities. The design of the proposed circuits is described and the results of computer simulations are presented. The fabrication processes for the CMOS on sapphire sensing circuits and hybrid substrates are outlined. Several design options are described and the cost implications of each discussed. To be most effective, each chip should handle not more than 32 inputs, and should be mounted on its own hybrid substrate.
A circuit deriving an output voltage that is proportional to the logarithm of a dc input voltage susceptible to wide variations in amplitude includes a constant current source which forward biases a diode so that the diode operates in the exponential portion of its voltage versus current characteristic, above its saturation current. The constant current source includes first and second, cascaded feedback, dc operational amplifiers connected in negative feedback circuit. An input terminal of the first amplifier is responsive to the input voltage. A circuit shunting the first amplifier output terminal includes a resistor in series with the diode. The voltage across the resistor is sensed at the input of the second dc operational feedback amplifier. The current flowing through the resistor is proportional to the input voltage over the wide range of variations in amplitude of the input voltage.
Inductorless tuned circuit functions as filter, amplifier, or oscillator at radio frequencies. Circuit is based on two directly-coupled transistors operated at their transition frequency and fabricated as integrated circuit on single silicon chip.
A module failure isolation circuit is described which senses and averages the collector current of each paralled inverter power transistor and compares the collector current of each power transistor the average collector current of all power transistors to determine when the sensed collector current of a power transistor in any one inverter falls below a predetermined ratio of the average collector current. The module associated with any transistor that fails to maintain a current level above the predetermined radio of the average collector current is then shut off. A separate circuit detects when there is no load, or a light load, to inhibit operation of the isolation circuit during no load or light load conditions.
A microwave integrated circuit comprised of one or more Josephson junctions and short sections of microstrip or stripline transmission line is fabricated from thin layers of superconducting metal on a dielectric substrate. The short sections of transmission are combined to form the elements of the circuit and particularly, two microwave resonators. The Josephson junctions are located between the resonators and the impedance of the Josephson junctions forms part of the circuitry that couples the two resonators. The microwave integrated circuit has an application in Josephson voltage standards. In this application, the device is asymmetrically driven at a selected frequency (approximately equal to the resonance frequency of the resonators), and a d.c. bias is applied to the junction. By observing the current voltage characteristic of the junction, a precise voltage, proportional to the frequency of the microwave drive signal, is obtained.
In a push-pull converter, switching transistors are protected from peak power stresses by a separate snubber circuit in parallel with each comprising a capacitor and an inductor in series, and a diode in parallel with the inductor. The diode is connected to conduct current of the same polarity as the base-emitter juction of the transistor so that energy stored in the capacitor while the transistor is switched off, to protect it against peak power stress, discharges through the inductor when the transistor is turned on, and after the capacitor is discharges through the diode. To return this energy to the power supply, or to utilize this energy in some external circuit, the inductor may be replaced by a transformer having its secondary winding connected to the power supply or to the external circuit.
Versatile circuit accepts and distributes TV audio signals. Three-meter audio distribution and monitoring circuit provides flexibility in monitoring, mixing, and distributing audio inputs and outputs at various signal and impedance levels. Program material is simultaneously monitored on three channels, or single-channel version built to monitor transmitted or received signal levels, drive speakers, interface to building communications, and drive long-line circuits.
Engineering design tools that can be used to predict the development of absolute and differential potentials by realistic spacecraft under geomagnetic substorm conditions are described. Two types of analyses are in use: (1) the NASCAP code, which computes quasistatic charging of geometrically complex objects with multiple surface materials in three dimensions; (2) lumped element equivalent circuit models that are used for analyses of particular spacecraft. The equivalent circuit models require very little computation time, however, they cannot account for effects, such as the formation of potential barriers, that are inherently multidimensional. Steady state potentials of structure and insulation are compared with those resulting from the equivalent circuit model.
The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.
A circuit model for an existing silicon integrated bipolar junction transistor (IBJT) is used to evaluate presently achievable high frequency circuit performance. The relationship between circuit model and processing parameters are semi-quantitatively explored to make predictions on the frequency response, which can be achieved through realistic device fabrication modifications. A new figure of merit is introduced, which is defined as the signal frequency at which an integrated bipolar junction transistor can deliver a power gain of G. The most sensitive parameter influencing attainable high frequency IBJT performance is base resistance.
Integrated circuit (IC) flip-flop resolving time parameters are measured by wafer probing, without need of dicing or bonding, throught the incorporation of test structures on an IC together with the flip-flop to be measured. Several delays that are fabricated as part of the test circuit, including a voltage-controlled delay with a resolution of a few picosecs, are calibrated as part of the test procedure by integrating them into, and out of, the delay path of a ring oscillator. Each of the delay values is calculated by subtracting the period of the ring oscillator with the delay omitted from the period with the delay included. The delay measurement technique is sufficiently general for other applications. The technique is illustrated for the case of the flip-flop parameters of a 5-micron feature size NMOS circuit.
Cost of one-of-a-kind circuit board reduced. Circuits assembled quickly by using prototyping board in conjunction with copper-clad circuit board that has same hole pattern.
The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced.