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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28

Unified description of DGLAP, CSS, and BFKL evolution: TMD factorization bridging large and small x

This paper introduces a transverse-momentum dependent (TMD) factorization scheme designed to unify both large and small Bjorken-x regimes. We compute the next-to-leading order quantum chromodynamics (QCD) corrections to the gluon TMD operator for an unpolarized hadron within this proposed scheme. This leads to the emergence of a new TMD evolution, incorporating those in transverse momentum, rapidity, and Bjorken-x. When matched to the collinear factorization scheme, our factorization scheme faithfully reproduces the well-established Dokshitzer-Gribov-Lipatov-Altarelli-Parisi and Collins-Soper-Sterman (CSS) evolutions. Conversely, matching with high-energy factorization not only yields the Balitsky-Fadin-Kuraev-Lipatov evolution but also reveals distinctive signatures of CSS logarithms. The development of this novel TMD factorization scheme, capable of seamlessly reconciling disparate Bjorken-x regimes and faithfully reproducing established QCD evolution equations, has the potential to significantly advance our comprehension of high-energy processes and three-dimensional parton structures of hadrons. Published by the American Physical Society 2024

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

Bridging hadronic and vacuum structure by heavy quarkonia

We discuss the central and, mostly, spin-dependent potentials in heavy quarkonia $\overline{b}$$b$,$\overline{c}$$c$, with two goals in mind. The first is phenomenological: using the splitting between the 1S and 2S pairs, as well as the 1P and 2P quartet masses, we obtain pertinent matrix elements of all these potentials. The second is theoretical: using standard wave functions, we compute these matrix elements, quantifying the perturbative, nonperturbative and “string” contributions. The model for nonperturbative effects is a “dense instanton liquid model,” in which the QCD vacuum is made mostly of (strongly color correlated) instanton-anti-instanton pairs or “molecules.” Their contributions are calculated via standard Wilson lines, with or without extra powers of gauge fields. We find a reasonable description of all central, spin-spin, and spin-orbit forces at distances 𝑟 = 0–0.7 fm, relevant for $\overline{b}$$b$ and $\overline{c}$$c$ quarkonia.

Bound states↗

Bridging length scales in hard materials with ultra-small angle X-ray scattering – a critical review

Owing to their exceptional properties, hard materials such as advanced ceramics, metals and composites have enormous economic and societal value, with applications across numerous industries. Understanding their microstructural characteristics is crucial for enhancing their performance, materials development and unleashing their potential for future innovative applications. However, their microstructures are unambiguously hierarchical and typically span several length scales, from sub-ångstrom to micrometres, posing demanding challenges for their characterization, especially for in situ characterization which is critical to understanding the kinetic processes controlling microstructure formation. This review provides a comprehensive description of the rapidly developing technique of ultra-small angle X-ray scattering (USAXS), a nondestructive method for probing the nano-to-micrometre scale features of hard materials. USAXS and its complementary techniques, when developed for and applied to hard materials, offer valuable insights into their porosity, grain size, phase composition and inhomogeneities. We discuss the fundamental principles, instrumentation, advantages, challenges and global status of USAXS for hard materials. Using selected examples, we demonstrate the potential of this technique for unveiling the microstructural characteristics of hard materials and its relevance to advanced materials development and manufacturing process optimization. We also provide our perspective on the opportunities and challenges for the continued development of USAXS, including multimodal characterization, coherent scattering, time-resolved studies, machine learning and autonomous experiments. Our goal is to stimulate further implementation and exploration of USAXS techniques and inspire their broader adoption across various domains of hard materials science, thereby driving the field toward discoveries and further developments.

36 MATERIALS SCIENCE↗

High-Efficiency Model Predictive Control for Star-Connected Cascaded H-Bridge STATCOM Under Unbalanced Conditions

This paper presents a high-efficiency model predictive control (HMPC), which is enabled by a sorting approach based on dc capacitor voltages to significantly reduce the exponentially-increasing switching states in cascaded Hbridge (CHB) converters. In addition, a generic discrete-time prediction model for star-connected CHB static synchronous compensator is proposed to address the issues due to either grid and/or load unbalances. Both simulation and hardware-in-loop experimental results are presented to validate the feasibility and effectiveness of the proposed HMPC strategy.

Li, Yufei↗

Efficiency Optimization of Dual Active Bridge Converter Based on dV/dt Snubber Capacitors

This paper presents a lossless regenerative dV/dt snubber circuit for PWM converters to achieve high-efficiency high power-density without significant cost and reliability penalties. The dV/dt snubber employs lossless capacitors for each MOSFET device in a converter to provide an additional path to store the switching energy during turn-off transient and decrease the actual turn-off loss of the MOSFET channel. A novel mathematical turn-off loss model is built to separate the actual turn-off loss of the MOSFET channel and the recycling switching energy stored in the total equivalent output capacitance including Coss, the dV/dt snubber, and etc. Necessary snubber optimization strategy is proposed in order to balance the turn-off loss with ZVS operation range and deadtime conduction loss, and thereby achieving an optimal efficiency performance. To prove the validity and accuracy of the novel turn-off loss model and optimization strategy, the dV/dt snubber has been incorporated into a 1.3kV/200kW DC/DC and a 1kV/70kVA DC/AC PWM converters. Experimental results are given to demonstrate the validity of the proposed dV/dt snubber capacitors and optimization strategy.

Xu, Wei↗

Active Fault Current Limiting Control for Half-Bridge MMC in HVDC Systems

DC faults of MMC can result in a significantly large fault current due to the discharge of submodule capacitors. The fault current not only risks damaging the MMC but also demands a considerable breaking capacity from the dc circuit breaker (DCCBs). This paper introduces two novel active fault current limiting methods (AFCLs), namely virtual impedance-based and energy control-based AFCL. The first method utilizes circulating current feedforward, which introduces a virtual arm impedance to suppress the rate of rise of the fault current. Meanwhile, the second method relies on the control of the internally stored energy of the MMC to automatically minimize the number of submodules that discharge during a dc-side fault. Therefore, both the dc-side current and the MMC arm current can be effectively suppressed after the occurrence of the fault. The proposed methods do not require fault detection and their response is proportional to the rate of rise in the fault current. Simulation case studies are presented to demonstrate the proposed methods.

active current limiting control↗

Bridging the Gap Between LLMs and LNS with Dynamic Data Format and Architecture Codesign

Deep neural networks (DNNs) have achieved tremendous success in the past few years. However, their training and inference demand exceptional computational and memory resources. Quantization has been shown as an effective approach to mitigate the cost, with the mainstream data types reduced from FP32 to FP16/BF16 and recently FP8 in the latest NVIDIA H100 GPUs. With increasingly aggressive quantization, however, the conventional floating-point formats suffer from limited precision in representing numbers around zero. Recently, NVIDIA demonstrated the potential of using a Logarithmic Number System (LNS) for the next generation of tensor cores. While LNS mitigates the hurdles in representing small numbers, in this work we observed a mismatch between LNS and the emerging Large Language Models (LLM), where LLM exhibits significant outliers when directly adopting the LNS format. In this paper, we present a data-format/architecture codesign to bright this gap. On the format side, we propose a dynamic LNS format to flexibly represent outliers at a higher precision, by exploiting asymmetry in the LNS representation and identifying outliers through a per-vector basis. On the architecture side, for demonstration, we realize the dynamic LNS format in a systolic array, which can handle the irregularity of the outliers at runtime. We implement our approach on an Alveo U280 FPGA as a prototype. Experimental results show that our design can effectively handle the outliers and resolve the mismatch between LNS and LLM, contributing to an accuracy improvement of 15.4% and 16% over the floating-point and the original LNS baselines, using four state-of-the-art LLM models. Our observation and design lay a solid foundation for the large-scale adoption of the LNS format in the next-generation deep learning hardware.

Haghi, Pouya↗

Bridging Python to Silicon: The SODA Toolchain

Systems performing scientific computing, data analysis, and machine learning tasks have a growing demand for application-specific accelerators that can provide high computational performance while meeting strict size and power requirements. However, the algorithms and applications that need to be accelerated are evolving at a rate that is incompatible with manual design processes based on hardware description languages. Agile hardware design tools based on compiler techniques can help by quickly producing an application-specific integrated circuit (ASIC) accelerator starting from a high-level algorithmic description. Here, we present the software-defined accelerator (SODA) synthesizer, a modular and open-source hardware compiler that provides automated end-to-end synthesis from high-level software frameworks to ASIC implementation, relying on multilevel representations to progressively lower and optimize the input code. Our approach does not require the application developer to write any register-transfer level code, and it is able to reach up to 364 giga floating point operations per second (GFLOPS)/W efficiency (32-bit precision) on typical convolutional neural network operators.

97 MATHEMATICS AND COMPUTING↗

Operation of Dual-T-Type Modular Multilevel Converter for Uninterrupted Power Supply Under Bridge Failures

Dual-T-type modular multilevel converter (DTMMC) is an alternative to the existing uninterrupted power supply (UPS) due to its advantage in flexible leg reusing, multiple power ports, and high operating efficiency. Here, in this article, a DTMMC-UPS, which has series configurations on both input/output ac sides, obtains high-voltage grid/load accessing interfaces is presented. In the described system, the fact that copies of T-type legs are employed makes semiconductor failure common to happen. Moreover, both the coupling between rectifier and inverter conversions and the confliction between intercell and inner-cell voltage balancing make fault-tolerant control a tough issue. In this article, the switch fault types are first clarified and diagnosed by the different impacts on normal operation. An improved voltage vector modulation is then deduced to facilitate the planning of proper primary switching patterns, to achieve rectifier side normal operation. The secondary alternated level-shifted pulsed-width modulation (LS-PWM) is also modified to achieve inverter side normal operation. The experiment results are supplied to verify the validity of the modulation-coordinated fault toleration strategy.

42 ENGINEERING↗