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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28
All sourcesNASA NTRSDOE OSTI
NASA NTRS2012

Rhombohedral cubic semiconductor materials on trigonal substrate with single crystal properties and devices based on such materials

Growth conditions are developed, based on a temperature-dependent alignment model, to enable formation of cubic group IV, group II-V and group II-VI crystals in the [111] orientation on the basal (0001) plane of trigonal crystal substrates, controlled such that the volume percentage of primary twin crystal is reduced from about 40% to about 0.3%, compared to the majority single crystal. The control of stacking faults in this and other embodiments can yield single crystalline semiconductors based on these materials that are substantially without defects, or improved thermoelectric materials with twinned crystals for phonon scattering while maintaining electrical integrity. These methods can selectively yield a cubic-on-trigonal epitaxial semiconductor material in which the cubic layer is substantially either directly aligned, or 60 degrees-rotated from, the underlying trigonal material.

Park, Yeonjoon↗
NASA NTRS2012

Estimation of Frequency Noise in Semiconductor Lasers Due to Mechanical Thermal Noise

We evaluate mechanical thermal noise in semiconductor lasers, applying a methodology developed for fixed-spacer cavities for laser frequency stabilization. Our simple model determines an underlying fundamental limit for the frequency noise of free-running semiconductor laser, and provides a framework: where the noise may be potentially reduced with improved design.

Numata, Kenji↗
NASA NTRS2018

Interconnection of Semiconductor Devices in Extreme Environment Microelectronic Integrated Circuit Chips

A process of fabrication and the resulting integrated circuit device is made of patterned metal electrical interconnections between semiconductor devices residing on and forming extremely harsh environment integrated circuit chips. The process enables more complicated wide band gap semiconductor integrated circuits with more than one level of interconnect to function for prolonged time periods (over 1000 hours) at much higher temperatures (500 C).

Spry, David J.↗
DOE OSTI2020

Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device. The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Hybrid semiconductor-piezoacoustic radiofrequency device

An amplifying radiofrequency device includes a piezoelectric film and a semiconductor amplifier layer. The piezoelectric film is conformed as an acoustic waveguide. The piezoelectric film has a principal acoustic propagation direction parallel to the principal conduction direction of the amplifier layer. Interdigitated transducers are positioned on the piezoelectric film to respectively launch an acoustic wave in response to an input RF signal, and transduce the acoustic wave back to an output RF signal. There is a distance of less than the acoustic wavelength between the semiconductor amplifier layer and the piezoelectric film. The piezoelectric film has a thickness of less than the acoustic wavelength. According to a method for making such a device, a stack of III-V layers is epitaxially grown on a III-V substrate, wherein the stack comprises a first etch stop layer, a second etch stop layer, an amplifier layer, and a contact layer. The stack is bonded to a lithium niobate film. The III-V substrate is removed by etching down to the first etch stop layer. Deposition windows are opened by etching from the first etch stop layer down to the contact layer. Metal contact electrodes are deposited in the deposition windows.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Gallium Oxide Techno-Economic Analysis for the Wide Bandgap Semiconductor Market: Preprint

More than 30% of electrical energy passes through power electronics today with speculation that in the next decade this could grow to 80%. The wide bandgap semiconductor market is already approaching $1 billon USD in 2019 and is projected to be almost $7 billion USD in 2028. Even with its high cost, SiC, is starting to dislodge the incumbent Si technology in some applications, such as hybrid and electric vehicles, due to smaller size, and higher efficiency. We review and report the IHS Markit’s market predictions for wide bandgap semiconductor technologies, and highlight the techno-economic analysis results for the manufacturing cost of Ga2O3 wafers. Specifically, we focus on the potential for Ga2O3 to be more economically advantageous than SiC using current manufacturing methods and then identify opportunities where research can further reduce the volume cost of Ga2O3 wafers.

economics↗
DOE OSTI2020

Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate

The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Apparatus and method to measure semiconductor optical absorption using microwave charge sensing

A time-resolved microwave reflectance apparatus comprises a pulsed or modulated optical source that irradiates a semiconductor sample with an excitation pump beam, a microwave oscillator that irradiates the sample with a continuous beam of microwaves, and a microwave detector that detects the microwaves reflected by the sample. Therefore, charge detection, rather than conventional absorption measurements (that detect the loss of photons), can be used to extract the absorption coefficient and band edge of a semiconductor material.

Shaner, Eric A.↗
DOE OSTI2021

Metal-based passivation-assisted plasma etching of III-v semiconductors

According to one embodiment, a method includes performing a plasma etching process on a masked III-V semiconductor, and forming a passivation layer on etched portions of the III-V semiconductor. The passivation layer includes at least one of a group III element and/or a metal from the following: Ni, Cr, W, Mo, Pt, Pd, Mg, Ti, Zr, Hf, Y, Ta, and Sc.

Harrison, Sara Elizabeth↗
DOE OSTI2022

Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device.The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

Matocha, Kevin↗
DOE OSTI2022

Simulating Energy and Security Interactions in Semiconductor Manufacturing: Insights from the Intel Minifab Model

Semiconductor manufacturing is a highly complex. Fabrication plants must deal with re-entrant flows to support multiple types of wafers being produced simultaneously, each with their own deadlines and specifications. The manufacturing process itself depends upon the ability to control and programmatically adjust a variety of environmental conditions including temperature, humidity, and air quality. In addition, wafer fabrication consumes large amounts of electricity. Emerging technologies may help reduce the energy footprint of such facilities but can introduce cybersecurity risks. Therefore, this paper presents a modeling and simulation framework to quantify tradeoffs between operational measures of performance, energy consumption, and cybersecurity controls. We augment the Intel Minifab model, with the Purdue Enterprise Reference Architecture (PERA) for cybersecurity as well as tool-level energy consumption data from a real-world semiconductor manufacturing testbed. In this manner, we intend to provide stakeholders with a systematic, data-driven approach to evaluate emerging risks within the manufacturing process.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗
DOE OSTI2023

Photonuclear transmutation doping in gallium-based semiconductor materials

The present invention relates to various high quality n-type and p-type doped gallium-based semiconductor materials, electronic components incorporating these materials, and processes of producing these materials. In particular, The present invention relates processes to achieve high quality, uniform doping of a whole wafer or a thin layer of gallium-based semiconductor materials for various applications such as a vertical power transistor or diode.

Kwon, Jae Wan↗
DOE OSTI2024

Integration of semiconductor membranes with piezoelectric substrates

Piezoelectrically actuated devices constructed from thin semiconductor membranes bonded directly to piezoelectric substrates are provided. Methods for fabricating these devices are also provided. The bonding of the semiconductor to the piezoelectric material does not require the use of any intermediate layers, such as bonding agents.

Lagally, Max G.↗
DOE OSTI2023

Effect of Molecular Weight on the Morphology of a Polymer Semiconductor–Thermoplastic Elastomer Blend

Abstract Polymer semiconductors (PSCs) are essential active materials in mechanically stretchable electronic devices. However, many exhibit low fracture strain due to their rigid chain conformation and the presence of large crystalline domains. Here, a PSC/elastomer blend, poly[((2,6‐bis(thiophen‐2‐yl)‐3,7‐bis(9‐octylnonadecyl)thieno[3,2‐b]thieno[2′,3′:4,5]thieno[2,3‐d]thiophene)‐5,5′‐diyl)(2,5‐bis(8‐octyloctadecyl)‐3,6‐di(thiophen‐2‐yl)pyrrolo[3,4‐c]pyrrole‐1,4‐dione)‐5,5′‐diyl]] (P2TDPP2TFT4) and polystyrene‐ block ‐poly(ethylene‐ran‐butylene)‐ block ‐polystyrene (SEBS) are systematically investigated. Specifically, the effects of molecular weight of both SEBS and P2TDPP2TFT4 on the resulting blend morphology, mechanical, and electrical properties are explored. In addition to commonly used techniques, atomic force microscopy‐based nanomechanical images are used to provide additional insights into the blend film morphology. Opposing trends in SEBS‐induced aggregation are observed for the different P2TDPP2TFT4 molecular weights upon increasing the SEBS molecular weight from 87 to 276 kDa. Furthermore, these trends are seen in device performance trends for both molecular weights of P2TDPP2TFT4. SEBS molecular weight also has a substantial influence on the mesoscale phase separation. Strain at fracture increases dramatically upon blending, reaching a maximum value of 640% ± 20% in the blended films measured with film‐on‐water method. These results highlight the importance of molecular weight for electronic devices. In addition, this study provides valuable insights into appropriate polymer selections for stretchable semiconducting thin films that simultaneously possess excellent mechanical and electrical properties.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Over What Length Scale Does an Inorganic Substrate Perturb the Structure of a Glassy Organic Semiconductor?

While the bulk structure of vapor-deposited glasses has been extensively studied, structure at buried interfaces has received little attention, despite being important for organic electronic applications. To learn about glass structure at buried interfaces, we study the structure of vapor-deposited glasses of the organic semiconductor DSA-Ph (1,4-di-[4-(N,N-diphenyl)amino]styrylbenzene) as a function of film thickness; the structure is probed with grazing incidence X-ray scattering. Here, we deposit on silicon and gold substrates and span a film thickness range of 10–600 nm. Our experiments demonstrate that interfacial molecular packing in vapor-deposited glasses of DSA-Ph is more disordered compared to the bulk. At a deposition temperature near room temperature, we estimate ~8 nm near the substrate can have modified molecular packing. Molecular dynamics simulations of a coarse-grained representation of DSA-Ph reveal a similar length scale. In both the simulations and the experiments, deposition temperature controls glass structure beyond this interfacial layer of a few nanometers.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Blending Ionic and Coordinate Bonds in Hybrid Semiconductor Materials: A General Approach toward Robust and Solution-Processable Covalent/Coordinate Network Structures

Inorganic semiconductor materials are best known for their superior physical properties, as well as their structural rigidity and stability. However, the poor solubility and solution-processability of these covalently bonded network structures has long been a serious drawback that limits their use in many important applications. Here, we present a unique and general approach to synthesize robust, solution-processable, and highly luminescent hybrid materials built on periodic and infinite inorganic modules. Structure analysis confirms that all compounds are composed of one-dimensional anionic chains of copper iodide (Cu m I m+2 2- ) coordinated to cationic organic ligands via Cu-N bonds. The choice of ligands plays an important role in the coordination mode (μ 1 -MC or μ 2 -DC) and Cu-N bond strength. Greatly suppressed nonradiative decay is achieved for the μ 2 -DC structures. Record high quantum yields of 85% (λ ex = 360 nm) and 76% (λ ex = 450 nm) are obtained for an orange-emitting 1D-Cu 4 I 6 (L 6 ). Temperature dependent PL measurements suggest that both phosphorescence and thermally activated delayed fluorescence contribute to the emission of these 1D-AIO compounds, and that the extent of nonradiative decay of the μ 2 -DC structures is much less than that of the μ1 -DC structures. More significantly, all compounds are remarkably soluble in polar aprotic solvents, distinctly different from previously reported CuI based hybrid materials made of charge-neutral Cu m X m (X = Cl, Br, I), which are totally insoluble in all common solvents. Finally, the greatly enhanced solubility is a result of incorporation of ionic bonds into extended covalent/coordinate network structures, making it possible to fabricate large scale thin films by solution processes

36 MATERIALS SCIENCE↗
DOE OSTI2024

Determination of electron-hole pair creation energy in Cd 0.9 Zn 0.1 Te 0.98 Se 0.02 quaternary semiconductor for room-temperature gamma-ray detection

We report the first-time measurement of the electron-hole pair (ehp) creation energy (W ehp ) in novel Cd 0.9 Zn 0.1 Te 0.98 Se 0.02 (CZTS) quaternary semiconductor. CZTS in single crystalline form is poised to be the future of large-volume room-temperature gamma-ray detectors due to its excellent compositional homogeneity with highly reduced defects, high-Z (atomic number) constituents, wide bandgap (1.6 eV), and superior charge transport properties. Despite a great deal of study of the material and device properties since its inception, the W ehp in CZTS has not been measured experimentally. Accurate determination of W ehp is essential for calibration of the spectrometer and other theoretical calculations. In this study we have used an absolute calibration approach, which is based on an iterative approach that yields the Wehp as the best-fit parameter. Using a 241 Am alpha emitting radioisotope and a planar CZTS detector, the Wehp in CZTS was calculated to be 4.47 eV. The obtained value has been validated by accurately predicting the peak energy for gamma rays emitted by a 137 Cs source and read by a CZTS detector with different dimensions. The dependences of the calculated W ehp value on the detector dimensions, type of interaction, and effect of charge trapping are also discussed.

42 ENGINEERING↗
DOE OSTI2022

Quaternary MgSiN 2 -GaN alloy semiconductors for deep UV applications

Ultrawide direct band gap semiconductors hold great promise for deep ultraviolet optoelectronic applications. Here we evaluate the potential of MgSiN 2 -GaN alloys for this purpose. Although MgSiN 2 itself has an indirect gap ~0.4 eV below its direct gap of ~6.5 eV, its different sign lattice mismatch from GaN in two different basal plane directions could avoid the tensile strain which limits Al x Ga 1–x N on GaN for high x. Two octet-rule-preserving structures (with space groups Pmn2 1 and P1n1) of a 50% alloy of MgSiN 2 and GaN are investigated and are both found to have gaps larger than 4.75 eV using quasiparticle self-consistent GW calculations. Both are nearly direct gap in the sense that the indirect gap is less than 0.1 eV lower than the direct gap. Furthermore, their mixing energies are positive yet small, with values of 8 (31) meV/atom for Pmn2 1 (P1n1), indicating only a small driving force toward phase separation.

36 MATERIALS SCIENCE↗