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At least 505 records · Page 28

Trends in reliability modeling technology for fault tolerant systems

Developments in reliability modeling for large fault tolerant avionic computing systems are presented. Issues of state size and complexity, fault coverage, and practical computation are addressed. A two-fold developmental effort is described based on the structural and fault coverage modeling approaches. A technique which was successfully applied to an 865 state pure death stationary Markov model is presented. Of particular interest is a short computer program which executes very quickly to produce reliability results of a large state space model. This model also incorporates fault coverage states for processor, memory, and bus line replaceable units. A second structural reliability modeling scheme is aimed at solving nonstationary Markov models. This technique provides the tool required for studying the reliability of systems with nonconstant failure rates and includes intermittent/transient faults, electronic hardware which exhibits decreasing failure rates, and hydromechanical devices which typically have wearout failure mechanisms. Several aspects of fault coverage, including modeling and data measurement of intermittent/transient faults and latent faults, are elucidated and illustrated. The CARE II (computer-aided reliability estimation) coverage is presented and shortcomings to be eliminated are discussed.

Bavuso, S. J.↗

Surface heat-transfer coefficients of finned cylinders

An investigation to determine and correlate the experimental surface heat-transfer coefficients of finned cylinders with different air-stream cooling arrangements was conducted at the Langley Memorial Aeronautical Laboratory from 1932 to 1938. The investigation covered the determination of the effect of fin width, fin space, fin thickness, and cylinder diameter on the heat transfer. Wind-tunnel tests were made in the free air stream with and without baffles and also with various devices for creating a turbulent air stream. Tests were also made with blower.

Ellerbrock, Herman H , Jr↗

Fault handling schemes in electronic systems with specific application to radiation tolerance and VLSI design

Naturally occurring space radiation particles can produce transient and permanent changes in the electrical properties of electronic devices and systems. In this work, the transient radiation effects on DRAM and CMOS SRAM were considered. In addition, the effect of total ionizing dose radiation of the switching times of CMOS logic gates were investigated. Effects of transient radiation on the column and cell of MOS dynamic memory cell was simulated using SPICE. It was found that the critical charge of the bitline was higher than that of the cell. In addition, the critical charge of the combined cell-bitline was found to be dependent on the gate voltage of the access transistor. In addition, the effect of total ionizing dose radiation on the switching times of CMOS logic gate was obtained. The results of this work indicate that, the rise time of CMOS logic gates increases, while the fall time decreases with an increase in total ionizing dose radiation. Also, by increasing the size of the P-channel transistor with respect to that of the N-channel transistor, the propagation delay of CMOS logic gate can be made to decrease with, or be independent of an increase in total ionizing dose radiation. Furthermore, a method was developed for replacing polysilicon feedback resistance of SRAMs with a switched capacitor network. A switched capacitor SRAM was implemented using MOS Technology. The critical change of the switched capacitor SRAM has a very large critical charge. The results of this work indicate that switched capacitor SRAM is a viable alternative to SRAM with polysilicon feedback resistance.

Attia, John Okyere↗

Nanoscale Deformable Optics

Several missions and instruments in the conceptual design phase rely on the technique of interferometry to create detectable fringe patterns. The intimate emplacement of reflective material upon electron device cells based upon chalcogenide material technology permits high-speed, predictable deformation of the reflective surface to a subnanometer or finer resolution with a very high degree of accuracy. In this innovation, a layer of reflective material is deposited upon a wafer containing (perhaps in the millions) chalcogenic memory cells with the reflective material becoming the front surface of a mirror and the chalcogenic material becoming a means of selectively deforming the mirror by the application of heat to the chalcogenic material. By doing so, the mirror surface can deform anywhere from nil to nanometers in spots the size of a modern day memory cell, thereby permitting realtime tuning of mirror focus and reflectivity to mitigate aberrations caused elsewhere in the optical system. Modern foundry methods permit the design and manufacture of individual memory cells having an area of or equal to the Feature (F) size of the design (assume 65 nm). Fabrication rules and restraints generally require the instantiation of one memory cell to another no closer than 1.5 F, or, for this innovation, 90 nm from its neighbor in any direction. Chalcogenide is a semiconducting glass compound consisting of a combination of chalcogen ions, the ratios of which vary according to properties desired. It has been shown that the application of heat to cells of chalcogenic material cause a large alteration in resistance to the range of 4 orders of magnitude. It is this effect upon which chalcogenidebased commercial memories rely. Upon removal of the heat source, the chalcogenide rapidly cools and remains frozen in the excited state. It has also been shown that the chalcogenide expands in volume because of the applied heat, meaning that the coefficient of expansion of chalcogenic materials is larger than 1. In this innovation, chalcogenidebased cells are addressed (as though they are a memory), and heated and cooled according to well-established criteria. In doing so, the exact size of chalcogenide cell deformation is known and predictable; therefore, the deformation of the reflective surface is, likewise, known and predictable. Control electronics can also be implemented so that a closed-loop feedback can be maintained. Changing the contents of the chalcogenide memory cells can compensate for any change in environmental effects that might cause a change in optical path. This real-time control provides significant control and stability in use conditions.

Strauss, Karl F.↗

The Impact on Space Radiation Requirements and Effects on ASIMS

The evolution of highly miniaturized electronic and mechanical systems will be accompanied by new problems and issues regarding the radiation response of these systems in the space environment. In this paper we discuss some of the more prominent radiation problems brought about by miniaturization. For example, autonomous micro-spacecraft will require large amounts of high density memory, most likely in the form of stacked, multichip modules of DRAM's, that must tolerate the radiation environment. However, advanced DRAM's (16 to 256 Mbit) are quite susceptible to radiation, particularly single event effects, and even exhibit new radiation phenomena that were not a problem for older, less dense memory chips. Another important trend in micro-spacecraft electronics is toward the use of low-voltage microelectronic systems that consume less power. However, the reduction in operating voltage also caries with it an increased susceptibility to radiation. In the case of application specific integrated microcircuits (ASIM's), advanced devices of this type, such as high density field programmable gate arrays (FPGA's) exhibit new single event effects (SEE), such as single particle reprogramming of anti-fuse links. New advanced bipolar circuits have been shown recently to degrade more rapidly in the low dose rate space environment than in the typical laboratory total dose radiation test used to qualify such devices. Thus total dose testing of these parts is no longer an appropriately conservative measure to be used for hardness assurance. We also note that the functionality of micromechanical Si-based devices may be altered due to the radiation-induced deposition of charge in the oxide passivation layers.

Barnes, C.↗

Electrically Variable or Programmable Nonvolatile Capacitors

Electrically variable or programmable capacitors based on the unique properties of thin perovskite films are undergoing development. These capacitors show promise of overcoming two important deficiencies of prior electrically programmable capacitors: Unlike in the case of varactors, it is not necessary to supply power continuously to make these capacitors retain their capacitance values. Hence, these capacitors may prove useful as components of nonvolatile analog and digital electronic memories. Unlike in the case of ferroelectric capacitors, it is possible to measure the capacitance values of these capacitors without changing the values. In other words, whereas readout of ferroelectric capacitors is destructive, readout of these capacitors can be nondestructive. A capacitor of this type is a simple two terminal device. It includes a thin film of a suitable perovskite as the dielectric layer, sandwiched between two metal or metal oxide electrodes (for example, see Figure 1). The utility of this device as a variable capacitor is based on a phenomenon, known as electrical-pulse-induced capacitance (EPIC), that is observed in thin perovskite films and especially in those thin perovskite films that exhibit the colossal magnetoresistive (CMR) effect. In EPIC, the application of one or more electrical pulses that exceed a threshold magnitude (typically somewhat less than 1 V) gives rise to a nonvolatile change in capacitance. The change in capacitance depends on the magnitude duration, polarity, and number of pulses. It is not necessary to apply a magnetic field or to cool the device below (or heat it above) room temperature to obtain EPIC. Examples of suitable CMR perovskites include Pr(1-x)Ca(x)MnO3, La(1-x)S-r(x)MnO3,and Nb(1-x)Ca(x)MnO3. Figure 2 is a block diagram showing an EPIC capacitor connected to a circuit that can vary the capacitance, measure the capacitance, and/or measure the resistance of the capacitor.

Shangqing, Liu↗

LED instrument approach instruction display

A display employing light emitting diodes (LED's) was developed to demonstrate the feasibility of such displays for presenting landing and navigation information to reduce the workload of general aviation pilots during IFR flight. The display consists of a paper tape reader, digital memory, control electronics, digital latches, and LED alphanumeric displays. A presentable digital countdown clock-timer is included as part of the system to provide a convenient means of monitoring time intervals for precise flight navigation. The system is a limited capability prototype assembled to test pilot reaction to such a device under simulated IFR operation. Pilot opinion indicates that the display is helpful in reducing the IFR pilots workload when used with a runway approach plate. However, the development of a compact, low power second generation display was recommended which could present several instructions simultaneously and provide information update capability. A microprocessor-based display could fulfill these requirements.

Meredith, B. D.↗

Flexible structure control laboratory development and technology demonstration

An experimental structure is described which was constructed to demonstrate and validate recent emerging technologies in the active control and identification of large flexible space structures. The configuration consists of a large, 20 foot diameter antenna-like flexible structure in the horizontal plane with a gimballed central hub, a flexible feed-boom assembly hanging from the hub, and 12 flexible ribs radiating outward. Fourteen electrodynamic force actuators mounted to the hub and to the individual ribs provide the means to excite the structure and exert control forces. Thirty permanently mounted sensors, including optical encoders and analog induction devices provide measurements of structural response at widely distributed points. An experimental remote optical sensor provides sixteen additional sensing channels. A computer samples the sensors, computes the control updates and sends commands to the actuators in real time, while simultaneously displaying selected outputs on a graphics terminal and saving them in memory. Several control experiments were conducted thus far and are documented. These include implementation of distributed parameter system control, model reference adaptive control, and static shape control. These experiments have demonstrated the successful implementation of state-of-the-art control approaches using actual hardware.

Vivian, H. C.↗

Camera-on-a-Chip

Jet Propulsion Laboratory's research on a second generation, solid-state image sensor technology has resulted in the Complementary Metal- Oxide Semiconductor Active Pixel Sensor (CMOS), establishing an alternative to the Charged Coupled Device (CCD). Photobit Corporation, the leading supplier of CMOS image sensors, has commercialized two products of their own based on this technology: the PB-100 and PB-300. These devices are cameras on a chip, combining all camera functions. CMOS "active-pixel" digital image sensors offer several advantages over CCDs, a technology used in video and still-camera applications for 30 years. The CMOS sensors draw less energy, they use the same manufacturing platform as most microprocessors and memory chips, and they allow on-chip programming of frame size, exposure, and other parameters.

Source record↗

DRAGON Grid: A Three-Dimensional Hybrid Grid Generation Code Developed

Because grid generation can consume 70 percent of the total analysis time for a typical three-dimensional viscous flow simulation for a practical engineering device, payoffs from research and development could reduce costs and increase throughputs considerably. In this study, researchers at the NASA Glenn Research Center at Lewis Field developed a new hybrid grid approach with the advantages of flexibility, high-quality grids suitable for an accurate resolution of viscous regions, and a low memory requirement. These advantages will, in turn, reduce analysis time and increase accuracy. They result from an innovative combination of structured and unstructured grids to represent the geometry and the computation domain. The present approach makes use of the respective strengths of both the structured and unstructured grid methods, while minimizing their weaknesses. First, the Chimera grid generates high-quality, mostly orthogonal meshes around individual components. This process is flexible and can be done easily. Normally, these individual grids are required overlap each other so that the solution on one grid can communicate with another. However, when this communication is carried out via a nonconservative interpolation procedure, a spurious solution can result. Current research is aimed at entirely eliminating this undesired interpolation by directly replacing arbitrary grid overlapping with a nonstructured grid called a DRAGON grid, which uses the same set of conservation laws over the entire region, thus ensuring conservation everywhere. The DRAGON grid is shown for a typical film-cooled turbine vane with 33 holes and 3 plenum compartments. There are structured grids around each geometrical entity and unstructured grids connecting them. In fiscal year 1999, Glenn researchers developed and tested the three-dimensional DRAGON grid-generation tools. A flow solver suitable for the DRAGON grid has been developed, and a series of validation tests are underway.

Liou, Meng-Sing↗

Intensified charge coupled devices for ultra low light level imaging

Development of a sensor incorporating a CCD and photocathode for operation in the electron bombarded mode in both a magnetic and an electrostatic focussed, gated configuration is described. Initial format size is 100 x 160 pixels with eventual growth to 400 x 400 pixels. The sensor is part of a digital camera system which includes the low level video conditioning electronics, a camera controller, a high speed buffer memory, and digital recording and display electronics. The memory uses CMOS/SOS and has a capacity of 1.6 Mbits with operating rates of 48 Mbits/sec. Individual frames are co-added to provide wide dynamic range and photometric precision better than 1%. A 4-bit video quantization is used to increase the photon counting detection rate before coincidence losses become serious.

Sobieski, S.↗

On the Recovery Stress of a Ni50.3Ti29.7Hf20 High Temperature Shape Memory Alloy

Recovery stress in shape memory alloys (SMAs), also known as blocking stress, is an important property generally obtained during heating under a dimensional constraint as the material undergoes the martensitic phase transformation. This property has been instinctively utilized in most SMA shape-setting procedures, and has been used in numerous applications such as fastening and joining, rock splitting, safety release mechanisms, reinforced composites, medical devices, and many other applications. The stress generation is also relevant to actuator applications where jamming loads (e.g., in case the actuator gets stuck and is impeded from moving) need to be determined for proper hardware sizing. Recovery stresses in many SMA systems have been shown to reach stresses in the order of 800 MPa, achieved via thermo-mechanical training such as pre-straining, heat treatments or other factors. With the advent of high strength, high temperature SMAs, recovery stress data has been rarely probed, and there is no information pertinent to the magnitudes of these stresses. Thus, the purpose of this work is to investigate the recovery stress capability of a precipitation strengthened, Ni50.3Ti29.7Hf20 (at.) high temperature SMA in uniaxial tension and compression. This material has been shown to exhibit outstanding strength and stability during constant-stress, thermal cycling, but no data exists on constant-strain thermal cycling. Several training routines were implemented as part of this work including isothermal pre-straining, isobaric thermal cycling, and isothermal cyclic training routines. Regardless of the training method used, the recovery stress was characterized using constant-strain (strain-controlled condition) thermal cycling between the upper and lower cycle temperatures. Preliminary results indicate recovery stresses in excess of 1.5 GPa were obtained after a specific training routine. This stress magnitude is significantly higher than conventional NiTi stress generation capability.

Recovery Stress↗

Evolving Requirements for Magnetic Tape Data Storage Systems

Magnetic tape data storage systems have evolved in an environment where the major applications have been back-up/restore, disaster recovery, and long term archive. Coincident with the rapidly improving price-performance of disk storage systems, the prime requirements for tape storage systems have remained: (1) low cost per MB, (2) a data rate balanced to the remaining system components. Little emphasis was given to configuring the technology components to optimize retrieval of the stored data. Emerging new applications such as network attached high speed memory (HSM), and digital libraries, place additional emphasis and requirements on the retrieval of the stored data. It is therefore desirable to consider the system to be defined both by STorage And Retrieval System (STARS) requirements. It is possible to provide comparative performance analysis of different STARS by incorporating parameters related to (1) device characteristics, and (2) application characteristics in combination with queuing theory analysis. Results of these analyses are presented here in the form of response time as a function of system configuration for two different types of devices and for a variety of applications.

Gniewek, John J.↗

Hierarchical Approach to 'Atomistic' 3-D MOSFET Simulation

We present a hierarchical approach to the 'atomistic' simulation of aggressively scaled sub-0.1 micron MOSFET's. These devices are so small that their characteristics depend on the precise location of dopant atoms within them, not just on their average density. A full-scale three-dimensional drift-diffusion atomistic simulation approach is first described and used to verify more economical, but restricted, options. To reduce processor time and memory requirements at high drain voltage, we have developed a self-consistent option based on a solution of the current continuity equation restricted to a thin slab of the channel. This is coupled to the solution of the Poisson equation in the whole simulation domain in the Gummel iteration cycles. The accuracy of this approach is investigated in comparison to the full self-consistent solution. At low drain voltage, a single solution of the nonlinear Poisson equation is sufficient to extract the current with satisfactory accuracy. In this case, the current is calculated by solving the current continuity equation in a drift approximation only, also in a thin slab containing the MOSFET channel. The regions of applicability for the different components of this hierarchical approach are illustrated in example simulations covering the random dopant-induced threshold voltage fluctuations, threshold voltage lowering, threshold voltage asymmetry, and drain current fluctuations.

Asenov, Asen↗

The NASA Electronic Parts and Packaging (NEPP) Program: Insertion of New Electronics Technologies

This viewgraph presentation gives an overview of NASA Electronic Parts and Packaging (NEPP) Program's new electronics technology trends. The topics include: 1) The Changing World of Radiation Testing of Memories; 2) Even Application-Specific Tests are Costly!; 3) Hypothetical New Technology Part Qualification Cost; 4) Where we are; 5) Approaching FPGAs as a More Than a "Part" for Reliability; 6) FPGAs Beget Novel Radiation Test Setups; 7) Understanding the Complex Radiation Data; 8) Tracking Packaging Complexity and Reliability for FPGAs; 9) Devices Supporting the FPGA Need to be Considered; 10) Summary of the New Electronic Technologies and Insertion into Flight Programs Workshop; and 11) Highlights of Panel Notes and Comments

LaBel, Kenneth A.↗

Hierarchical Statistical 3D ' Atomistic' Simulation of Decanano MOSFETs: Drift-Diffusion, Hydrodynamic and Quantum Mechanical Approaches

When MOSFETs are scaled to deep submicron dimensions the discreteness and randomness of the dopant charges in the channel region introduces significant fluctuations in the device characteristics. This effect, predicted 20 year ago, has been confirmed experimentally and in simulation studies. The impact of the fluctuations on the functionality, yield, and reliability of the corresponding systems shifts the paradigm of the numerical device simulation. It becomes insufficient to simulate only one device representing one macroscopical design in a continuous charge approximation. An ensemble of macroscopically identical but microscopically different devices has to be characterized by simulation of statistically significant samples. The aims of the numerical simulations shift from predicting the characteristics of a single device with continuous doping towards estimating the mean values and the standard deviations of basic design parameters such as threshold voltage, subthreshold slope, transconductance, drive current, etc. for the whole ensemble of 'atomistically' different devices in the system. It has to be pointed out that even the mean values obtained from 'atomistic' simulations are not identical to the values obtained from continuous doping simulations. In this paper we present a hierarchical approach to the 'atomistic' simulation of aggressively scaled decanano MOSFETs. A full scale 3D drift-diffusion'atomostic' simulation approach is first described and used for verification of the more economical, but also more restricted, options. To reduce the processor time and memory requirements at high drain voltage we have developed a self-consistent option based on a thin slab solution of the current continuity equation only in the channel region. This is coupled to the Poisson's equation solution in the whole simulation domain in the Gummel iteration cycles. The accuracy of this approach is investigated in comparison with the full self-consistent solution. At low drain voltage only single solution of the nonlinear Poisson equation is sufficient to extract the current with satisfactory accuracy. A pilot version of a hydrodynamic 'atomistic' simulator has been developed in order to study the effect of the nonequilibrium, non local transport in decanano MOSFETs on the random dopant induced current fluctuations. For the first time we have also applied the density gradient approach in 3D to investigate the effect of the quantum confinement on the threshold voltage fluctuations. The developed 'atomistic' simulation techniques have been applied to study various fluctuation resistant MOSFET architectures including epitaxial and delta doped devices.

Asenov, Asen↗

Research principles and the construction of mnemonic diagrams

Mnemonic diagrams are defined as a variety of information display devices, the essential element of which is conventional graphical presentation of technological or functional-operational links in a controlled system or object. Graphically displaying the operational structure of an object, the interd dependence between different parameters, and the interdependence between indicators and control organs, the mneomonic diagram reduces the load on the operator's memory and facilitates perception and reprocessing of information and decision making, while at the same time playing the role of visual support to the information activity of the operator. The types of mnemonic diagrams are listed.

Venda, V. F.↗

RAID 7 disk array

Each RAID level reflects a different design architecture. Associated with each is a backdrop of imposed limitations, as well as possibilities which may be exploited within the architectural constraints of that level. There are three unique features that differentiate RAID 7 from all other levels. RAID 7 is asynchronous with respect to usage of I/O data paths. Each I/O drive (includes all data and one parity drives) as well as each host interface (there may be multiple host interfaces) has independent control and data paths. This means that each can be accessed completely, independently, of the other. This is facilitated by a separate device cache for each device/interface as well. RAID 7 is asynchronous with respect to device hierarchy and data bus utilization. Each drive and each interface is connected to a high speed data bus controlled by the embedded operating system to make independent transfers to and from central cache. RAID 7 is asynchronous with respect to the operation of an embedded real time process oriented operating system. This means that exclusive and independent of the host, or multiple host paths, the embedded OS manages all I/O transfers asynchronously across the data and parity drives. A key factor to consider is that of the RAID 7's ability to anticipate and match host I/O usage patterns. This yields the following benefits over RAID's built around micro-code based architectures. RAID 7 appears to the host as a normally connected Big Fast Disk (BFD). RAID 7 appears, from the perspective of the individual disk devices, to minimize the total number of accesses and optimize read/write transfer requests. RAID 7 smoothly integrates the random demands of independent users with the principles of spatial and temporal locality. This optimizes small, large, and time sequenced I/O requests which results in users having an I/O performance which approaches performance to that of main memory.

Stout, Lloyd↗