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NASA NTRS1997

Root-Raised Cosine Filter Implementation That Uses Canonical Signed Digits for High-Speed Digital Filter Applications

NASA Lewis Research Center's Space Communications Division has been investigating high-speed digital filters that can operate at a higher speed than those in current use for a digital modulator and demodulator (modem). Using the Canonical Signed Digits (CSD) number representation for filter coefficients is a very effective way to increase the filter's speed while reducing complexity in the digital filter hardware design. This approach is a good alternative to using an expensive parallel-processing design technique or custom, application-specific integrated circuits. Such integrated circuits may not be suitable for applications that require filter speeds faster than what application-specific integrated circuits digital signal processors can offer for a dedicated channel. When a communication channel is a dedicated, multiplication process--a costly, time-consuming process--it can be greatly simplified by a replacement of the filter coefficients with CSD numbers. A computer code written with the MATLAB software package runs the program and generates CSD-represented filter coefficients that are based on minimizing minimum mean square errors. Also, the Alta Group of Cadence's Signal Processing Workstation is used to simulate and analyze the CSD filter responses. The impulse response of the root-raised cosine filter that is used as a base model is defined. From this filter, a set of coefficients is sampled and stored in a file. For the all coefficients, the optimal CSD number for each coefficient is searched on the basis of the minimum-mean-square-errors criterion. Because the distribution of CSD numbers is not uniform, quantization errors tend to be bigger for coefficients greater than 1/2. To offset errors that occur in a region of coefficients between 1/2 to 1 and to better represent fractions with CSD numbers, an extra nonzero digit is allowed for any coefficients exceeding 1/2. This will greatly improve frequency response as well as intersymbol interference at the receiver. The frequency response of a set of collected CSD-represented filter coefficients was compared with the same filter that was conventionally implemented. Analyses show CSD-implemented filters perform as well as conventional filters. Comparison of eye diagrams and bit-error-rate curves between CSD filters and traditionally implemented filters are almost indistinguishable. However, filter complexity was reduced from almost 3.5 to 1 for CSD filters. Complete computer simulation results are available. In the near future, work will focus on building actual working digital filter hardware in a field programmable gate array (FPGA).

Kim, Heechul↗

NASA NTRS2009

Economical Implementation of a Filter Engine in an FPGA

A logic design has been conceived for a field-programmable gate array (FPGA) that would implement a complex system of multiple digital state-space filters. The main innovative aspect of this design lies in providing for reuse of parts of the FPGA hardware to perform different parts of the filter computations at different times, in such a manner as to enable the timely performance of all required computations in the face of limitations on available FPGA hardware resources. The implementation of the digital state-space filter involves matrix vector multiplications, which, in the absence of the present innovation, would ordinarily necessitate some multiplexing of vector elements and/or routing of data flows along multiple paths. The design concept calls for implementing vector registers as shift registers to simplify operand access to multipliers and accumulators, obviating both multiplexing and routing of data along multiple paths. Each vector register would be reused for different parts of a calculation. Outputs would always be drawn from the same register, and inputs would always be loaded into the same register. A simple state machine would control each filter. The output of a given filter would be passed to the next filter, accompanied by a "valid" signal, which would start the state machine of the next filter. Multiple filter modules would share a multiplication/accumulation arithmetic unit. The filter computations would be timed by use of a clock having a frequency high enough, relative to the input and output data rate, to provide enough cycles for matrix and vector arithmetic operations. This design concept could prove beneficial in numerous applications in which digital filters are used and/or vectors are multiplied by coefficient matrices. Examples of such applications include general signal processing, filtering of signals in control systems, processing of geophysical measurements, and medical imaging. For these and other applications, it could be advantageous to combine compact FPGA digital filter implementations with other application-specific logic implementations on single integrated-circuit chips. An FPGA could readily be tailored to implement a variety of filters because the filter coefficients would be loaded into memory at startup.

Kowalski, James E.↗

NASA NTRS1990

Design of optimal correlation filters for hybrid vision systems

Research is underway at the NASA Johnson Space Center on the development of vision systems that recognize objects and estimate their position by processing their images. This is a crucial task in many space applications such as autonomous landing on Mars sites, satellite inspection and repair, and docking of space shuttle and space station. Currently available algorithms and hardware are too slow to be suitable for these tasks. Electronic digital hardware exhibits superior performance in computing and control; however, they take too much time to carry out important signal processing operations such as Fourier transformation of image data and calculation of correlation between two images. Fortunately, because of the inherent parallelism, optical devices can carry out these operations very fast, although they are not quite suitable for computation and control type operations. Hence, investigations are currently being conducted on the development of hybrid vision systems that utilize both optical techniques and digital processing jointly to carry out the object recognition tasks in real time. Algorithms for the design of optimal filters for use in hybrid vision systems were developed. Specifically, an algorithm was developed for the design of real-valued frequency plane correlation filters. Furthermore, research was also conducted on designing correlation filters optimal in the sense of providing maximum signal-to-nose ratio when noise is present in the detectors in the correlation plane. Algorithms were developed for the design of different types of optimal filters: complex filters, real-value filters, phase-only filters, ternary-valued filters, coupled filters. This report presents some of these algorithms in detail along with their derivations.

Rajan, Periasamy K.↗

NASA NTRS1974

Surface electrical properties experiment, part 1

The work is reported which was performed on the Surface Electrical Properties Experiment Data Acquisition System. Areas discussed include: data handling and processing, installation and external signal application, operation of the equipment, and digital output. Detailed circuit descriptions are included.

Strangway, D. W.↗

NASA NTRS1974

Power processor for a 30cm ion thruster

A thermal vacuum power processor for the NASA Lewis 30cm Mercury Ion Engine was designed, fabricated and tested to determine compliance with electrical specifications. The power processor breadboard used the silicon controlled rectifier (SCR) series resonant inverter as the basic power stage to process all the power to an ion engine. The power processor includes a digital interface unit to process all input commands and internal telemetry signals so that operation is compatible with a central computer system. The breadboard was tested in a thermal vacuum environment. Integration tests were performed with the ion engine and demonstrate operational compatibility and reliable operation without any component failures. Electromagnetic interference data were also recorded on the design to provide information on the interaction with total spacecraft.

Biess, J. J.↗

NASA NTRS1975

Displays, memories, and signal processing: A compilation

Articles on electronics systems and techniques were presented. The first section is on displays and other electro-optical systems; the second section is devoted to signal processing. The third section presented several new memory devices for digital equipment, including articles on holographic memories. The latest patent information available is also given.

Source record↗

NASA NTRS1976

Fluidic hydrogen detector production prototype development

A hydrogen gas sensor that can replace catalytic combustion sensors used to detect leaks in the liquid hydrogen transfer systems at Kennedy Space Center was developed. A fluidic sensor concept, based on the principle that the frequency of a fluidic oscillator is proportional to the square root of the molecular weight of its operating fluid, was utilized. To minimize sensitivity to pressure and temperature fluctuations, and to make the sensor specific for hydrogen, two oscillators are used. One oscillator operates on sample gas containing hydrogen, while the other operates on sample gas with the hydrogen converted to steam. The conversion is accomplished with a small catalytic converter. The frequency difference is taken, and the hydrogen concentration computed with a simple digital processing circuit. The output from the sensor is an analog signal proportional to hydrogen content. The sensor is shown to be accurate and insensitive to severe environmental disturbances. It is also specific for hydrogen, even with large helium concentrations in the sample gas.

Roe, G. W.↗

NASA NTRS1977

Electric prototype power processor for a 30cm ion thruster

An electrical prototype power processor unit was designed, fabricated and tested with a 30 cm mercury ion engine for primary space propulsion. The power processor unit used the thyristor series resonant inverter as the basic power stage for the high power beam and discharge supplies. A transistorized series resonant inverter processed the remaining power for the low power outputs. The power processor included a digital interface unit to process all input commands and internal telemetry signals so that electric propulsion systems could be operated with a central computer system. The electrical prototype unit included design improvement in the power components such as thyristors, transistors, filters and resonant capacitors, and power transformers and inductors in order to reduce component weight, to minimize losses, and to control the component temperature rise. A design analysis for the electrical prototype is also presented on the component weight, losses, part count and reliability estimate. The electrical prototype was tested in a thermal vacuum environment. Integration tests were performed with a 30 cm ion engine and demonstrated operational compatibility. Electromagnetic interference data was also recorded on the design to provide information for spacecraft integration.

Biess, J. J.↗

NASA NTRS1984

The MST Radar Technique

The coherent radar technique is reviewed with special emphasis to mesosphere-stratosphere-troposphere (MST) radars operating in the VHF band. Some basic introduction to Doppler radar measurements and the radar equation is followed by an outline of the characteristics of atmospheric turbulence, viewed from the scattering and reflection processes of radar signals. Radar signal acquisition and preprocessing, namely coherent detection, digital sampling, pre-integration and coding, is briefly discussed. The data analysis is represented in terms of the correlation and spectrum analysis, yielding the essential parameters: power, signal-to-noise ratio, average and fluctuating velocity and persistency. The techniques to measure wind velocities, viz. the different modes of the Doppler method as well as the space antenna method are surveyed and the feasibilities of the MST radar interferometer technique are elucidated. A general view on the criteria to design phased array antennas is given. An outline of the hardware of a typical MST radar system is presented.

Roettger, J.↗

NASA NTRS1990

A fiber optic sensor for noncontact measurement of shaft speed, torque, and power

A fiber optic sensor which enables noncontact measurement of the speed, torque and power of a rotating shaft was fabricated and tested. The sensor provides a direct measurement of shaft rotational speed and shaft angular twist, from which torque and power can be determined. Angles of twist between 0.005 and 10 degrees were measured. Sensor resolution is limited by the sampling rate of the analog to digital converter, while accuracy is dependent on the spot size of the focused beam on the shaft. Increasing the sampling rate improves measurement resolution, and decreasing the focused spot size increases accuracy. Digital processing allows for enhancement of an electronically or optically degraded signal.

Madzsar, George C.↗

NASA NTRS1990

A fiber optic sensor for noncontact measurement of shaft speed, torque and power

Madzsar, George C.↗

NASA NTRS1992

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Sadr, R.↗

NASA NTRS1993

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

Sadr, Ramin↗

NASA NTRS1996

Performance of the THS4302 and the Class V Radiation-Tolerant THS4304-SP Silicon Germanium Wideband Amplifiers at Extreme Temperatures

This report discusses the performance of silicon germanium, wideband gain amplifiers under extreme temperatures. The investigated devices include Texas Instruments THS4304-SP and THS4302 amplifiers. Both chips are manufactured using the BiCom3 process based on silicon germanium technology along with silicon-on-insulator (SOI) buried oxide layers. The THS4304-SP device was chosen because it is a Class V radiation-tolerant (150 kRad, TID silicon), voltage-feedback operational amplifier designed for use in high-speed analog signal applications and is very desirable for NASA missions. It operates with a single 5 V power supply [1]. It comes in a 10-pin ceramic flatpack package, and it provides balanced inputs, low offset voltage and offset current, and high common mode rejection ratio. The fixed-gain THS4302 chip, which comes in a 16-pin leadless package, offers high bandwidth, high slew rate, low noise, and low distortion [2]. Such features have made the amplifier useful in a number of applications such as wideband signal processing, wireless transceivers, intermediate frequency (IF) amplifier, analog-to-digital converter (ADC) preamplifier, digital-to-analog converter (DAC) output buffer, measurement instrumentation, and medical and industrial imaging.

Patterson, Richard L.↗

NASA NTRS2012

Low-Cost Telemetry System for Small/Micro Satellites

A Software Defined Radio (SDR) concept uses a minimum amount of analog/radio frequency components to up/downconvert the RF signal to/from a digital format. Once in the digital domain, all other processing (filtering, modulation, demodulation, etc.) is done in software. The project will leverage existing designs and enhance capabilities in the commercial sector to provide a path to a radiation-hardened SDR transponder. The SDR transponder would incorporate baseline technologies dealing with improved Forward Error Correcting (FEC) codes to be deployed to all Near Earth Network (NEN) ground stations. By incorporating this FEC, at least a tenfold increase in data throughput can be achieved. A family of transponder products can be implemented using common platform architecture, allowing new products to be more quickly introduced into the market. Software can be reused across products, reducing software/hardware costs dramatically. New features and capabilities, such as encoding and decoding algorithms, filters, and bit synchronizers, can be added to the existing infrastructure without requiring major new capital expenditures, allowing implementation of advanced features in the communication systems. As new telecommunication technologies emerge, incorporating them into the SDR fabric will be easily accomplished with little or no requirements for new hardware. There are no preferred flight platforms for the SDR technology, so it can be used on any type of orbital or sub-orbital platform, all within a fully radiation hardened design.

Sims, William↗

NASA NTRS1984

Upset susceptibility study employing circuit analysis and digital simulation

This paper describes an approach to predicting the susceptibility of digital systems to signal disturbances. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, Electromagnetic Interference (EMI) and Electromagnetic Pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload will bring the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The Super-Sceptre (system for circuit evaluation of transient radiation effects) Program was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.

Carreno, V. A.↗

NASA NTRS1984

Upset susceptibility study employing circuit analysis and digital simulation

An approach to predict the susceptibility of digital systems to signal disturbances is described. Electrical disturbances on a digital system's input and output lines can be induced by activities and conditions including static electricity, lightning discharge, electromagnetic interference (EMI), and electromagnetic pulsation (EMP). The electrical signal disturbances employed for the susceptibility study were limited to nondestructive levels, i.e., the system does not sustain partial or total physical damage and reset and/or reload brings the system to an operational status. The front-end transition from the electrical disturbances to the equivalent digital signals was accomplished by computer-aided circuit analysis. The super-sceptre (system for circuit evaluation of transient radiation effects) programs was used. Gate models were developed according to manufacturers' performance specifications and parameters resulting from construction processes characteristic of the technology. Digital simulation at the gate and functional level was employed to determine the impact of the abnormal signals on system performance and to study the propagation characteristics of these signals through the system architecture. Example results are included for an Intel 8080 processor configuration.

Carreno, V. A.↗