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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 505 records · Page 28
All sourcesNASA NTRSDOE OSTI
NASA NTRS1971

FEP encapsulated N/P silicon solar cells after simulated micrometeoroid exposure.

The effects of simulated micrometeoroid exposure on the performance of N/P silicon solar cells encapsulated for their protection in fluorinated ethylene propylene were determined in a shock tube. It was found that the short-circuit current decreased after exposure to the simulated micrometeoroid particles. The shape of the curve remained the same and was simply translated downward with a concomitant drop in open-circuit voltage.

Mirtich, M. J.↗
NASA NTRSDate not supplied

A Dual Linear/Circular Polarized Wideband Flat Panel Phased Array Antenna for K/Ka-band 6U CubeSat Communications Applications

Circular polarized (CP) electromagnetic waves are preferred for space-to-space and space-to-ground satellite communications (SATCOM). CubeSats with 6U sizes (1U represents a 10 cm x 10 cm x 10 cm), that will rotate together with the Moon as it orbits Earth require high gain CP antenna systems to maintain reliable communication links. Here, we have designed an 8x8 dual linear and dual circularly polarized phased array antenna (PAA) aperture that offers 22-28 GHz bandwidth, with maximum gain of 23 dBic, and beam scanning capability of ±50o with acceptable axial ratio over all scan angles. A stacked patch topology is selected to achieve wide impedance bandwidth. Each driven patch has two via feed point locations that are connected to grounded coplanar waveguide (CPW) feed structures. By utilizing phase shifters from the Anokiwave RFICs (AWMF-0165) employed for the beamforming network (BFN), we have generated both dual linear polarization and dual circular polarization in each patch. Each driven and parasitic patch is innovatively shaped to achieve excellent isolation between two feed points which, in turn, leads to low cross polarization, high efficiency and good axial ratio over the entire bandwidth. Each chip has eight outputs which feed one 2x2 sub-array consisting of four dual linear or dual circularly polarized driven patches, simultaneously. Each 2x2 sub-array of the 8x8 array are sequentially rotated which improves axial ratio performance when the antenna operates in the dual circularly polarized mode. By utilizing a mirror effect, cross-polarized fields are also improved when operated in a dual linear polarized mode. The 8x8 array aperture is simulated taking into account the effect of the multilayer printed circuit board (PCB) stack-up of the BFN and co-simulated with the power splitter outputs and chip outputs and results are compared with only passive array performance. The performance of the antenna is still excellent when non-ideal chip performances are included in the simulation analysis. The fabricated array will be tested for radiation patterns in the Antenna and Microwave Laboratory (AML) of the San Diego State University and the NASA Glenn Research Center (GRC) spherical near field chambers. The design of the 8x8 antenna array with BFN layout is shown in Fig. 1.

5G↗
NASA NTRS1981

Development and evaluation of a prototype in-flight instrument flight rules (IFR) procedures trainer

An in-flight instrument flight rules (IFR) procedures trainer capable of providing simulated indications of instrument flight in a typical general aviation aircraft independent of ground based navigation aids was developed. The IFR navaid related instruments and circuits from an ATC 610J table top simulator were installed in a Cessna 172 aircraft and connected to its electrical power and pitot static systems. The benefits expected from this hybridization concept include increased safety by reducing the number of general aviation aircraft conducting IFR training flights in congested terminal areas, and reduced fuel use and instruction costs by lessening the need to fly to and from navaid equipped airports and by increased efficiency of the required in-flight training. Technical feasibility was demonstrated and the operational feasibility of the concept was evaluated. Results indicated that the in-flight simulator is an effective training device for teaching IFR procedural skills.

Aaron, J. B., Jr.↗
DOE OSTI2024

Collective neural network behavior in a dynamically driven disordered system of superconducting loops

Collective properties of complex systems composed of many interacting components such as neurons in our brain can be modeled by artificial networks based on disordered systems. We show that a disordered neural network of superconducting loops with Josephson junctions can exhibit computational properties like categorization and associative memory in the time evolution of its state in response to information from external excitations. Superconducting loops can trap multiples of fluxons in many discrete memory configurations defined by the local free energy minima in the configuration space of all possible states. A memory state can be updated by exciting the Josephson junctions to fire or allow the movement of fluxons through the network as the current through them surpasses their critical current thresholds. Simulations performed with a lumped element circuit model of a 4-loop network show that information written through excitations is translated into stable states of trapped flux and their time evolution. Experimental implementation on a high-Tc superconductor YBCO-based 4-loop network shows dynamically stable flux flow in each pathway characterized by the correlations between junction firing statistics. Neural network behavior is observed as energy barriers separating state categories in simulations in response to multiple excitations, and experimentally as junction responses characterizing different flux flow patterns in the network. The state categories that produce these patterns have different temporal stabilities relative to each other and the excitations. This provides strong evidence for time-dependent (short-to-long-term) memories, that are dependent on the geometrical and junction parameters of the loops, as described with a network model.

Josephson junctions↗
DOE OSTI2024

Early Exploration of a Flexible Framework for Efficient Quantum Linear Solvers in Power Systems

The rapid integration of renewable energy resources presents formidable challenges in managing power grids. While advanced computing and machine learning techniques offer some solutions for accelerating grid modeling and simulation, there remain complex problems that classical computers cannot effectively address. Quantum computing, a promising technology, has the potential to fundamentally transform how we manage power systems, especially in scenarios with a higher proportion of renewable energy sources. One critical aspect is solving linear systems of equations, crucial for power system applications like power flow analysis, for which the Harrow-Hassidim-Lloyd (HHL) algorithm is a well-known quantum solution. However, HHL quantum circuits often exhibit excessive depth, making them impractical for current Noisy-Intermediate-Scale-Quantum (NISQ) devices. In this paper, we introduce a versatile framework, powered by NWQSim, that bridges the gap between power system applications and quantum linear solvers available in Qiskit. This framework empowers researchers to efficiently explore power system applications using quantum linear solvers. Through innovative gate fusion strategies, reduced circuit depth, and GPU acceleration, our simulator significantly enhances resource efficiency. Power flow case studies have demonstrated up to a eight-fold speedup compared to Qiskit Aer, all while maintaining comparable levels of accuracy.

quantum computing, Harrow-Hassidim-Lloyd, high-per↗
NASA NTRS2022

Design of Rigid-Flex PCB Robotics Leveraging Validated Finite Element Simulations

The use of rigid-flex printed circuit board (PCB) as primary structure has the potential to reduce the weight and volume of robotic systems. In the case of robotics for interplanetary exploration, these systems can leverage origami-inspired folding for increased mobility options and reduced storage volume. Folding rigid-flex PCB robotics can be constructed with rigid PCB connected by short Nomex fabric hinges coupled with flex PCB ribbon cables that permits enhanced system flexibility and energy dissipation to promote impact survivability. This paper presents a design methodology of rigid-flex PCB systems with an emphasis on impact resistance. The design process considers solder joint adequacy, panel bending, and fracture using a finite element (FE) model. The proposed design methodology is developed using a case study with NASA JPL's Pop-Up Folding Flat Explorer Robot (PUFFER). First, the finite-element (FE) modeling methodology is presented with consideration to both frequency and time-domain modeling applications, which include operational self-contact analysis and high impact scenarios. The time-domain impact modeling methodology utilizes hyperelastic material properties for the Nomex hinges. This modeling method is validated using image correlation of PUFFER drop tests. A flowchart is presented to guide users through a validated Abaqus modeling procedure for highly flexible rigid-flex systems. Next, a case study is presented in which PUFFER is subject to drop heights representative of falls into Lunar pits and then the design is refined for a more optimum impact performance. Finally, the results of the case study are used to inform a generalized design methodology for rigid-flex PCB robotics subject to high-impact loads with the considerations presented.

John Bell↗
NASA NTRS2022

Design of Rigid-Flex PCB Robotics Leveraging Validated Finite Element Simulations

The use of rigid-flex printed circuit board (PCB) as primary structure has the potential to reduce the weight and volume of robotic systems. In the case of robotics for interplanetary exploration, these systems can leverage origamiinspired folding for increased mobility options and reduced storage volume. Folding rigid-flex PCB robotics can be constructed with rigid PCB connected by short Nomex fabric hinges coupled with flex PCB ribbon cables that permits enhanced system flexibility and energy dissipation to promote impact survivability. This paper presents a design methodology of rigidflex PCB systems with an emphasis on impact resistance. The design process considers solder joint adequacy, panel bending, and fracture using a finite element (FE) model. The proposed design methodology is developed using a case study with NASA JPL’s Pop-Up Folding Flat Explorer Robot (PUFFER). First, the finite-element (FE) modeling methodology is presented with consideration to both frequency and time-domain modeling applications, which include operational self-contact analysis and high impact scenarios. The time-domain impact modeling methodology utilizes hyperelastic material properties for the Nomex hinges. This modeling method is validated using image correlation of PUFFER drop tests. A flowchart is presented to guide users through a validated Abaqus modeling procedure for highly flexible rigid-flex systems. Next, a case study is presented in which PUFFER is subject to drop heights representative of falls into Lunar pits and then the design is refined for a more optimum impact performance. Finally, the results of the case study are used to inform a generalized design methodology for rigid-flex PCB robotics subject to high-impact loads with the considerations presented.

de la Croix, Jean-Pierre↗
DOE OSTI2022

A Laplace-Domain Circuit Model for Fault and Stability Analysis Considering Unbalanced Topology

For systems subject to unbalanced faults, analytical model building for stability assessment is a challenging task. This letter presents a straightforward modeling approach. A generalized dynamic circuit representation is achieved by use of the Laplacian transform variable s . Here, we translate the voltage and current relationship at the fault location into the relationship of three subsystems. The final circuit model is an interconnected sequence network with impedances in the Laplace domain. This circuit can be directly converted from a steady-state sequence network. This modeling procedure is illustrated by an example case of an induction motor served by a grid through a series compensated line. Electromagnetic transient simulation results demonstrate that sub-synchronous oscillations can be mitigated when a single-line to ground fault is applied at the motor terminal. Stability analysis results based on the dynamic circuit corroborate the simulation results. What's more, the derived circuit effortlessly reveals why unbalance can enhance stability.

42 ENGINEERING↗
DOE OSTI2024

TETRIS-ADAPT-VQE: An adaptive algorithm that yields shallower, denser circuit Ansätze

Adaptive quantum variational algorithms are particularly promising for simulating strongly correlated systems on near-term quantum hardware, but they are not yet viable due, in large part, to the severe coherence time limitations on current devices. In this paper, we introduce an algorithm called TETRIS-ADAPT-VQE (tiling efficient trial circuits with rotations implemented simultaneously adaptive derivative-assembled problem-tailored variational quantum eigensolver), which iteratively builds up variational a few operators at a time in a way dictated by the problem being simulated. This algorithm is a modified version of the ADAPT-VQE algorithm, in which the one-operator-at-a-time rule is lifted to allow for the addition of multiple operators with disjoint supports in each iteration. TETRIS-ADAPT-VQE results in denser but significantly shallower circuits, without increasing the number of controlled- gates or variational parameters. Its advantage over the original algorithm in terms of circuit depths increases with the system size. Moreover, the expensive step of measuring the energy gradient with respect to each candidate unitary at each iteration is performed only a fraction of the time compared with ADAPT-VQE. These improvements bring us closer to the goal of demonstrating a practical quantum advantage on quantum hardware. Published by the American Physical Society 2024

Anastasiou, Panagiotis G. (ORCID:0000000256601791)↗
NASA NTRS1992

SEDS1 mission software verification using a signal simulator

The first flight of the Small Expendable Deployer System (SEDS1) is schedule to fly as the secondary payload of a Delta 2 in March, 1993. The objective of the SEDS1 mission is to collect data to validate the concept of tethered satellite systems and to verify computer simulations used to predict their behavior. SEDS1 will deploy a 50 lb. instrumented satellite as an end mass using a 20 km tether. Langley Research Center is providing the end mass instrumentation, while the Marshall Space Flight Center is designing and building the deployer. The objective of the experiment is to test the SEDS design concept by demonstrating that the system will satisfactorily deploy the full 20 km tether without stopping prematurely, come to a smooth stop on the application of a brake, and cut the tether at the proper time after it swings to the local vertical. Also, SEDS1 will collect data which will be used to test the accuracy of tether dynamics models used to stimulate this type of deployment. The experiment will last about 1.5 hours and complete approximately 1.5 orbits. Radar tracking of the Delta II and end mass is planned. In addition, the SEDS1 on-board computer will continuously record, store, and transmit mission data over the Delta II S-band telemetry system. The Data System will count tether windings as the tether unwinds, log the times of each turn and other mission events, monitor tether tension, and record the temperature of system components. A summary of the measurements taken during the SEDS1 are shown. The Data System will also control the tether brake and cutter mechanisms. Preliminary versions of two major sections of the flight software, the data telemetry modules and the data collection modules, were developed and tested under the 1990 NASA/ASEE Summer Faculty Fellowship Program. To facilitate the debugging of these software modules, a prototype SEDS Data System was programmed to simulate turn count signals. During the 1991 summer program, the concept of simulating signals produced by the SEDS electronics systems and circuits was expanded and more precisely defined. During the 1992 summer program, the SEDS signal simulator was programmed to test the requirements of the SEDS Mission software, and this simulator will be used in the formal verification of the SEDS Mission Software. The formal test procedures specification was written which incorporates the use of the signal simulator to test the SEDS Mission Software and which incorporates procedures for testing the other major component of the SEDS software, the Monitor Software.

Pierson, William E.↗
DOE OSTI2023

Realizing symmetry-protected topological phases in a spin-1/2 chain with next-nearest-neighbor hopping on superconducting qubits

Quantum simulation on near-term quantum hardware is a topic of intense interest. The preparation of novel quantum states of matter provides a quantitative assessment of the capabilities of near-term digital quantum computers to implement circuits with structure of relevance to quantum simulation. Here, we conduct a benchmark study by realizing symmetry-protected topological (SPT) phases of a spin-1/2 Hamiltonian with next-nearest-neighbor hopping on up to 11 qubits on a programmable superconducting quantum processor using adiabatic state preparation. Using recompilation techniques to reduce the gate count to around 50 two-qubit gates, we observe clear signatures of the two distinct SPT phases, such as excitations localized to specific edges and finite string-order parameters. Finally, we identify a parasitic phase associated with the two-qubit gate as the dominant imperfection that limits the depth of the circuits, indicating a research topic of interest for future hardware development.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS1989

Electrodynamics of the Getaway Tether Experiment

An electrodynamic circuit model of the interaction of a pair of small tethered satellites and the ionosphere is developed and analyzed. The system under study, the Getaway Tether Experiment (GATE), is composed of two small satellites and 1 km of insulated conducting tether. The nonlinear model has elements representing the emission, collection, and resistive flow of charge through an electrically conductive tether, plasma contactors, and the ionosphere. The circuit model is incorporated into a dynamic orbital simulation to predict mission performance. Simulation results show the feasibility to bilaterally transfer energy between stored electrical energy and orbital momentum. A transient model is also developed using the circuit model and a string of N lumped-parameter modules, each consisting of resistance, capacitance, and induced potential for the tether. Transients are shown via simulation to occur over millisecond intervals.

Greene, Michael↗
DOE OSTI2026

Efficient Simulation of Logical Magic State Preparation Protocols

Developing space- and time-efficient logical magic state preparation (MSP) protocols will likely be an essential step toward building a large-scale fault-tolerant quantum computer. Motivated by this need, we introduce a scalable method for simulating logical MSP protocols under the standard circuit-level noise model. When applied to protocols based on code-switching, magic state cultivation, and magic state distillation, our method yields a complexity polynomial in (i) the number of qubits and (ii) the nonstabilizerness, e.g., stabilizer rank or Pauli rank, of the target encoded magic state. The efficiency of our simulation method is rooted in a curious fact: every circuit-level Pauli error in these protocols propagates to a Clifford error at the end. This property is satisfied by a large family of protocols, including those that repeatedly measure a transversal Clifford that squares to a Pauli. We provide a proof-of-principle numerical simulation that prepares a magic state using such logical Clifford measurements. Our work enables practical simulation of logical MSP protocols without resorting to approximations or resource-intensive state-vector simulations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2026

Quantum-classical embedding via ghost Gutzwiller approximation for enhanced simulations of correlated electron systems

Simulating correlated materials on present-day quantum hardware remains challenging due to limited quantum resources. Quantum embedding methods offer a promising route by reducing computational complexity through the mapping of bulk systems onto effective impurity models, allowing more feasible simulations on pre- and early-fault-tolerant quantum devices. Here, this work develops a quantum-classical embedding framework based on the ghost Gutzwiller approximation to enable quantum-enhanced simulations of ground-state properties and spectral functions of correlated electron systems. Circuit complexity is analyzed using an adaptive variational quantum algorithm on a statevector simulator, applied to the infinite-dimensional Hubbard model with increasing ghost mode numbers from 3 to 5, resulting in circuit depths growing from 16 to 104. Noise effects are examined using a realistic error model, revealing significant impact on the spectral weight of the Hubbard bands. To mitigate these effects, the Iceberg quantum error detection code is employed, achieving up to 40% error reduction in simulations. Finally, the accuracy of the density matrix estimation and the derived spectral function is benchmarked on IBM and Quantinuum quantum hardware, featuring distinct qubit-connectivity and employing multiple levels of error mitigation techniques.

Chen, I-Chi [Ames Laboratory (AMES), Ames, IA (Uni↗
DOE OSTI2021

Simulating Large PEPs Tensor Networks on Small Quantum Devices

We systematically map low bond dimension PEPs tensor networks to quantum circuits. By measuring and reusing qubits, we are in principle able to simulate an N×M square lattice PEPs network (for arbitrary M) of bond dimension 2 using N+ 2 qubits. We then seek to determine if this mapping can yield useful values for long-range loop observables in the presence of quantum device noise in the topological Wen plaquette model by mapping a 3×3 PEPs tensor network to a 5-qubit quantum circuit and executing it on the Honeywell System Model H1-1 trapped-ion device. We find that, for this system size, the noisy observable values are indeed sufficient for diagnosing topological vs. trivial order as the Wen model is perturbed by a magnetic field term in the Hamiltonian. We provide an overview of the experimental procedure and its results. We then explain in greater detail our method for mapping 2D tensor networks to quantum circuits and its scaling properties. This serves as a proof-of-concept of the utilty of the measure-and-reuse approach for simulating large 2D quantum systems on small quantum devices.

MacCormack, Ian↗
NASA NTRS1989

NASA direct detection laser diode driver

TRW has developed a prototype driver circuit for GaAs laser diodes as part of the NASA/Goddard Space Flight Center's Direct Detection Laser Transceiver (DDLT) program. The circuit is designed to drive the laser diode over a range of user-selectable data rates from 1.7 to 220 Mbps, Manchester-encoded, while ensuring compatibility with 8-bit and quaternary pulse position modulation (QPPM) formats for simulating deep space communications. The resulting hybrid circuit has demonstrated 10 to 90 percent rise and fall times of less than 300 ps at peak currents exceeding 100 mA.

Seery, B. D.↗
DOE OSTI2026

Towards Generalizable and Efficient Circuit Topology Design: A Graph-Transformer-based Surrogate Model with Curriculum Learning

Unlike circuit parameter and sizing optimizations, the automated design of analog circuit topologies poses significant challenges for learning-based approaches. One challenge arises from the combinatorial growth of the topology space with circuit size, which limits the topology optimization efficiency. Moreover, traditional circuit evaluation methods are time-consuming, while the presence of data discontinuity in the topology space makes the accurate prediction of circuit performance exceptionally difficult for unseen topologies. To tackle these challenges, we design a novel Graph-Transformer-based Network (GTN) as the surrogate model for circuit evaluation, offering a substantial acceleration in the speed of circuit topology optimization without sacrificing performance. Our GTN model architecture is designed to embed voltage changes in circuit loops and current flows in connected devices, enabling accurate performance predictions for circuits with unseen topologies. To address the cold start problem when scaling GTN to large-scale circuits, we further introduce a curriculum learning strategy that progressively trains GTN from small-scale to large-scale circuits. This approach enables the model to first learn fundamental physical principles from simpler topologies and gradually adapt to complex configurations, effectively bridging the circuit complexity gap and improving prediction accuracy. Taking the power converter circuit design as an experimental task, our GTN model significantly outperforms an analytical approach and baseline methods directly utilizing graph neural networks. Furthermore, GTN achieves less than 5% relative error and 196× speed-up compared with high-fidelity simulation. Notably, our GTN surrogate model empowers an automatic circuit design framework to discover circuits of comparable quality to those identified through high-fidelity simulation while reducing the time required by up to 98.2%. With curriculum learning, the enhanced GTN achieves a 51% improvement for performance prediction of large-scale circuits compared to the GTN model without this strategy. These advancements establish GTN as a scalable framework for automated analog circuit design across varying circuit complexity levels.

Lu, Haoshu [New Jersey Institute of Technology (NJ↗
DOE OSTI2026

Q-IRIS: The Evolution of the IRIS Task-Based Runtime to Enable Classical-Quantum Workflows

Extreme heterogeneity in emerging HPC systems are starting to include quantum accelerators, motivating runtimes that can coordinate between classical and quantum workloads. We present a proof-of-concept hybrid execution framework integrating the IRIS asynchronous task-based runtime with the XACC quantum programming framework via the Quantum Intermediate Representation Execution Engine (QIR-EE). IRIS orchestrates multiple programs written in the quantum intermediate representation (QIR) across heterogeneous backends (including multiple quantum simulators), enabling concurrent execution of classical and quantum tasks. Although not a performance study, we report measurable outcomes through the successful asynchronous scheduling and execution of multiple quantum workloads. To illustrate practical runtime implications, we decompose a four-qubit circuit into smaller subcircuits through a process known as quantum circuit cutting, reducing per-task quantum simulation load and demonstrating how task granularity can improve simulator throughput and reduce queueing behavior -- effects directly relevant to early quantum hardware environments. We conclude by outlining key challenges for scaling hybrid runtimes, including coordinated scheduling, classical-quantum interaction management, and support for diverse backend resources in heterogeneous systems.

Miniskar, Narasinga Rao [ORNL] (ORCID:000000018259↗