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At least 487 records · Page 27

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NASA NTRS1978

Reconfigurable modular computer networks for spacecraft on-board processing

The core electronics subsystems on unmanned spacecraft, which have been sent over the last 20 years to investigate the moon, Mars, Venus, and Mercury, have progressed through an evolution from simple fixed controllers and analog computers in the 1960's to general-purpose digital computers in current designs. This evolution is now moving in the direction of distributed computer networks. Current Voyager spacecraft already use three on-board computers. One is used to store commands and provide overall spacecraft management. Another is used for instrument control and telemetry collection, and the third computer is used for attitude control and scientific instrument pointing. An examination of the control logic in the instruments shows that, for many, it is cost-effective to replace the sequencing logic with a microcomputer. The Unified Data System architecture considered consists of a set of standard microcomputers connected by several redundant buses. A typical self-checking computer module will contain 23 RAMs, two microprocessors, one memory interface, three bus interfaces, and one core building block.

Rennels, D. A.↗

NASA NTRS1978

On-board data processing for the IRAS telescope system

Onboard data processing has been developed for the Infrared Astronomical Satellite (IRAS) telescope system to effectively utilize the RF bandwidth and minimize the ground-data processing costs. Use of filtering techniques, data deglitching circuits, and data encoding algorithms are combined with a microprocessor-controlled telescope system to achieve a system dynamic range of 100,000 with a noise equivalent flux density of no less than 10 to the minus 19th W/sq cm. Extraneous data, e.g., noise due to radiation hits, will be removed prior to transmission, thereby optimizing ground-data processing for the highest sensitivity and reliability. Simulation results are presented which demonstrate the advantages gained through the use of onboard data processing and illustrate the possible merging of these techniques with an array for the future evolution of 'smart' sensors.

Lum, H.↗

NASA NTRS1978

Integrated detector array preprocessing for infrared astronomical applications

On-board preprocessing of astronomical data from integrated infrared detector arrays and discrete detectors will allow increases in sensitivity and reductions in costs for observations from cryogenic space telescopes. A variety of preprocessing functions for this application, which could be implemented either through analog on-chip devices or through external microprocessors, is identified. Software simulations and laboratory evaluations are underway to determine the effectiveness of these preprocessing schemes.

Mccreight, C. R.↗

NASA NTRS1978

A study of standard building blocks for the design of fault-tolerant distributed computer systems

This paper presents the results of a study that has established a standard set of four semiconductor VLSI building-block circuits. These circuits can be assembled with off-the-shelf microprocessors and semiconductor memory modules into fault-tolerant distributed computer configurations. The resulting multi-computer architecture uses self-checking computer modules backed up by a limited number of spares. A redundant bus system is employed for communication between computer modules.

Rennels, D. A.↗

NASA NTRS1978

Fault tolerance using self-checking building-block computers

The paper attempts to define and characterize a set of VLSI (very large scale integration) building-block circuits which can be used to combine existing microprocessors and memories into a wide variety of fault-tolerant computing systems. Such VLSI circuits would transform fault-tolerant computing into an off-the-shelf technology and enable its routine use for new applications. The self-checking computer module (SCCM) is the basic component out of which fault-tolerant computer systems are constructed. Several fault-tolerant configurations of SCCM are discussed, including the standby redundant uniprocessor, the voted/hybrid uniprocessor, and the distributed computer network.

Rennels, D. A.↗

NASA NTRS1978

The digital control of an experiment to size particles using a laser

Efforts to automate an experiment for sizing particles using a laser is described. The objective of the experiment was to rotate a photomultiplier detector at various angles and to record data associated with how light interacted with a particle. The light source was a laser which was fixed in space. The design consisted of a step motor with a fabricated electromechanical system to rotate the photomultiplier. The use of an 8080 microprocessor based microcomputer to control the step motor and to log data is described.

Cross, J. E.↗

NASA NTRS1978

Real time mass flow computer for Arc Jet Wind Tunnel

Experiments at the Arc Jet Tunnel at Ames Research Center have typical run times of 5-10 sec during which the test model is subjected to an environment simulating reentry into Jupiter. Previous real-time determination of mass flow required off-line manual computations from taped or strip chart data. The present paper describes a computer which provides personnel with real-time computations of mass flow. Using an 8-bit microprocessor and standard TTL interface circuitry, the unit interrogates temperature and pressure instruments with other parameters to compute mass flow.

Vidal, J.↗

NASA NTRS1979

Improvement of scanning radiometer performance by digital reference averaging

Most radiometers utilize a calibration technique in which measurements of a known reference are subtracted from measurements of an unknown source so that common-mode bias errors are cancelled. When a radiometer is scanned over a varying scene, it produces a sequence of outputs, each being proportional to the difference between the reference and the corresponding input. A reference averaging technique is presented that employs a simple digital algorithm which exploits the asymmetry between the time-variable scene inputs and the nominally constant reference input by averaging many reference measurements to decrease the statistical uncertainty in the reference value. This algorithm is, therefore, optimized by an asymmetric chopping sequence in which the scene is viewed for more than one-half of the duty cycle (unlike the analog Dicke technique). Reference averaging algorithms are well within the capabilities of small microprocessors. Although this paper develops the technique for microwave radiometry, it may be beneficial for any system which measures a large number of unknowns relative to a known reference in the presence of slowly varying common-mode errors.

Bremer, J. C.↗

NASA NTRS1978

Implementation of real-time digital signal processing systems

Special purpose hardware implementation of DFT Computers and digital filters is considered in the light of newly introduced algorithms and IC devices. Recent work by Winograd on high-speed convolution techniques for computing short length DFT's, has motivated the development of more efficient algorithms, compared to the FFT, for evaluating the transform of longer sequences. Among these, prime factor algorithms appear suitable for special purpose hardware implementations. Architectural considerations in designing DFT computers based on these algorithms are discussed. With the availability of monolithic multiplier-accumulators, a direct implementation of IIR and FIR filters, using random access memories in place of shift registers, appears attractive. The memory addressing scheme involved in such implementations is discussed. A simple counter set-up to address the data memory in the realization of FIR filters is also described. The combination of a set of simple filters (weighting network) and a DFT computer is shown to realize a bank of uniform bandpass filters. The usefulness of this concept in arriving at a modular design for a million channel spectrum analyzer, based on microprocessors, is discussed.

Narasimha, M.↗

NASA NTRS1979

Automated management of power systems

APSM (Automated Power System Management) is a technology readiness program underway to develop, evaluate, and demonstrate various techniques involved in power system monitoring, as well as computational and control functions. The demonstration breadboard consists of the Viking Orbiter '75 power subassembly breadboard modified to incorporate dedicated microprocessors and digital interface circuits, as well as test support equipment for both spacecraft and ground computer simulation, fault simulation, and data acquisition.

Imamura, M. S.↗

NASA NTRS1979

Spacecraft automated operations

Trends in automation of planetary spacecraft are examined using data from missions as far back as Mariner '67 and up to the highly sophisticated Galileo. Nine design considerations which influence the degree of automation such as protection against catastrophic failures, highly repetitive functions, loss of spacecraft communications, and the need for near-real-time adaptivity are discussed. Rapid growth of automation is shown in terms of on-board hardware by plots of number of processors on board, the average speed of processors, and total core memory. The number of commands transmitted from the ground has grown to 5 million bits in Voyager, so that increases in mission complexity have increased both in spacecraft automation and ground operations. Achieving greater automation by transferring ground operations to the spacecraft with the current means of controlling missions, are considered noting proposed changes. For the future, improved computer technology, more microprocessors and increased core storage will be used, and the number of automated functions and their complexity will grow. It is concluded that using the growing computational capability of spacecraft will achieve more autonomy thus reversing the trend of increased mission complexity and cost.

Bird, T. H.↗

NASA NTRS1979

A Demonstration Advanced Avionics System for general aviation

A program initiated within NASA has emphasized the use of a data bus, microprocessors, electronic displays and data entry devices for general aviation. A Demonstration Advanced Avionics System (DAAS) capable of evaluating critical and promising elements of an integrating system that will perform the functions of (1) automated guidance and navigation; (2) flight planning; (3) weight and balance performance computations; (4) monitoring and warning; and (5) storage of normal and emergency check lists and operational limitations is described. Consideration is given to two major parts of the DAAS instrument panel: the integrated data control center and an electronic horizontal situation indicator, and to the system architecture. The system is to be installed in the Ames Research Center's Cessna 402B in the latter part of 1980; engineering flight testing will begin in the first part of 1981.

Denery, D. G.↗

NASA NTRS1979

Pioneer Venus large probe neutral mass spectrometer

The Pioneer Venus large probe neutral mass spectrometer (LNMS) uses a single focusing magnetic sector field mass analyzer with mass range of 1-208 amu, resolution sufficient to separate the mercury isotopes, and sensitivity sufficient to detect minor constituents in the 1 ppm range relative to the CO2 in the Venus atmosphere. A combination of ion and chemical pumping is used to maintain a vacuum in the mass analyzer and to remove the atmosphere gases which enter the ion source chamber through a special leak. A microprocessor controls the operation of the instrument through a highly efficient peak stepping and data compression program, permitting acquisition of a complete mass spectrum roughly once each minute.

Hoffman, J. H.↗

NASA NTRS1979

A 1.2 meter balloon-borne telescope for a submillimeter wave sky survey

A balloon-borne, 1.2 meter Cassegrain telescope designed for diffraction-limited imagery at 100 microns is being developed for a survey of the Galactic plane at submillimeter wavelengths. The telescope pointing system is servocontrolled using a gyroscope for the primary stabilization reference. Extensive use is made of microprocessors for flight sequencing, pointing control and stabilization, and telemetry formatting. A description of the telescope, helium-cooled detectors, and the orientation subsystems are presented together with a brief discussion of the proposed astronomical observations.

Silverberg, R. F.↗

NASA NTRS1978

Exploring team avionics systems by simulation

Configurations of software and hardware in a no-critical-element team architecture are under study for future general aviation aircraft avionics. The team integrated avionics system, based on microprocessors, can monitor and partially interpret all flight instrument data, engine parameters, and navigation information faster than a human pilot. Simulation programs based on an event-oriented simulation language are being used to design team architectures.

Brent, G. A.↗

NASA NTRS1979

Microcomputer programming skills

Some differences in skill and techniques required for conversion from programmer to microprogrammer are discussed. The primary things with which the programmer should work are hardware architecture, hardware/software trade off, and interfacing. The biggest differences, however, will stem from the differences in applications than from differences in machine size. The change to real-time programming is the most important of these differences, particularly on dedicated microprocessors. Another primary change is programming with a more computer-naive user in mind, and dealing with his limitations and expectations.

Barth, C. W.↗

NASA NTRS1978

NASA NR hydrogen maser

The Johns Hopkins University, Applied Physics Laboratory, under contract to NASA/Goddard Space Flight Center, is engineering a new generation of field operable hydrogen masers (NR) based on prior NASA NP and NX designs. These units incorporate improvements in magnetic shielding, lower noise electronics, better thermal control and have a microprocessor for operation, monitoring and diagnostic functions. They are ruggedly built for transportability and ease of service anywhere in the world.

Rueger, L. J.↗

NASA NTRS1979

Implementing a bubble memory hierarchy system

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Segura, R.↗