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An overview of the intermittent/transient (IT) fault study is presented. An interval survivability evaluation of digital systems for IT faults is discussed along with a method for detecting and diagnosing IT faults in digital systems.
The FTMP (Fault-Tolerant Multiprocessor) is a complex multiprocessor computer that employs a form of redundancy related to systems considered by Mathur (1971), in which each major module can substitute for any other module of the same type. Despite the conceptual simplicity of the redundancy form, the implementation has many intricacies owing partly to the low target failure rate, and partly to the difficulty of eliminating single-fault vulnerability. An extensive analysis of the computer through the use of such modeling techniques as Markov processes and combinatorial mathematics shows that for random hard faults the computer can meet its requirements. It is also shown that the maintenance scheduled at intervals of 200 hr or more can be adequate most of the time.
The proceedings of the first working group meeting on validation methods for fault tolerant computer design are presented. The state of the art in fault tolerant computer validation was examined in order to provide a framework for future discussions concerning research issues for the validation of fault tolerant avionics and flight control systems. The development of positions concerning critical aspects of the validation process are given.
Four wire Wye connected ac power systems exhibit peculiar steady state fault characteristics when the fourth wire of three phase induction motors is connected. The loss of one phase of power source due to a series or shunt fault results in currents higher than anticipated on the remaining two phases. A theoretical approach to compute the fault currents and voltages is developed. A FORTRAN program is included in the appendix.
A brief description of a SIFT (Software Implemented Fault Tolerance) Flight Control Computer with emphasis on implementation is presented. A multiprocessor system that relies on software-implemented fault detection and reconfiguration algorithms is described. A high level reliability and fault tolerance is achieved by the replication of computing tasks among processing units.
Analysis of repeated leveling observations in the vicinity of the San Gabriel Fault in Southern California indicate subsidence immediately south of the Fault relative to points to the north, south and east. These observations were previously interpreted as reflecting tectonic motions associated with either the 'Palmdale Bulge' or with preseismic effects of the San Fernando earthquake. Relative subsidence between 1953 and 1964 reaches approximately 9 cm and extends over a distance of more than 20 km. Subsidence occurs directly above the Saugus aquifer and shows a temporal correlation with the history of water level decline within the aquifer. The degree of subsidence of individual benchmarks is roughly proportional to the product of aquifer thickness and water level decline at the location of the benchmarks. Thses observations strongly suggest that movements of the surface near the San Gabriel Fault, previously inferred to be of tectonic origin, actually result from near surface sediment compaction within the Saugus basin.
The length of the Voyager mission and the communication delay caused by the distances involved made fault protection a necessary part of the Voyager Attitude and Articulation Control Subsystem (AACS) design. An overview of the Voyager attitude control fault protection is given and flight experiences relating to fault protection are provided.
In current spacecraft design, a trend can be observed to achieve greater fault tolerance through the application of on-board software dedicated to detecting and isolating failures. Whether fault tolerance through software can meet the desired objectives depends on very careful consideration and control of the system in which the software is imbedded. The considered investigation has the objective to provide some of the insight needed for the required analysis of the system. A description is given of the techniques which have been developed in this connection during the development of the Voyager spacecraft. The Voyager Galileo Attitude and Articulation Control Subsystem (AACS) fault tolerant design is discussed to emphasize basic lessons learned from this experience. The central driver of hardware redundancy implementation on Voyager was known as the 'single point failure criterion'.
A multilayer model of the Earth to calculate finite element of time dependent deformation and stress following an earthquake on a strike slip fault is discussed. The model involves shear properties of an elastic upper lithosphere, a standard viscoelastic linear solid lower lithosphere, a Maxwell viscoelastic asthenosphere and an elastic mesosphere. Systematic variations of fault and layer depths and comparisons with simpler elastic lithosphere over viscoelastic asthenosphere calculations are analyzed. Both the creep of the lower lithosphere and astenosphere contribute to the postseismic deformation. The magnitude of the deformation is enhanced by a short distance between the bottom of the fault (slip zone) and the top of the creep region but is less sensitive to the thickness of the creeping layer. Postseismic restressing is increased as the lower lithosphere becomes more viscoelastic, but the tendency for the width of the restressed zone to growth with time is retarded.
The design of a sensor fault tolerant system which uses analytical redundancy for the Terminal Configured Vehicle (TCV) research aircraft in a Microwave Landing System (MLS) environment was studied. The fault tolerant system provides reliable estimates for aircraft position, velocity, and attitude in the presence of possible failures in navigation aid instruments and onboard sensors. The estimates, provided by the fault tolerant system, are used by the automated guidance and control system to land the aircraft along a prescribed path. Sensor failures are identified by utilizing the analytic relationship between the various sensor outputs arising from the aircraft equations of motion.
Chip-level modeling techniques in the evaluation of fault tolerant systems were researched. A fault tolerant computer was modeled. An efficient approach to functional fault simulation was developed. Simulation software was also developed.
Investigations regarding the synthesis of a reliability assessment capability for fault-tolerant computer-based systems have been conducted for several years. In 1978 a pilot study was conducted to test the feasibility of measuring detection coverage and investigating the dynamics of fault propagation in a digital computer. A description is presented of an investigation concerned with the applicability of previous results to a real avionics processor. The obtained results show that emulation is a practicable approach to failure modes and effects analysis of a digital processor. The run time of the emulated processor on a PDP-10 host computer is only 20,000 to 25,000 times slower than the actual processor. As a consequence large numbers of faults can be studied at relatively little cost and in a timely manner.
Report describes technique using fault simulator implemented entirely in hardware to generate and optimize test vectors for microprocessor. Hardware fault simulator approach reduces test time, while maintaining high reliability in detecting faults.
A fault-tolerant multiprocessor with a rollback recovery mechanism is discussed. The rollback mechanism is based on the hardware recovery block which is a hardware equivalent to the software recovery block. The hardware recovery block is constructed by consecutive state-save operations and several state-save units in every processor and memory module. When a fault is detected, the multiprocessor reconfigures itself to replace the faulty component and then the process originally assigned to the faulty component retreats to one of the previously saved states in order to resume fault-free execution. A mathematical model is proposed to calculate both the coverage of multi-step rollback recovery and the risk of restart. A performance evaluation in terms of task execution time is also presented.
The results of fault injection experiments utilizing a gate-level emulation of the central processor unit of the Bendix BDX-930 digital computer are described. Several earlier programs were reprogrammed, expanding the instruction set to capitalize on the full power of the BDX-930 computer. As a final demonstration of fault coverage an extensive, 3-axis, high performance flght control computation was added. The stages in the development of a CPU self-test program emphasizing the relationship between fault coverage, speed, and quantity of instructions were demonstrated.
The design problem considered in the present investigation involves a nonlinear discrete time stochastic system where replicated sensors provide redundant observations of inputs and outputs of the system, compensate for sensor 'normal operating' bias levels, and generate reliable estimates for the plant states in the presence of possible sensor failures. The resulting fault tolerant design should utilize inherent analytical redundancy and be capable of detecting many different types and levels of sensor failures. In addition, it should have minimal complexity. In connection with these goals, a sensor fault tolerant system design methodology is developed. The performance of the considered approach to an application is discussed, taking into account the design of a sensor fault tolerant system using analytic redundancy for the Terminal Configured Vehicle research aircraft in a microwave landing system environment.
The implementation of software fault tolerance is investigated for critical modules of the Software Implemented Fault Tolerance (SIFT) operating system to support the computational and reliability requirements of advanced fly by wire transport aircraft. Fault tolerant designs generated for the error reported and global executive are examined. A description of the alternate routines, implementation requirements, and software validation are included.
The need for the application of software fault tolerance techniques in digital flight control systems is argued to follow from the requirements derivable from the safety constraints of such systems, requirements which can be stated in terms of minimum acceptable system reliability levels and, moreover, stated quantitatively. It is argued further that, while fault tolerance appears to be a viable mechanism in general, individual fault tolerance schemes need to be analyzed to ensure that they are adequate to the task and being properly utilized, that such analysis is essentially an exercise in software 'reliability' estimation involving software characteristics not currently included in software 'reliability' modeling (most especially, the degree of correlation of malfunctions among redundant, dissimilar software modules), and that, consequently, further research and studies in the characterization of software behavior and malfunctions is required.