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At least 487 records · Page 27

Compositionally Graded Multilayer Ceramic Capacitors

Multilayer ceramic capacitors (MLCC) are widely used in consumer electronics. In this paper, we provide a transformative method for achieving high dielectric response and tunability over a wide temperature range through design of compositionally graded multilayer (CGML) architecture. Compositionally graded MLCCs were found to exhibit enhanced dielectric tunability (70%) along with small dielectric losses (<2.5%) over the required temperature ranges specified in the standard industrial classifications. The compositional grading resulted in generation of internal bias field which enhanced the tunability due to increased nonlinearity. The electric field tunability of MLCCs provides an important avenue for design of miniature filters and power converters.

25 ENERGY STORAGE↗

Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads

Abstract This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate machine learning (ML) workloads. We conducted an exploration of device fabrication and proposed system-algorithm co-design to boost performance. A novel FeCap device, incorporating an interfacial layer (IL) and$$\text {Hf}_{0.5}\text {Zr}_{0.5}\text {O}_2$$ Hf 0.5 Zr 0.5 O 2 (HZO), ensures a reduction in operating voltage and enhances HZO scaling while being compatible with CMOS circuits. The IL also enriches ferroelectricity and retention properties. When integrated into crossbar arrays, FeCaps and FeFETs demonstrate their effectiveness as IMC components, eliminating sneak paths and enabling selector-less operation, leading to notable improvements in energy efficiency and area utilization. However, it is worth noting that limited capacitance ratios in FeCaps introduced errors in multiply-and-accumulate (MAC) computations. The proposed co-design approach helps in mitigating these errors and achieves high accuracy in classifying the CIFAR-10 dataset, elevating it from a baseline of 10% to 81.7%. FeFETs in crossbars, with a higher on-off ratio, outperform FeCaps, and our proposed charge-based sensing scheme achieved at least an order of magnitude reduction in power consumption, compared to prevalent current-based methods.

Science & Technology - Other Topics↗

Water sources and land capacitor effects stimulate observed summer Arctic moistening and warming

The primary sources of recent summer Arctic moistening trends in reanalysis are uncertain, hindering attribution of observed Arctic warming due to radiative effects from water vapor changes. Here, we use a combined online numerical water tracer and circulation nudging approach in the Community Earth System Model to track the sources of water vapor beyond its initial sources. Trends in boreal summer large-scale circulation have driven moistening of the Arctic over recent decades, having a large impact on the Arctic radiative budget, accounting for 94% of the strengthening water vapor radiative feedback. We identify two key regions supplying the Arctic water vapor feedback: Northeast North America and western/central Eurasia. In both regions, anticyclonic circulations over the southwest Atlantic and eastern Europe move moisture from the tropical oceans poleward to high latitude land through precipitation in winter and spring. During summer, evapotranspiration over land releases this water vapor, and it is transported by winds into the Arctic. We refer to this sequence of terrestrial moisture storage and release as the land capacitor effect. Thus, the impacts of circulation changes on poleward moisture transport and land-atmosphere interactions over high latitudes represent the underlying mechanisms of the recent moistening and warming in the Arctic.

Arctic amplification↗

Mechanical confinement for improved energy storage density in BNT-BT-KNN lead-free ceramic capacitors

With the advent of modern power electronics, embedded circuits and non-conventional energy harvesting, the need for high performance capacitors is bound to become indispensible. The current state-of-art employs ferroelectric ceramics and linear dielectrics for solid state capacitance. However, lead-free ferroelectric ceramics propose to offer significant improvement in the field of electrical energy storage owing to their high discharge efficiency and energy storage density. In this regards, the authors have investigated the effects of compressive stress as a means of improving the energy storage density of lead-free ferroelectric ceramics. The energy storage density of 0.91(Bi{sub 0.5}Na{sub 0.5})TiO{sub 3}-0.07BaTiO{sub 3}-0.02(K{sub 0.5}Na{sub 0.5})NbO{sub 3} ferroelectric bulk ceramic was analyzed as a function of varying levels of compressive stress and operational temperature .It was observed that a peak energy density of 387 mJ.cm{sup -3} was obtained at 100 MPa applied stress (25{sup o}C). While a maximum energy density of 568 mJ.cm{sup -3} was obtained for the same stress at 80{sup o}C. These values are indicative of a significant, 25% and 84%, improvement in the value of stored energy compared to an unloaded material. Additionally, material's discharge efficiency has also been discussed as a function of operational parameters. The observed phenomenon has been explained on the basis of field induced structural transition and competitive domain switching theory.

36 MATERIALS SCIENCE↗

Epitaxial GeSn film formed by solid phase epitaxy and its application to Yb{sub 2}O{sub 3}-gated GeSn metal-oxide-semiconductor capacitors with sub-nm equivalent oxide thickness

Through the technique of solid phase epitaxy (SPE), an epitaxial Ge{sub 0.955}Sn{sub 0.045} film was formed on a Ge substrate by depositing an amorphous GeSn film followed by a rapid thermal annealing at 550 °C. A process that uses a SiO{sub 2} capping layer on the amorphous GeSn film during SPE was proposed and it prevents Sn precipitation from occurring while maintaining a smooth surface due to the reduced surface mobility of Sn atoms. The high-quality epitaxial GeSn film was observed to have single crystal structure, uniform thickness and composition, and tiny surface roughness with root mean square of 0.56 nm. With a SnO{sub x}-free surface, Yb{sub 2}O{sub 3}-gated GeSn metal-oxide-semiconductor (MOS) capacitors with equivalent oxide thickness (EOT) of 0.55 nm were developed. A small amount of traps inside the Yb{sub 2}O{sub 3} was verified by negligible hysteresis in capacitance measurement. Low leakage current of 0.4 A/cm{sup 2} at gate bias of flatband voltage (V{sub FB})-1 V suggests the high quality of the gate dielectric. In addition, the feasibility of using Yb{sub 2}O{sub 3} to well passivate GeSn surface was also evidenced by the small interface trap density (D{sub it}) of 4.02 × 10{sup 11} eV{sup −1} cm{sup −2}, which can be attributed to smooth GeSn surface and Yb{sub 2}O{sub 3} valency passivation. Both leakage current and D{sub it} performance outperform other passivation techniques at sub-nm EOT regime. The proposed epitaxial GeSn film along with Yb{sub 2}O{sub 3} dielectric paves an alternative way to enable high-performance GeSn MOS devices.

36 MATERIALS SCIENCE↗

Performance of electrical double layer capacitors fabricated with gel polymer electrolytes containing Li{sup +} and K{sup +}-salts: A comparison

The comparative performance of the solid-state electrical double layer capacitors (EDLCs) based on the multiwalled carbon nanotube (MWCNT) electrodes and poly (vinaylidinefluoride-co-hexafluoropropyline) (PVdF-HFP) based gel polymer electrolytes (GPEs) containing potassium and lithium salts have been studied. The room temperature ionic conductivity of the GPEs have been found to be ∼3.8×10{sup −3} and 5.9×10{sup −3} S cm{sup −1} for lithium and potassium based systems. The performance of EDLC cells studied by impedance spectroscopy, cyclic voltammetry and constant current charge-discharge techniques, indicate that the EDLC with potassium salt containing GPE shows excellent performance almost equivalent to the EDLC with Li-salt-based GPE.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Particle-in-cell simulations of magnetically driven reconnection using laser-powered capacitor coils

In this study, we propose an experimental scheme to fulfill magnetically driven reconnections. Here, two laser beams are focused on a capacitor-coil target and then strong currents are wired in two parallel circular coils. Magnetic reconnection occurs between the two magnetic bubbles created by the currents in the two parallel circular coils. A two-dimensional particle-in-cell simulation model in the cylindrical coordinate is used to investigate such a process, and the simulations are performed in the ( r , z ) plane. The results show that with the increase of the currents in the two coils, the associated magnetic bubbles expand and a current sheet is formed between the two bubbles. Magnetic reconnection occurs when the current sheet is sufficiently thin. A quadrupole structure of the magnetic field in the θ direction ( B θ ) is generated in the diffusion region and a strong electron current along the r direction ( J e r ) is also formed due to the existence of the high-speed electron flow away from the X line in the center of the outflow region. Finally, because the X line is a circle along the θ direction, the convergence of the plasma flow around r = 0 will lead to the asymmetry of J e r and B θ between the two outflow regions of magnetic reconnection.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

High-resolution radiation detection using Ni/SiO 2 /n-4H-SiC vertical metal-oxide-semiconductor capacitor

In this article, we demonstrate the radiation detection performance of vertical metal-oxide-semiconductor (MOS) capacitors fabricated on 20 μm thick n-4H-SiC epitaxial layers with the highest energy resolution ever reported. The 100 nm SiO2 layer was achieved on the Si face of n-4H-SiC epilayers using dry oxidation in air. The Ni/SiO2/n-4H-SiC MOS detectors not only demonstrated an excellent energy resolution of 0.42% (ΔE/E 100) for 5.48 MeV alpha particles but also caused a lower enhancement in the electronic noise components of the spectrometer compared with that observed for the best high-resolution Schottky barrier detectors. The MOS detectors also exhibited a high charge collection efficiency (CCE) of 96% at the optimized operating bias despite the presence of the oxide layer. A drift-diffusion model applied to the CCE vs gate bias voltage data revealed a minority (hole) carrier diffusion length of 24 μm. Capacitance mode deep level transient spectroscopy (C-DLTS) scans in the temperature range 84–800 K were carried out to identify the resolution limiting electrically active defects. Interestingly, the C-DLTS spectra revealed both positive and negative peaks, indicating the simultaneous presence of electron (majority) and hole (minority) trap centers. It has been inferred that at the steady-state bias for the C-DLTS measurement, the MOS detector operates in the inversion mode at certain device temperatures, causing holes to populate the minority trap centers and, hence, manifests minority carrier peaks as well.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Low voltage AC electroluminescence in silicon MOS capacitors

Low power silicon based light source and detector are attractive for on-chip photonic circuits given their ease of process integration. However, conventional silicon light emitting diodes emit photons with energies near the band edge where the corresponding silicon photodetectors lack responsivity. On the other hand, previously reported hot carrier electroluminescent silicon devices utilizing a reverse biased diode require high operating voltages. Here, we investigate hot carrier electroluminescence in silicon metal–oxide–semiconductor capacitors operating under transient voltage conditions. Further, during each voltage transient, large energy band bending is created at the edge of the source contact, much larger than what is achievable at a steady state. As a result, electrons and holes are injected efficiently from a single source contact into the silicon channel at the corresponding voltage transient, where they subsequently undergo impact ionization and phonon-assisted interband recombination. Notably, we show low voltage operation down to 2.8 V by using a 20 nm thick high-κ gate dielectric. We show further voltage scaling is possible by reducing the gate dielectric thickness, thus presenting a low voltage platform for silicon optoelectronic integrated circuits.

42 ENGINEERING↗

Electrically driven light emission from single quantum dots using pulsed MOS capacitors

Robust, nanoscale light-emitting devices are attractive for emerging photonic and quantum engineering applications. However, conventional approaches suffer from fabrication challenges or lack the potential to address individual nanostructures, such as quantum dots. In this paper, we present a device that can produce electrically driven light emission from a single quantum dot using a single carbon nanotube as the charge injection contact. Here, the device has a metal-oxide-semiconductor capacitor structure and operates based on an unconventional mechanism of electroluminescence, which relies on the use of bipolar voltage pulses. The proposed device can be fabricated in a simple manner using conventional lithographic processes, offering a scalable approach toward the development of optoelectronic devices at the single dot level.

42 ENGINEERING↗

Electrode chemistry impact on retention performance of ferroelectric hafnium zirconium oxide (Hf 0.5 Zr 0.5 O 2−x ) capacitors

Polarization retention of 10 nm thick ferroelectric hafnium zirconium oxide (Hf 0.5 Zr 0.5 O 2−x , HZO) capacitors with W and TaN electrodes is investigated over temperatures ranging from 85 to 150 °C. Same state and opposite state polarization margins for devices with W electrodes show minimal retention loss after 10 5 at 150 °C. The devices capped with TaN electrodes show excellent same state retention, but the opposite state polarization margin in the TaN-electrode devices displays 40% retention loss at 150 °C after 10 5 s. The TaN-capped devices exhibit a more pronounced imprint, which is attributed to an increased oxygen vacancy content (compared to W-capped devices). The increased oxygen vacancy content in the TaN-capped devices is supported by photoluminescence and leakage current measurements. In addition, TaN-capped devices have chemically diffuse electrode–HZO interfaces; more abrupt interfaces are present in the W-capped devices. The presence of interfacial phases in the TaN-capped devices may lead to larger depolarization fields due to reduced charge screening. The results from this study provide further evidence that for HZO ferroelectric devices the electrode can significantly impact polarization retention behavior due to differences in oxygen vacancy concentration and formation of non-ferroelectric interfacial layers.

36 MATERIALS SCIENCE↗

Can ionophobic nanopores enhance the energy storage capacity of electric-double-layer capacitors containing nonaqueous electrolytes?

The ionophobicity effect of nanoporous electrodes on the capacitance and the energy storage capacity of nonaqueous-electrolyte supercapacitors is studied by means of the classical density functional theory (DFT). It has been hypothesized that ionophobic nanopores may create obstacles in charging, but they store energy much more efficiently than ionophilic pores. In this paper, we find that, for both ionic liquids and organic electrolytes, an ionophobic pore exhibits a charging behavior different from that of an ionophilic pore, and that the capacitance–voltage curve changes from a bell shape to a two-hump camel shape when the pore ionophobicity increases. For electric-double-layer capacitors containing organic electrolytes, an increase in the ionophobicity of the nanopores leads to a higher capacity for energy storage. Without taking into account the effects of background screening, the DFT predicts that an ionophobic pore containing an ionic liquid does not enhance the supercapacitor performance within the practical voltage ranges. However, by using an effective dielectric constant to account for ion polarizability, the DFT predicts that, like an organic electrolyte, an ionophobic pore with an ionic liquid is also able to increase the energy stored when the electrode voltage is beyond a certain value. We find that the critical voltage for an enhanced capacitance in an ionic liquid is larger than that in an organic electrolyte. Finally, our theoretical predictions provide further understanding of how chemical modification of porous electrodes affects the performance of supercapacitors.

25 ENERGY STORAGE↗

Analog pile-up circuit technique using a single capacitor for the readout of Skipper-CCD detectors

With Skipper-CCD detectors it is possible to take multiple samples of the charge packet collected on each pixel. After averaging the samples, the noise can be extremely reduced allowing the exact counting of electrons per pixel. In this work we present an analog circuit that, with a minimum number of components, applies a double slope integration (DSI) and at the same time averages the multiple samples, producing at its output the pixel value with sub-electron noise. For this purpose, we introduce the technique of using the DSI integrator capacitor to add the skipper samples. An experimental verification using discrete components is presented, together with an analysis of its noise sources and limitations. After averaging 400 samples it was possible to reach a readout noise of 0.18 e- rms/pix, comparable to other available readout systems. Due to its simplicity and significant reduction of the sampling requirements, this circuit technique is of particular interest in particle experiments and cameras with a high density of Skipper-CCDs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Simulation and Experimental Results of Interdigital Capacitor (IDC) Sensors to Monitor Insulation Degradation of Cables

The efficacy of using interdigital capacitor (IDC) sensors to monitor cable insulation aging was studied through electromagnetic simulations and experimental measurements. Simulation results on both planar and conformal dielectric materials indicated that IDCs on thin substrates and with conducting backplanes provide superior performance in terms of higher capacitance. An airgap study showed that even a very small airgap between the sensor and the cable’s insulation results in significant reduction in capacitance; therefore, airgaps should be minimized. Finally, cables that underwent accelerated aging exposure in an oven were tested using fabricated IDC sensors. Measurement results showed a 12.5% increase in capacitance when the IDC was pressed against the insulation versus a 91.3% increase in capacitance when the IDC was pressed against the jackets of the cables for cable specimens ranging from unaged to aged 35 days.

Cable NDE, Interdigital Capacitance↗

DC Impedance Model of MMC Considering Capacitor Voltage and Circulating Current Dynamics

The modular multilevel converter (MMC) is regarded as a competitive choice for future dc grids at high and medium voltage levels. To study the dc grid stability, a few MMC dc impedance models have been proposed, but their accuracy is limited by the assumption of ideal submodule voltage or neglecting the circulating current control. In this paper, a more accurate MMC dc impedance model is developed considering both the submodule capacitor voltage and circulating current dynamics. Simulation and experiment results indicate that the developed model matches with the actual MMC better than state-of-art models and can predict the dc system stability correctly.

Kong, Le↗

First Demonstration of Vertical 2T-nC FeRAM Hybrid Cell and its Scalability for High-Density 3D Ferroelectric Capacitor Memory

In this article, we perform a comprehensive experimental and modeling study into the scaling of vertical 2T-nC ferroelectric random-access memory (FeRAM) hybrid cell to demonstrate a high performance and high-density 3D capacitor memory. We demonstrate: i) first time successful integration of the vertical 2T-3C FeRAM cell by stacking the vertical metal-ferroelectricmetal (MFM) stack on top of Si CMOS transistors; ii) successful experimental operation of the memory cell, including the quasi-nondestructive read out (QNRO) of the polarization without write back after 106 read cycles; iii) the write bit line (WBL) heavily screens the coupling between neighboring strings, making it a minor concern; V ) aggressive stacking of the WBLs, i.e., number of MFMs in a string, could facilitate the self-boosting during write operation due to ferroelectric linear capacitance (CFE), which allows self-boosted inhibition for Vw/2 scheme and worsens the Vw/3 scheme as disturb increases to intolerable 2Vw/3; v) aggressive horizontal scaling significantly increases the read disturb to cells on neighboring planes due to capacitance between two WBLs (Cz).

42 ENGINEERING↗

Modeling of RMS Current in CSI Filter Capacitor and Minimum Conduction Loss Operation of CSI-Fed PMSM Drives for Traction Applications

This paper presents a new minimum conduction loss (MCL) torque control algorithm for current source inverter- (CSI-) fed permanent-magnet synchronous machine drives that improves the overall machine drive efficiency by minimizing the combined conduction losses in the inverter and machine at each operating point. First, analytical models of conduction losses in CSI-fed motor drives are presented, and a closed-form expression for optimal d-axis stator current to achieve MCL operation is derived. An expression for the rms current in both wye- and delta-connected CSI output capacitors is derived. A detailed simulation model that emulates the operation of a 100 kW SiC CSI-fed integrated machine drive (IMD) has been developed based on experimental results and finite element analysis. This simulation model is used to evaluate the proposed MCL control algorithm applied to a CSI-fed IMD system for a battery-electric vehicle traction drive, and the predicted total drive system loss with MCL control is compared to predicted losses with maximum-torque-per-ampere (MTPA) and minimum dc-link current (MDCC) control. Results show that MCL control can achieve loss reductions compared to the other two control algorithms over a wide range of operating conditions, with significant loss reductions >20% in the medium-speed regime.

42 ENGINEERING↗

A Fundamental Frequency Sorting Algorithm for Capacitor Voltage Balance of Modular Multilevel Converter With Low-Frequency Carrier Phase Shift Modulation

This paper proposes a fundamental frequency sorting algorithm for balancing the floating capacitors in modular multilevel converters with low-frequency carrier phase shift modulation. The relationship between the driving pulses and submodules (SMs) is rebuilt in every fundamental period by sorting the voltage increments and present voltages. Besides, an improved and simplified strategy is proposed to predict the charging abilities of the driving pulses, so as to avoid sorting the voltage increments. Based on the proposed method, the switching frequency of each power device and the carrier frequency are identical, which reduces the operational losses for applications regarding high power. At the same time, the sorting frequency is as low as the fundamental frequency, which alleviates a large amount of computational cost, and the necessity to measure arm currents is omitted. In this case, the arm current sensors are eliminated, and simplified communication among the central controller and the local ones is set up. Finally, a three-phase 1-MVA simulation platform with 120 SMs and a down-scaled 6-kVA experimental prototype with 48 SMs are constructed to validate the proposed approach.

42 ENGINEERING↗