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DOE OSTI2024

Fiber optic computing using distributed feedback

Abstract The widespread adoption of machine learning and other matrix intensive computing algorithms has renewed interest in analog optical computing, which has the potential to perform large-scale matrix multiplications with superior energy scaling and lower latency than digital electronics. However, most optical techniques rely on spatial multiplexing, requiring a large number of modulators and detectors, and are typically restricted to performing a single kernel convolution operation per layer. Here, we introduce a fiber-optic computing architecture based on temporal multiplexing and distributed feedback that performs multiple convolutions on the input data in a single layer. Using Rayleigh backscattering in standard single mode fiber, we show that this technique can efficiently apply a series of random nonlinear projections to the input data, facilitating a variety of computing tasks. The approach enables efficient energy scaling with orders of magnitude lower power consumption than GPUs, while maintaining low latency and high data-throughput.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2024

Local structure effects of carbon-doping on the phase change material Ge 2 Sb 2 Te 5

Ge 2 Sb 2 Te 5 is used in phase change memory, a nonvolatile memory technology, due to its phase change properties. The primary advantage of phase change memory over the state-of-the-art (flash memory) is its simple and small device geometry, which allows for denser nodes and lower power consumption. In phase change memory, resistive heating induces fast switching between the high resistance amorphous and low resistance crystalline phases, corresponding to storage of low and high digital states, respectively. However, the instability of the amorphous phase of Ge 2 Sb 2 Te 5 presents issues with processing and long-term data storage; such issues can be resolved by C doping, which stabilizes the amorphous phase and raises the crystallization temperature. To better understand the local structural effects of C doping on Ge 2 Sb 2 Te 5 , in situ Ge K-edge X-ray absorption spectroscopy measurements were taken during heating of films with various C doping concentrations. Here, the range of structural transformation temperatures derived from X-ray absorption near-edge structure analysis across the C doping series proved narrower than crystallization temperatures reported in similar in situ X-ray diffraction experiments, which may reflect changes in local structure that precede long-range ordering during crystallization. In addition, rigorous extended X-ray absorption fine structure fitting across and between temperature series revealed effects of C doping on the rigidity of Ge–Te bonds at low (2 at% and 4 at%) C concentrations.

Langhout, John D.↗

DOE OSTI2021

A domain wall-magnetic tunnel junction artificial synapse with notched geometry for accurate and efficient training of deep neural networks

Inspired by the parallelism and efficiency of the brain, several candidates for artificial synapse devices have been developed for neuromorphic computing, yet a nonlinear and asymmetric synaptic response curve precludes their use for backpropagation, the foundation of modern supervised learning. Spintronic devices—which benefit from high endurance, low power consumption, low latency, and CMOS compatibility—are a promising technology for memory, and domain-wall magnetic tunnel junction (DW-MTJ) devices have been shown to implement synaptic functions such as long-term potentiation and spike-timing dependent plasticity. In this work, we propose a notched DW-MTJ synapse as a candidate for supervised learning. Using micromagnetic simulations at room temperature, we show that notched synapses ensure the non-volatility of the synaptic weight and allow for highly linear, symmetric, and reproducible weight updates using either spin transfer torque (STT) or spin–orbit torque (SOT) mechanisms of DW propagation. We use lookup tables constructed from micromagnetics simulations to model the training of neural networks built with DW-MTJ synapses on both the MNIST and Fashion-MNIST image classification tasks. Accounting for thermal noise and realistic process variations, the DW-MTJ devices achieve classification accuracy close to ideal floating-point updates using both STT and SOT devices at room temperature and at 400 K. Our work establishes the basis for a magnetic artificial synapse that can eventually lead to hardware neural networks with fully spintronic matrix operations implementing machine learning.

42 ENGINEERING↗

DOE OSTI2022

The ultrafast pixel array camera system and its applications in high energy density physics

Diagnostics in high energy density physics, shock physics, and related fields are primarily driven by a need to record rapidly time-evolving signals in single-shot events. These measurements are often limited by channel count and signal degradation issues on cable links between the detector and digitizer. Here we present the Ultrafast Pixel Array Camera (UPAC), a compact and flexible detector readout system with 32 waveform-recording channels at up to 10 Gsample/s and 1.8 GHz analog bandwidth. The compact footprint allows the UPAC to be directly embedded in the detector environment. A key enabling technology is the PSEC4A chip, an eight-channel switch-capacitor array sampling device with up to 1056 samples/channel. The UPAC system includes a high-density input connector that can plug directly into an application-specific detector board, programmable control, and serial readout, with less than 5 W of power consumption in full operation. We present the UPAC design and characterization, including a measured timing resolution of ~20 ps or better on acquisitions of sub-nanosecond pulses with minimal system calibrations. Example applications of the UPAC are also shown to demonstrate operation of a solid-state streak camera, an ultrafast imaging array, and a neutron time-of-flight spectrometer.

47 OTHER INSTRUMENTATION↗

DOE OSTI2025

Harnessing ferro-valleytricity in pentalayer rhombohedral graphene for memory and compute

Two-dimensional materials with multiple degrees of freedom, including spin, valleys, and orbitals, open up an exciting avenue for engineering multifunctional devices. Beyond spintronics, these degrees of freedom can lead to novel quantum effects such as valley-dependent Hall effects and orbital magnetism, which could revolutionize next-generation electronics. However, achieving independent control over valley polarization and orbital magnetism has been a challenge due to the need for large electric fields. A recent breakthrough involving pentalayer rhombohedral graphene has demonstrated the ability to individually manipulate anomalous Hall signals and orbital magnetic hysteresis, forming what is known as a valley-magnetic quartet. Here, we leverage the electrically tunable ferro-valleytricity of pentalayer rhombohedral graphene to develop nonvolatile memory and in-memory computation applications. We propose an architecture for a dense, scalable, and selector-less nonvolatile memory array that harnesses the electrically tunable ferro-valleytricity. In our designed array architecture, nondestructive read and write operations are conducted by sensing the valley state through two different pairs of terminals, allowing for independent optimization of read/write peripheral circuits. The power consumption of our PRG-based array is remarkably low, with only ∼6 nW required per write operation and ∼2.3 nW per read operation per cell. This consumption is orders of magnitude lower than that of the majority of state-of-the-art cryogenic memories. Additionally, we engineer in-memory computation by implementing majority logic operations within our proposed nonvolatile memory array without modifying the peripheral circuitry. In conclusion, our framework presents a promising pathway toward achieving ultra-dense cryogenic memory and in-memory computation capabilities.

2D materials↗

DOE OSTI2025

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS↗

DOE OSTI2025

A compact low-level RF control system for advanced concept compact electron linear accelerator

A compact low-level RF (LLRF) control system based on RF system-on-chip (RFSoC) technology has been designed for the Advanced Concept Compact Electron Linear-accelerator (ACCEL) program, which has challenging requirements in both RF performance and size, weight, and power consumption (SWaP). The compact LLRF solution employs the direct RF sampling technique of RFSoC, which samples the RF signals directly without any analog upconversion and downconversion. Compared with the conventional heterodyne based architecture used for the LLRF system of a linear accelerator (LINAC), the elimination of analog mixers can significantly reduce the size and weight of the system, especially with LINAC requiring a larger number of RF channels. Based on the requirements of ACCEL, a prototype LLRF platform has been developed, and the control schemes have been proposed. The prototype LLRF system demonstrated magnitude and phase fluctuation levels below 1% and 1° on the flattop of a 2 μs RF pulse. The LLRF control schemes proposed for ACCEL are implemented with a prototype hardware platform. In conclusion, this paper will introduce the new compact LLRF solution and summarize a selection of experimental test results of the prototype itself and with the accelerating structure cavities designed for ACCEL.

Liu, C. [SLAC National Accelerator Laboratory (SLA↗

DOE OSTI2020

Miniature quantum frequency standard based on the phenomenon of coherent population trapping in vapours of {sup 87}Rb atoms

We report the results of the development and production of a quantum frequency standard (QFS) based on the coherent population trapping (CPT) resonance observed on the D{sub 1} absorption line of {sup 87}Rb atoms. The effect of various physical factors on the QFS frequency is studied, and the optimal physical parameters of the device to attain the best frequency stability are determined. The measured relative frequency instability (Allan deviation) is ∼9 × 10{sup −12} for the averaging time of 1 s, 3 ×10{sup −13} for 1000 s, and 1.5 ×10{sup −12} for 24 hours. For a volume of 60 cm{sup 3}, the power consumption of the entire device is 300 mW. The designed QFS can be used in a new-generation satellite navigation systems with increased accuracy and reliability, as well as for solving a number of other problems of science and technology. (paper)

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2021

Impact of soil model complexity on the long-term thermal performance prediction of a new shallow bore ground heat exchanger

Shallow bore ground heat exchangers have been investigated in recent years because they have the potential to reduce the initial cost of the ground source heat pump system. Correctly modeling the transient heat transfer between the ground heat exchanger and the surrounding soil is essential for predicting a ground heat exchanger's performance. Simplification of the soil model could increase computation speed but sacrifice accuracy. This study investigates the impact of the soil model complexity on the annual performance prediction of a new shallow bore ground heat exchanger, the underground thermal battery (UTB). A simple 1D soil model and a more detailed 2D soil model were implemented, and they were validated against a 3D soil model. Overall, the resulting predictions of the UTB’s response from the 1D and 2D models to a given thermal load in different climates were compared. The results show that the root mean square differences between the hourly temperatures of the UTB during a year predicted using the two soil models range from 1.17°C to 3.39°C. As a result, the difference in the annual power consumption of the heat pump was between 0.7% and 3.4%. Furthermore, the dimensions of the UTB affected its performance, and a longer UTB was less sensitive to the soil models.

42 ENGINEERING↗

DOE OSTI2021

Metal Chalcogenides for Neuromorphic Computing: Emerging Materials and Mechanisms

The approaching end of Moore's Law scaling has significantly accelerated multiple fields of research including neuromorphic-, quantum-, and photonic computing, each of which possesses unique benefits unobtained through conventional binary computers. One of the most compelling arguments for neuromorphic computing systems is power consumption, noting that computations made in the human brain are approximately 106 times more efficient than conventional CMOS logic. This review article focuses on the materials science and physical mechanisms found in metal chalcogenides that are currently being explored for use in neuromorphic applications. We begin by reviewing the key biological signal generation and transduction mechanisms within neuronal components of mammalian brains and subsequently compare with observed experimental measurements in chalcogenides. With robustness and energy efficiency in mind, we will focus on short-range mechanisms such as structural phase changes and correlated electron systems that can be driven by low-energy stimuli, such as temperature or electric field. We aim to highlight fundamental materials research and existing gaps that need to be overcome to enable further integration or advancement of metal chalcogenides for neuromorphic systems.

36 MATERIALS SCIENCE↗

DOE OSTI2020

Muon radiography applied to volcanoes imaging: the MURAVES experiment at Mt. Vesuvius

Muon radiography is a technique based on the measurement of absorption profiles of muons as they pass through matter. This measurement allows to obtain an image of the inner structure of large volume objects and is suitable to be applied in several fields, such as volcanology, archaeology and civil engeneering. One of the main applications concerns the study of volcanic structures; indeed it is possible to use this technique to measure the mass distribution inside the edifice of a volcano providing useful information to better understand the possible eruption mechanisms. The MURAVES (MUon RAdiography of VESuvius) project aims to the study of the summital cone of Mt. Vesuvius near Naples in Italy, one of the most dangerous active volcanoes in the world. The MURAVES apparatus is a modular, robust muon hodoscope system with a low power consumption, optimized to be used in inhospitable environments like the surroundings of volcanoes. The complete detection system is an array of identical tracking modules, each with an area of 1 m2, based on the use of plasic scintillators. The technologies, the status and the data analysis strategy of the experiment will be presented in this paper.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2020

Characterization of a gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream receiver channels, a downstream transmitter channel, and an Inter-Integrated Circuit (I2C) slave. The upstream channels receive the data at 5.12 Gbps passing through 5-meter 34-American Wire Gauge (AWG) Twin-axial (Twinax) cables, equalize and retime them with a recovered clock, and then drive an optical transmitter. The downstream channel receives the data at 2.56 Gbps from an optical receiver and drives the cable as same as the upstream channels. The jitter of the upstream channel output is measured to be 35 ps (peak-peak) when the Clock-Data Recovery (CDR) module is turned on and the jitter of the downstream channel output after the cable is 138 ps (peak-peak). The power consumption of each upstream channel is 72 mW when the CDR module is turned on and the downstream channel consumes 27 mW. GBCR survives the total ionizing dose of 200 kGy.

47 OTHER INSTRUMENTATION↗

DOE OSTI2020

Performance of a Front End prototype ASIC for picosecond precision time measurements with LGAD sensors

For the High-Luminosity phase of LHC, the ATLAS experiment is proposing the addition of a High Granularity Timing Detector (HGTD) in the forward region, to mitigate the effects of the increased pile-up. The chosen detection technology is Low Gain Avalanche Detector (LGAD) silicon sensors that can provide an excellent timing resolution below 50 ps. The front-end read-out ASIC must exploit the large signal derivative and small noise provided by the sensor, while keeping low power consumption. This paper presents the results on the first prototype of a front-end ASIC, named ALTIROC0, which contains the analog stages (preamplifier and discriminator) of the read-out chip. The ASIC was characterised both alone and as part of a module with a 2×2 LGAD array of 1.1×1.1 mm 2 pads bump-bonded to it. The various contributions of the electronics to the time resolution were investigated in test-bench measurements with a calibration setup. Both when the ASIC is alone or with a bump-bonded sensor, the jitter of the ASIC is better than 20 ps for an injected charge of 10 fC. The time walk effect, which arises from the different preamplifier response for various injected charges, can be corrected up to 10 ps using a Time Over Threshold measurement. The combined performance of the ASIC and the LGAD sensor, which was measured during a beam test campaign in October 2018 with pions of 120 GeV energy at the CERN SPS, is around 40 ps for all measured modules. All tested modules show good efficiency and time resolution uniformity.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2020

Investigation of ASIC-based signal readout electronics for LEGEND-1000

LEGEND, the Large Enriched Germanium Experiment for Neutrinoless ββ Decay, is a ton-scale experimental program to search for neutrinoless double beta (0νββ) decay in the isotope 76 Ge with an unprecedented sensitivity. Building on the success of the low-background 76 Ge-based GERDA and Majorana Demonstrator experiments, the LEGEND collaboration is targeting a signal discovery sensitivity beyond 10 28 yr on the decay half-life with approximately 10 t∙yr of exposure. Signal readout electronics in close proximity to the detectors plays a major role in maximizing the experiment's discovery sensitivity by reducing electronic noise and improving pulse shape analysis capabilities for the rejection of backgrounds. However, the proximity also poses unique challenges for the radiopurity of the electronics. Application-specific integrated circuit (ASIC) technology allows the implementation of the entire charge sensitive amplifier (CSA) into a single low-mass chip while improving the electronic noise and reducing the power consumption. In this work, we investigated the properties and electronic performance of a commercially available ASIC CSA, the XGLab CUBE preamplifier, together with a p-type point contact high-purity germanium detector. We show that low noise levels and excellent energy resolutions can be obtained with this readout. Moreover, we demonstrate the viability of pulse shape discrimination techniques for reducing background events.

47 OTHER INSTRUMENTATION↗

DOE OSTI2021

Design, upgrade and characterization of the silicon photomultiplier front-end for the AMIGA detector at the Pierre Auger Observatory

AMIGA (Auger Muons and Infill for the Ground Array) is an upgrade of the Pierre Auger Observatory to complement the study of ultra-high-energy cosmic rays (UHECR) by measuring the muon content of extensive air showers (EAS). It consists of an array of 61 water Cherenkov detectors on a denser spacing in combination with underground scintillation detectors used for muon density measurement. Each detector is composed of three scintillation modules, with 10 m 2 detection area per module, buried at 2.3 m depth, resulting in a total detection area of 30 m 2 . Silicon photomultiplier sensors (SiPM) measure the amount of scintillation light generated by charged particles traversing the modules. In this paper, the design of the front-end electronics to process the signals of those SiPMs and test results from the laboratory and from the Pierre Auger Observatory are described. Compared to our previous prototype, the new electronics shows a higher performance, higher efficiency and lower power consumption, and it has a new acquisition system with increased dynamic range that allows measurements closer to the shower core. The new acquisition system is based on the measurement of the total charge signal that the muonic component of the cosmic ray shower generates in the detector.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2021

Recovery of coincident frequency domain multiplexed detector pulses using sequential deconvolution

Multiplexing of radiation detector signals into a single channel significantly reduces the need for a large number of digitizer channels, which reduces the cost and the power consumption of a data acquisition system. We previously demonstrated frequency domain multiplexing by convolution using a prototype system that multiplexed two EJ-309 organic scintillators signals into a single channel. Each detector pulse was converted to a damped sinusoid which was then combined into a single channel. The combined signal was digitized and the original detector signal was recovered from the damped sinusoid by deconvolution. In this paper, we demonstrate the recovery of multiple detector signals that arrive during the same digitized record via a new sequential deconvolution method. Here, when two detectors produce signals in the same digitized record and their pulses do not overlap in time, we found that the charge, arrival time, and particle type can be estimated fairly precisely for the first pulse, but the second pulse exhibits substantial degradation in the precision of the estimated charge and arrival time. When the pulses overlap in time, we demonstrate both theoretically and experimentally that the part of the first pulse that does not overlap with the second can be recovered accurately, so the arrival time and amplitude of the first pulse can be estimated fairly precisely, but not the charge or particle type. None of these quantities can be estimated precisely for the second pulse when the two pulses overlap.

47 OTHER INSTRUMENTATION↗

DOE OSTI2021

Characterization and QC practice of 16-channel ADC ASIC at cryogenic temperature for Liquid Argon TPC front-end readout electronics system in DUNE experiment

ColdADC is a low-noise 16-channel analog-to-digital converter ASIC designed for cold readout electronics of Liquid Argon Time Projection Chambers (LArTPCs) in the Deep Underground Neutrino Experiment (DUNE). ColdADC was specifically designed for operation at cryogenic temperatures (77 K–89 K). Cold electronics is considered to be an enabling technology for liquid argon detectors in neutrino experiments. The main function of the chip is to digitize signals from the 16-channel charge-sensitive amplifier designed at BNL (LArASIC) and send digitized signals to the data aggregator and serializer chip (COLDATA). ColdADC operates with a resolution of 12 bits and a sampling rate of 2 MS/s per channel. A complete characterization of prototype chips was conducted at cryogenic temperature, involving power consumption, noise and linearity performance. In the first DUNE Far-Detector module, 384000 data channels will be read out, corresponding to 24000 ColdADC chips. Therefore, systematic testing of ColdADC chips at cryogenic temperature is vital for the quality and reliability of DUNE Single-Phase modules. We have developed a Quality Control (QC) test stand that includes ColdADC evaluation and characterization at cryogenic temperature. The QC procedure was applied to a first batch of 33 chips, corresponding to 528 data channels. The obtained results meet all the required DUNE specifications for ColdADC. Moreover, the testing outcome allowed us to identify possibilities of performance optimization that are currently being addressed in the design of the next version of the chip. The Quality Control procedure is proved to be successful and will be a reference design for future large-batch production testing of final ColdADC ASICs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2021

In-pixel automatic threshold calibration for the CMS Endcap Timing Layer readout chip

We present the implementation and verification of an in-pixel automatic threshold calibration circuit for the CMS Endcap Timing Layer (ETL) in the High-Luminosity LHC upgrade. The discriminator threshold of the ETL readout chip (ETROC) needs to be calibrated regularly to mitigate the circuit baseline change. Traditional methods need a lot of communication through a slow control system hence are time-consuming. This paper describes an in-pixel automatic scheme with improvements in operating time and usability. In this scheme, a sample-accumulation circuit is used to measure the average discriminator output. A binary successive approximation and linear combination scan are applied to find the equivalent baseline. The actual calibration procedure has been first implemented in FPGA firmware and tested with the ETROC front-end prototype chip (ETROC0). The calibration circuit has been implemented with Triple Modular Redundancy (TMR) and verified with Single Event Effects (SEEs) simulation. A complete calibration process lasts 35 ms with a 40 MHz clock. In the worst case, the dynamic and static power consumption are estimated to be 300 uW and 10.4 uW, respectively. The circuit design, implemented in a 65 CMOS technology, will be integrated into ETROC2, the next iteration of the ETROC with a 16 x16 pixel matrix.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗