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At least 469 records · Page 26

A manual for PARTI runtime primitives, revision 1

Primitives are presented that are designed to help users efficiently program irregular problems (e.g., unstructured mesh sweeps, sparse matrix codes, adaptive mesh partial differential equations solvers) on distributed memory machines. These primitives are also designed for use in compilers for distributed memory multiprocessors. Communications patterns are captured at runtime, and the appropriate send and receive messages are automatically generated.

Das, Raja↗

Transportable telemetry workstation

The goal was to complete the design of a prototype for a Transportable Telemetry Workstation (TTW). The Macintosh 2 is used to provide a low-cost system which can house real-time cards mounted on the NuBus inside the Macintosh 2 plus provide a standardized user interface on the Macintosh 2 console. Prior to a telemetry run, the user will be able to configure his real-time telemetry processing functions from the Macintosh 2 console. During a telemetry run, the real-time cards will store the telemetry data directly on a hard disk while permitting viewing of the data cards on the Macintosh 2 console on various selectable formats. The user will view the cards in terms of the functions they perform and the selectable paths through the cards, it is not required to become involved directly in hardware issue except in terms of the functional configuration of the system components. The TTW will accept telemetry data from an RS422 serial input data bus, pass it through a frame synchronizer card and on to a real time controller card via a telemetry backplane bus. The controller card will then route the data to a hard disk through a SCSI interface, and/or to a user interface on the Macintosh 2 console by way of the Macintosh 2 NuBus. The three major components to be designed, therefore, are the TTW Controller Card, the TTW Synchronizer Card, and the NuBus/Macintosh 2 User Interface. Design and prototyping of this state-of-the-art, transportable, low-cost, easy-to-use multiprocessor telemetry system is continuing. Other functions are planned for the future.

Collins, Aaron S.↗

Software environment for implementing engineering applications on MIMD computers

In this paper the concept for a software environment for developing engineering application systems for multiprocessor hardware (MIMD) is presented. The philosophy employed is to solve the largest problems possible in a reasonable amount of time, rather than solve existing problems faster. In the proposed environment most of the problems concerning parallel computation and handling of large distributed data spaces are hidden from the application program developer, thereby facilitating the development of large-scale software applications. Applications developed under the environment can be executed on a variety of MIMD hardware; it protects the application software from the effects of a rapidly changing MIMD hardware technology.

Lopez, L. A.↗

Address tracing for parallel machines

Recently implemented parallel system address-tracing methods based on several metrics are surveyed. The issues specific to collection of traces for both shared and distributed memory parallel computers are highlighted. Five general categories of address-trace collection methods are examined: hardware-captured, interrupt-based, simulation-based, altered microcode-based, and instrumented program-based traces. The problems unique to shared memory and distributed memory multiprocessors are examined separately.

Stunkel, Craig B.↗

An algorithm for domain decomposition in finite element analysis

A simple and efficient algorithm is described for automatic decomposition of an arbitrary finite element domain into a specified number of subdomains for finite element and substructuring analysis in a multiprocessor computer environment. The algorithm is designed to balance the work loads, to minimize the communication among processors and to minimize the bandwidths of the resulting system of equations. Small- to large-scale finite element models, which have two-node elements (truss, beam element), three-node elements (triangular element) and four-node elements (quadrilateral element), are solved on the Convex computer to illustrate the effectiveness of the proposed algorithm. A FORTRAN computer program is also included.

Al-Nasra, M.↗

SIAM Conference on Parallel Processing for Scientific Computing, 4th, Chicago, IL, Dec. 11-13, 1989, Proceedings

Attention is given to such topics as an evaluation of block algorithm variants in LAPACK and presents a large-grain parallel sparse system solver, a multiprocessor method for the solution of the generalized Eigenvalue problem on an interval, and a parallel QR algorithm for iterative subspace methods on the CM2. A discussion of numerical methods includes the topics of asynchronous numerical solutions of PDEs on parallel computers, parallel homotopy curve tracking on a hypercube, and solving Navier-Stokes equations on the Cedar Multi-Cluster system. A section on differential equations includes a discussion of a six-color procedure for the parallel solution of elliptic systems using the finite quadtree structure, data parallel algorithms for the finite element method, and domain decomposition methods in aerodynamics. Topics dealing with massively parallel computing include hypercube vs. 2-dimensional meshes and massively parallel computation of conservation laws. Performance and tools are also discussed.

Dongarra, Jack↗

Experiments with elliptic problem solvers on the Cedar multicluster

The implementation and performance of algorithms for the solution of elliptic problems on the Cedar multiprocessor is examined. The algorithms considered are conjugate gradient schemes with or without preconditioning on a rectangular domain and domain decomposition techniques with overlapping (Schwarz Alternating Method) and nonoverlapping subdomains on a T-shaped domain. Some preliminary results from a current research effort are presented.

Frank, G.↗

Real-time motion tracking of three-dimensional objects

The problem in which the three-dimensional motion of an object corresponding to a known polyhedral model is to be computed using only the motion of edge features in a continuous stream of two-dimensional images is considered. Advantage is taken of the spatiotemporal density of the input signal and the limitations of long-range trajectory-prediction methods are avoided. Two parallel algorithms which use feature-based, short-range (spatiotemporally local) motion processes to achieve real-time tracking of modeled objects are presented. Both algorithms have been implemented and tested on a tightly coupled multiprocessor system consisting of an Aspex Pipe for low-level, image-feature computations and a Sequent Symmetry for high-level, model-based computations. An analysis is given of the actual performance limits of each method using the current hardware configuration.

Verghese, Gilbert↗

Validation of chemistry models employed in a particle simulation method

The chemistry models employed in a statistical particle simulation method, as implemented in the Intel iPSC/860 multiprocessor computer, are validated and applied. Chemical relaxation of five-species air in these reservoirs involves 34 simultaneous dissociation, recombination, and atomic-exchange reactions. The reaction rates employed in the analytic solutions are obtained from Arrhenius experimental correlations as functions of temperature for adiabatic gas reservoirs in thermal equilibrium. Favorable agreement with the analytic solutions validates the simulation when applied to relaxation of O2 toward equilibrium in reservoirs dominated by dissociation and recombination, respectively, and when applied to relaxation of air in the temperature range 5000 to 30,000 K. A flow of O2 over a circular cylinder at high Mach number is simulated to demonstrate application of the method to multidimensional reactive flows.

Haas, Brian L.↗

Fault recovery characteristics of the fault tolerant multi-processor

The fault handling performance of the fault tolerant multiprocessor (FTMP) was investigated. Fault handling errors detected during fault injection experiments were characterized. In these fault injection experiments, the FTMP disabled a working unit instead of the faulted unit once every 500 faults, on the average. System design weaknesses allow active faults to exercise a part of the fault management software that handles byzantine or lying faults. It is pointed out that these weak areas in the FTMP's design increase the probability that, for any hardware fault, a good LRU (line replaceable unit) is mistakenly disabled by the fault management software. It is concluded that fault injection can help detect and analyze the behavior of a system in the ultra-reliable regime. Although fault injection testing cannot be exhaustive, it has been demonstrated that it provides a unique capability to unmask problems and to characterize the behavior of a fault-tolerant system.

Padilla, Peter A.↗

Evaluation of the Cedar memory system: Configuration of 16 by 16

Some basic results on the performance of the Cedar multiprocessor system are presented. Empirical results on the 16 processor 16 memory bank system configuration, which show the behavior of the Cedar system under different modes of operation are presented.

Gallivan, K.↗

Data management system advanced architectures

The topics relating to the Space Station Freedom (SSF) are presented in view graph form and include: (1) the data management system (DMS) concept; (2) DMS evolution rationale; (3) the DMS advance architecture task; (4) DMS group support for Ames payloads; (5) DMS testbed development; (6) the DMS architecture task status; (7) real time multiprocessor testbed; (8) networked processor performance; (9) and the DMS advance architecture task 1992 goals.

Chevers, ED↗

A parallel algorithm for multi-level logic synthesis using the transduction method

The Transduction Method has been shown to be a powerful tool in the optimization of multilevel networks. Many tools such as the SYLON synthesis system (X90), (CM89), (LM90) have been developed based on this method. A parallel implementation is presented of SYLON-XTRANS (XM89) on an eight processor Encore Multimax shared memory multiprocessor. It minimizes multilevel networks consisting of simple gates through parallel pruning, gate substitution, gate merging, generalized gate substitution, and gate input reduction. This implementation, called Parallel TRANSduction (PTRANS), also uses partitioning to break large circuits up and performs inter- and intra-partition dynamic load balancing. With this, good speedups and high processor efficiencies are achievable without sacrificing the resulting circuit quality.

Lim, Chieng-Fai↗

Generalized hypercube structures and hyperswitch communication network

This paper discusses an ongoing study that uses a recent development in communication control technology to implement hybrid hypercube structures. These architectures are similar to binary hypercubes, but they also provide added connectivity between the processors. This added connectivity increases communication reliability while decreasing the latency of interprocessor message passing. Because these factors directly determine the speed that can be obtained by multiprocessor systems, these architectures are attractive for applications such as remote exploration and experimentation, where high performance and ultrareliability are required. This paper describes and enumerates these architectures and discusses how they can be implemented with a modified version of the hyperswitch communication network (HCN). The HCN is analyzed because it has three attractive features that enable these architectures to be effective: speed, fault tolerance, and the ability to pass multiple messages simultaneously through the same hyperswitch controller.

Young, Steven D.↗

Software architecture for a distributed real-time system in Ada, with application to telerobotics

The architecture structure and software design methodology presented is described in the context of telerobotic application in Ada, specifically the Engineering Test Bed (ETB), which was developed to support the Flight Telerobotic Servicer (FTS) Program at GSFC. However, the nature of the architecture is such that it has applications to any multiprocessor distributed real-time system. The ETB architecture, which is a derivation of the NASA/NBS Standard Reference Model (NASREM), defines a hierarchy for representing a telerobot system. Within this hierarchy, a module is a logical entity consisting of the software associated with a set of related hardware components in the robot system. A module is comprised of submodules, which are cyclically executing processes that each perform a specific set of functions. The submodules in a module can run on separate processors. The submodules in the system communicate via command/status (C/S) interface channels, which are used to send commands down and relay status back up the system hierarchy. Submodules also communicate via setpoint data links, which are used to transfer control data from one submodule to another. A submodule invokes submodule algorithms (SMA's) to perform algorithmic operations. Data that describe or models a physical component of the system are stored as objects in the World Model (WM). The WM is a system-wide distributed database that is accessible to submodules in all modules of the system for creating, reading, and writing objects.

Olsen, Douglas R.↗

Functional requirements document for the Earth Observing System Data and Information System (EOSDIS) Scientific Computing Facilities (SCF) of the NASA/MSFC Earth Science and Applications Division, 1992

Five scientists at MSFC/ESAD have EOS SCF investigator status. Each SCF has unique tasks which require the establishment of a computing facility dedicated to accomplishing those tasks. A SCF Working Group was established at ESAD with the charter of defining the computing requirements of the individual SCFs and recommending options for meeting these requirements. The primary goal of the working group was to determine which computing needs can be satisfied using either shared resources or separate but compatible resources, and which needs require unique individual resources. The requirements investigated included CPU-intensive vector and scalar processing, visualization, data storage, connectivity, and I/O peripherals. A review of computer industry directions and a market survey of computing hardware provided information regarding important industry standards and candidate computing platforms. It was determined that the total SCF computing requirements might be most effectively met using a hierarchy consisting of shared and individual resources. This hierarchy is composed of five major system types: (1) a supercomputer class vector processor; (2) a high-end scalar multiprocessor workstation; (3) a file server; (4) a few medium- to high-end visualization workstations; and (5) several low- to medium-range personal graphics workstations. Specific recommendations for meeting the needs of each of these types are presented.

Botts, Michael E.↗

Compiler analysis for irregular problems in FORTRAN D

We developed a dataflow framework which provides a basis for rigorously defining strategies to make use of runtime preprocessing methods for distributed memory multiprocessors. In many programs, several loops access the same off-processor memory locations. Our runtime support gives us a mechanism for tracking and reusing copies of off-processor data. A key aspect of our compiler analysis strategy is to determine when it is safe to reuse copies of off-processor data. Another crucial function of the compiler analysis is to identify situations which allow runtime preprocessing overheads to be amortized. This dataflow analysis will make it possible to effectively use the results of interprocedural analysis in our efforts to reduce interprocessor communication and the need for runtime preprocessing.

Vonhanxleden, Reinhard↗

Hierarchically parallelized constrained nonlinear solvers with automated substructuring

This paper develops a parallelizable multilevel constrained nonlinear equation solver. The substructuring process is automated to yield appropriately balanced partitioning of each succeeding level. Due to the generality of the procedure, both sequential, partially and fully parallel environments can be handled. This includes both single and multiprocessor assignment per individual partition. Several benchmark examples are presented. These illustrate the robustness of the procedure as well as its capacity to yield significant reductions in memory utilization and calculational effort due both to updating and inversion.

Padovan, J.↗