Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “hardware in the loop”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 469 records · Page 26

Single-Bar SMT Testing on Alloy 617 using Software Controls

INL has performed simplified model testing using a variable in the software control program to compare with the testing performed at ORNL, which uses hardware to modify the control signal. The INL tests compared well with the ORNL tests, showing similar stress and strain values, as well as similarly shaped hysteresis loops. This demonstrates that possibility of performing simplified model testing without any hardware modifications.

36 MATERIALS SCIENCE↗

Quantum optimization of maximum independent set using Rydberg atom arrays

Realizing quantum speedup for practically relevant, computationally hard problems is a central challenge in quantum information science. Using Rydberg atom arrays with up to 289 qubits in two spatial dimensions, we experimentally investigate quantum algorithms for solving the maximum independent set problem. We use a hardware-efficient encoding associated with Rydberg blockade, realize closed-loop optimization to test several variational algorithms, and subsequently apply them to systematically explore a class of graphs with programmable connectivity. We find that the problem hardness is controlled by the solution degeneracy and number of local minima, and we experimentally benchmark the quantum algorithm’s performance against classical simulated annealing. On the hardest graphs, we observe a superlinear quantum speedup in finding exact solutions in the deep circuit regime and analyze its origins.

Science & Technology - Other Topics↗

ESnet-JLab FPGA Accelerated Transport (control plane) [EJFAT (udplbd2)] v2.0

The ESnet-JLab FPGA Accelerated Transport system is a solution for streaming high-speed scientific measurement data from Data Acquisition Systems (DAQs) to high-performance computing facilties. It is generally compatible with many science workflows, and makes no assumptions about the specifics of any particular experiment. This program (udplbd version 2) implements the control plane for the system. It is responsible for programming network forwarding rules into the data plane (implemented by the hardware designed named udplb, described separately). It also implements the control loop necessary to match up offered workload with available capacity on high-performance compute nodes.

Howard, Derek [Lawrence Berkeley National Laborato↗

JLAB LLRF 3.0 Development and Tests

The Jefferson Lab LLRF 3.0 system is being developed to replace legacy LLRF systems in the CEBAF accelerator. The new design builds upon 25 years of design and operational RF control experience, and our recent collaboration in the design of the LCLSII LLRF system. The new cavity control algorithm is a fully functional phase and amplitude locked Self Exciting Loop (SEL). This paper discusses the progress of the LLRF 3.0 hardware design, FPGA firmware development, User Datagram Protocol (UDP) operation, and recent LLRF 3.0 system tests on the CEBAF Booster cryomodule in the Upgrade Injector Test Facility (UITF).

Plawski, T. E.↗

Developing Separate Effects Transient Test Experiments Using an Out-of-Pile Flowing Water Loop

In 2017 the Transient Reactor Test Facility was restarted after being placed in a standby state since 1994. This Test Reactor’s restart has since enabled the progressive development of new nuclear technologies within the U.S. that were previously required to outsource to other countries. While the reactor’s restart was a large feat worthy of recognition, the experimental use of its characteristics has required the further development of in-pile experimental infrastructure sufficient to support programmatic needs. This hardware have taken the form of capsule designs (compact and elongated) as well as loop concepts representing the phenomena of interest for a subset of separate effects tests desire for each respective testing campaign. The Transient Testing Program has a large-integrated effort that aligns with the U.S. Department of Energy’s current needs. This study compliments those programmatic elements by developing, fabricating and demonstrating a full-scale flowing water loop in an out-of-pile environment. The goal of this effort is to develop a pragmatic understanding of the engineering capabilities and limitations associated with geometric form-factors, metering technology, and controls logic under representative thermal hydraulic conditions that would be experienced within the TREAT reactor during an in-pile reactivity initiated accident test. The outcomes of this study result in an evaluation of the conceptual design of a comprehensive flowing water loop including objective figures of merit (FoMs) for comparing unique instrumentation and the basis for their selection during operations. These efforts directly contribute to and are required for the further advancement of transient testing capabilities within the U.S.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗

Space Nuclear Power Autonomous Control Algorithm and Control Element Test Bed

Nuclear thermal rockets are currently NASA’s preferred option for use in a manned mission to Mars in the 2040s. The communication delay between an Earth ground station and a spacecraft heading toward Mars can be up to 20 min. Therefore, controlling the nuclear rocket engine would require either a full-time reactor operator on the mission or an autonomous control system for the reactor. The latter idea of making space nuclear reactors fully autonomous has drawn more interest from stakeholders, but such an autonomous control system must be rigorously tested and validated before it is certified for human use. The cost of a full ground test for a space nuclear reactor is tremendous, so a nonnuclear mock reactor test bed was created to test and validate control elements and control algorithms for space nuclear reactors. The test bed consists of control element hardware that inputs physical measurement data into a reactor emulator to produce the reactor’s performance under steady-state, transient, and fault conditions. The control element hardware consists of six full-sized control drums equipped with servo drives and motors and is instrumented with optical encoders, resolvers, and torque sensors for drum movement characterization. In addition to the drums, a two-phase flow loop was designed and built to mimic the valves and turbomachinery associated with the propellant flow through a nuclear thermal rocket engine; components such as pressure sensors, flow meters, thermocouples, and tachometers are instrumented throughout the loop to characterize the fluid flow, valve, and turbomachinery behavior of the system. The data from the physical hardware (e.g., drum position, propellant flow rates) are input to a nuclear reactor simulator to determine the actual nuclear reactor parameters, and the data are sent back to a control algorithm to complete the control loop. The ability to conduct numerous tests of the control systems and autonomous algorithms can help validate the instrumentation and control aspects for a space nuclear reactor for every possible fault situation.

Wilson, Brandon↗

Invited: Software defined accelerators from learning tools environment

Next generation systems, such as edge devices, will need to provide efficient processing of machine learning (ML) algorithms along several metrics, including energy, performance, area, and latency. However, the quickly evolving field of ML makes it extremely difficult to generate accelerators able to support a wide variety of algorithms. At the same time, designing accelerators in hardware description languages (HDLs) by hand is hard and time consuming, and does not allow quick exploration of the design space. In this paper we present the Software Defined Accelerators From Learning Tools Environment (SODALITE), an automated open source high-level ML framework-to-verilog compiler targeting ML Application-Specific Integrated Circuits (ASICs) chiplets. The SODALITE approach will implement optimal designs by seamlessly combining custom components generated through high-level synthesis (HLS) with templated and fully tunable Intellectural Properties (IPs) and macros, integrated in an extendable resource library. Through a closed loop design space exploration engine, developers will be able to quickly explore their hardware designs along different dimensions.

High-Level Synthesis, Accelerators, Hardware-Softw↗

Facility to Alleviate Salt Technology Risks (FASTR): Commissioning Update

The Facility to Alleviate Salt Technology Risks (FASTR) is a versatile, high-temperature (>600°C) molten chloride salt test facility designed to enable a variety of testing to advance the Generation 3 (Gen 3) concentrated solar power (CSP) molten salt technology. FASTR includes a salt preparation system and a forced flow test loop with a suite of instrumentation. The FASTR loop is capable of operating at 725°C with flow rates of 3–7 kg/s, and it includes heated and cooled sections and swappable components to facilitate testing future vendor-supplied hardware. The salt preparation system supplies large batches of clean salt for use in the FASTR forced circulation loop. This report summarizes the shakedown and initial operation of the FASTR forced circulation loop through December 2022.

14 SOLAR ENERGY↗

MLIR loop optimizations for High-Level Synthesis: a case study

High-Level Synthesis (HLS) tools simplify the design of hardware accelerators by automatically generating Verilog/VHDL code starting from a general purpose software programming language. They include a wide range of optimization techniques in the process, most of them performed on a low-level intermediate representation (IR) of the code. Introducing optimizations on a higher level of abstraction could significantly contribute to the automated design process results; for example, polyhedral techniques for the manipulation of loops could have a significant impact on the generated accelerators when applied on a specialized IR. We use loop pipelining as a case study to explore the introduction of compiler-based transformations on top of an existing HLS process. We leverage the Multi-Level Intermediate Representation (MLIR) framework and an external scheduler to implement the required transformations, and couple them with existing HLS tools to evaluate the improvements that loop pipelining brings to the performance of generated accelerators. The proposed approach can be integrated with other high-level transformations on the MLIR representation, combining different techniques to obtain pre-optimized inputs for HLS that do not have to rely on a specific backend tool.

Curzel, Serena↗

SODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators

Next generation systems, such as edge devices, will have to provide efficient processing of machine learning (ML) algorithms along several metrics, including energy, performance, area, and latency. However, the quickly evolving field of ML makes it extremely difficult to generate accelerators able to support a wide variety of algorithms. At the same time, designing accelerators in hardware description languages (HDLs) by hand is hard and time consuming, and does not allow quick exploration of the design space. This paper discusses the SODA synthesizer, an automated open source high-level ML framework-to-Verilog compiler targeting ML Application-Specific Integrated Circuits (ASICs) chiplets based on the LLVM infrastructure. The SODA synthesizers will allow implementing optimal designs by combining templated and fully tunable IPs and macros, and fully custom components generated through high-level synthesis. All these components will be provided through an extendable resource library, characterized with both commercial and open source logic design flows. Through a closed loop design space exploration engine, developers will be able to quickly explore their hardware designs along different dimension

Minutoli, Marco↗

Facility to Alleviate Salt Technology Risks (FASTR): Design Report

The Facility to Alleviate Salt Technology Risks (FASTR) is a versatile, high-temperature (>600°C) molten chloride salt test facility designed to enable a variety of testing to advance the Generation 3 (Gen 3) Concentrated Solar Power (CSP) molten salt technology. FASTR includes a salt preparation system and a forced flow test loop with a suite of instrumentation. The FASTR loop is capable of 725°C operation and flow rates of 3–7 kg/s, and it includes heated and cooled sections and swappable components to enable testing of future vendor-supplied hardware. The salt preparation system supplies large batches (e.g., 200 kg) of clean salt for use in the FASTR forced convection loop. This report summarizes the design and capabilities of FASTR in its as-built form as of December 2022.

14 SOLAR ENERGY↗

Design and Closed‐Loop Motion Planning of an Untethered Swimming Soft Robot Using 2D Discrete Elastic Rods Simulations

Despite tremendous progress in the development of untethered soft robots in recent years, existing systems lack the mobility, model‐based control, and motion planning capabilities of their piecewise rigid counterparts. As in conventional robotic systems, the development of versatile locomotion of soft robots is aided by the integration of hardware design and control with modeling tools that account for their unique mechanics and environmental interactions. Here, a framework for physics‐based modeling, motion planning, and control of a fully untethered swimming soft robot is introduced. This framework enables offline co‐design in the simulation of robot parameters and gaits to produce effective open‐loop behaviors and enables closed‐loop planning over motion primitives for feedback control of a frog‐inspired soft robot testbed. This pipeline uses a discrete elastic rods (DERs) physics engine that discretizes the soft robot as many stretchable and bendable rods. On hardware, an untethered aquatic soft robot that performs frog‐like rowing behaviors is engineered. Hardware validation verifies that the simulation has sufficient accuracy to find the best candidates for sets of parameters offline. The simulator is then used to generate a trajectory library of the robot's motion in simulation that is used in real‐time closed‐loop path following experiments on hardware.

Huang, Xiaonan↗

Autonomy Loops for Monitoring, Operational Data Analytics, Feedback, and Response in HPC Operations

Many High Performance Computing (HPC) facilities have developed and deployed frameworks in support of continuous monitoring and operational data analytics (MODA) to help improve efficiency and throughput. Because of the complexity and scale of systems and workflows and the need for low-latency response to address dynamic circumstances, automated feedback and response have the potential to be more effective than current human-in-the-loop approaches which are laborious and error prone. Progress has been limited, however, by factors such as the lack of infrastructure and feedback hooks, and successful deployment is often site- and case-specific. In this position paper we report on the outcomes and plans from a recent Dagstuhl Seminar, seeking to carve a path for community progress in the development of autonomous feedback loops for MODA, based on the established formalism of similar (MAPE-K) loops in autonomous computing and self-adaptive systems. By defining and developing such loops for significant cases experienced across HPC sites, we seek to extract commonalities and develop conventions that will facilitate interoperability and interchangeability with system hardware, software, and applications across different sites, and will motivate vendors and others to provide telemetry interfaces and feedback hooks to enable community development and pervasive deployment of MODA autonomy loops.

autonomy loops↗

In situ characterization of material extrusion printing by near-infrared spectroscopy

Material extrusion printing of reactive resins and inks present a unique challenge due to the time-dependent nature of the rheological and chemical properties they possess. As a result, careful print optimization or process control is important to obtain consistent, high quality prints via additive manufacturing. Here, we present the design and use of a near-infrared (NIR) flow through cell for in situ chemical monitoring of reactive resins during printing. Differences between in situ and off-line benchtop measurements are presented and highlight the need for in-line monitoring capability. Additionally, in-line extrusion force monitoring and off-line post inspection using machine vision is demonstrated. By combining NIR and extrusion force monitoring, it is possible to follow cure reaction kinetics and viscosity changes during printing. When combined with machine vision, the ability to automatically identify and quantify print artifacts can be incorporated on the printing line to enable real-time, artificial intelligence-assisted quality control of both process and product. Together, these techniques form the building blocks of an optimized closed-loop process control strategy when complex reactive inks must be used to produce printed hardware.

36 MATERIALS SCIENCE↗

Impedance Modeling and Stability Analysis for the PLL-less and Voltage Sensor-less Grid-tied Converters

The newly developed control methodology, which omits the phase-locked loop (PLL) and voltage sensor, has garnered considerable attention for its rapid dynamic response and reduced hardware expenses. Nonetheless, its stability concerns have not yet been thoroughly scrutinized. In this paper, the impedance modeling of the PLL-less and voltage sensorless control strategy has been established. The impedance model has been contrasted with the traditional PLL-based control scheme. Our findings demonstrate that the PLL-less and voltage sensorless control approach lacks the negative resistance behavior that is frequently observed in the traditional scheme, which results in unstable operations. Furthermore, the role of virtual resistance has been examined. To substantiate the aforementioned findings, simulation results are presented.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Decoupled Active and Reactive Power Control without PLL Requirement for Differential Buck Converter

This paper presents a decoupled active and reactive power control for the differential buck converter. This control does not require phase locked loop (PLL) for synchronization. Also, it achieves active and reactive power control in a simple single control loop structure. The differential buck converter has the capability to compensate the double line frequency power ripple without relying on additional hardware. Particularly, the Common Mode (CM) operation is used for active double line frequency power ripple absorption. Whereas, the Differential Mode (DM) operation is used as an active and reactive power exchanging port between the converter and the grid at the point of common coupling (PCC). The motivation behind this paper proposal are: (i) to avoid PLL induced instabilities, especially, when connecting the differential buck converter with weak grid, and (ii) direct active and reactive power control for the differential buck in a single loop control. The theoretical analyses are verified with a 5 kW converter with only 50 μF decoupling capacitor connected to a weak grid.

Khan, Ahmad↗

Measurement and analysis of GPU-accelerated applications with HPCToolkit

To address the challenge of performance analysis on the US DOE’s forthcoming exascale supercomputers, Rice University has been extending its HPCToolkit performance tools to support measurement and analysis of GPU-accelerated applications. To help developers understand the performance of accelerated applications as a whole, HPCToolkit’s measurement and analysis tools attribute metrics to calling contexts that span both CPUs and GPUs. To measure GPU-accelerated applications efficiently, HPCToolkit employs a novel wait-free data structure to coordinate monitoring and attribution of GPU performance. To help developers understand the performance of complex GPU code generated from high-level programming models, HPCToolkit constructs sophisticated approximations of call path profiles for GPU computations. To support fine-grained analysis and tuning, HPCToolkit uses PC sampling and instrumentation to measure and attribute GPU performance metrics to source lines, loops, and inlined code. To supplement fine-grained measurements, HPCToolkit can measure GPU kernel executions using hardware performance counters. To provide a view of how an execution evolves over time, HPCToolkit can collect, analyze, and visualize call path traces within and across nodes. Finally, on NVIDIA GPUs, HPCToolkit can derive and attribute a collection of useful performance metrics based on measurements using GPU PC samples. Here, we illustrate HPCToolkit’s new capabilities for analyzing GPU-accelerated applications with several codes developed as part of the Exascale Computing Project.

97 MATHEMATICS AND COMPUTING↗

Autonomous Flow Electrochemistry for Accelerated Catalyst Discovery

Our objective is to develop an Autonomous Chemical Experimentation (ACE) platform that accelerates discovery of new catalytic transformations and other energy-relevant chemical reactions and processes. We intentionally designed ACE to be highly modular, both with respect to its rapid deployment to different chemistries and experimental workflows as well as incorporation of a wide range of different AI algorithms. In addition to the development of the core software architecture, initial efforts were made to incorporate Large Language Models to provide human-interpretable reasoning of the optimizer’s actions, and to develop a user-friendly graphical interface for experimental researchers. ACE was demonstrated using a flow electrocatalysis platform containing an inline FTIR spectrometer for real-time analysis and quantification of the reaction outcome. Human-in-the-loop experiments were performed in which a human researcher conducted an experiment using electrode potentials suggested by ACE, then fed the spectral data back to ACE for decision making. After confirming the successful function of the optimizer, efforts were next directed to automation of the hardware and performed full autonomy tests using three reactions: catalytic oxidation of formate, catalytic oxidation of cyclohexanol, and oxidation of hydroquinone. These studies confirm that ACE can close the loop between reaction execution, analysis, and optimization. They also reveal that more improved product detection methods will be essential for ACE to make well-informed decisions for reactions with low conversions.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗