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At least 451 records · Page 25

An evaluation of the use of new Doppler methods for detecting longitudinal function abnormalities in a pacing-induced heart failure model

BACKGROUND: Doppler tissue echocardiography and color M-mode Doppler flow propagation velocity have proven useful in evaluating cross-sections of patients with left ventricular (LV) dysfunction, but experience with serial changes is limited. Purpose and methods: We tested their use by evaluating the temporal changes of LV function in a pacing-induced congestive heart failure model. Rapid ventricular pacing was initiated and maintained in 20 dogs for 4 weeks. Echocardiography was performed at baseline and weekly during brief pacing cessation. RESULTS: With rapid pacing, LV volume significantly increased and ejection fraction (57%-28%), stroke volume (37-18 mL), and mitral annulus systolic velocity (16.1-6.6 cm/s) by Doppler tissue echocardiography significantly decreased, with ejection fraction and mitral annulus systolic velocity closely correlated (r = 0.706, P <.0001). In contrast to the mitral inflow velocities, mitral annulus early diastolic velocity decreased steadily (12.3-7.3 cm/s) resulting in a dramatic decrease in mitral annulus early/late (1.22-0.57) diastolic velocity with no tendency toward pseudonormalization. The color M-mode Doppler flow propagation velocity also showed significant steady decrease (57-24 cm/s) throughout the pacing period. Multiple regression analysis chose mitral annulus systolic velocity (r = 0.895, P <.0001) and propagation velocity (r = 0.782, P <.0001) for the most important factor predicting LV systolic and diastolic function, respectively. CONCLUSIONS: Doppler tissue echocardiography and color M-mode Doppler flow could evaluate the serial deterioration in LV dysfunction throughout the pacing period. These were more useful in quantifying progressive LV dysfunction than conventional ehocardiographic techniques, and were probably relatively independent of preload. These techniques could be suitable for longitudinal evaluation in addition to the cross-sectional study.

Evaluation Studies↗

Effects of sleep loss, time of day, and extended mental work on implicit and explicit learning of sequences

Tacit knowledge is part of many professional skills and can be studied experimentally with implicit-learning paradigms. The authors explored the effects of 2 different stressors, loss of sleep and mental fatigue, on implicit learning in a serial-response time (RT) task. In the 1st experiment, 1 night of sleep deprivation was shown to impair implicit but not explicit sequence learning. In the 2nd experiment, no impairment of both types of sequence learning was found after 1.5 hr of mental work. Serial-RT performance, in contrast, suffered from both stressors. These findings suggest that sleep deprivation induces specific risks for automatic, skill-based behavior that are not present in consciously controlled performance.

Learning↗

Immunohistochemical myofiber typing and high-resolution myofibrillar lesion detection in LR white embedded muscle

We have developed a method of fixing, embedding, sectioning, and staining that allows high-resolution detection of myofibrillar structure and myosin immunocytochemical muscle fiber typing in serial semithin sections of LR White plastic embedded muscle at the light microscopic level. Traditional approaches, such as cryostat sections, permit fiber typing, but small myofibrillar lesions (1-3 sarcomeres) are difficult to detect because of section thickness. Semithin sections of hydrophobic resins do not stain well either histochemically or immunocytochemically. Electron microscopy can resolve lesions and discriminate fiber types based on morphology, but the sampling area is small. Our goal was to develop a rapid method for defining both fiber type and high-resolution primary myofibrillar lesion damage. Mild fixation (1-4% paraformaldehyde, 0. 05-0.1% glutaraldehyde) and embedment in a hydrophilic resin (LR White) were used. Myofibrillar structure was extremely well preserved at the light microscopic (LM) level, and lesions could be readily resolved in Toluidine blue stained 500-nm sections. Fiber type was defined by LM immunomyosin staining of serial plastic semithin sections, which demonstrated reciprocal staining patterns for "fast (Sigma M4276) and "total" (skeletal muscle) myosins (Sigma M7523). Copyright 2000 Wiley-Liss, Inc.

NASA Program Fundamental Space Biology↗

Prototype Motor Controllers Demonstrated for the James Webb Space Telescope Cryogenic Environment

NASA is in the process of designing the James Webb Space Telescope. This telescope will investigate images of objects in deep space (stars, galaxies, etc.) by using light in the infrared region of the light spectrum. To make such observations, the telescope must have light sensors that operate at very cold temperatures, near absolute zero. To achieve this low-temperature tolerance, designers must place the light sensors behind a Sun shield that will prevent sunlight, and its heat, from reaching the sensors. In this cold region inside the telescope, electric motors and some motor controls must operate at temperatures near 40 K (40 degrees above absolute zero). These motors will be used to position light filters needed by the telescope. There are motors that operate at the low temperatures, but there is little technology for low-temperature motor-control electronics. The drawing shows how the motors and their controls are positioned behind the Sun shield. Simplified version of the layout of the motor and control electronics that are located, as dictated by mission requirements, in the cold zone of the James Webb Space Telescope. A Sun shield provides protection and isolation of these electronics from the heat of the rays of the sun. Room temperature compoenets (control computer, motor select command, motor phase drive, power supply, parallel to serial, and sun shield) as well as 40-kelvin components (motor select, serial to parallel, and motors) are shown. The Low Temperature Electronics Group at the NASA Glenn Research Center has been working to develop motor control electronics that will operate at a temperature of 40 K. The group conducted tests to determine which electronic components will operate at such very low temperatures. Then, components that were determined to operate successfully at the low temperatures were used to design low-temperature motor-controller circuits. A prototype motor controller circuit was built, evaluated, and demonstrated to operate at 70 K. Next, Glenn researchers plan to determine circuit performance at much colder temperatures--down to 40 K. This low-temperature program was supported by the James Webb Space Telescope Electrical Systems Design Group at the NASA Goddard Space Flight Center and by the NASA Electronic Parts and Packaging Program at NASA Headquarters and the Jet Propulsion Laboratory.

Patterson, Richard L.↗

Improving turbo-like codes using iterative decoder analysis

The density evolution method is used to analyze the performance and optimize the structure of parallel and serial turbo codes, and generalized serial concatenations of mixtures of different outer and inner codes. Design examples are given for mixture codes.

turbo codes iterative decoding↗

Restoration Process

In the accompanying photos, a laboratory technician is restoring the once-obliterated serial number of a revolver. The four-photo sequence shows the gradual progression from total invisibility to clear readability. The technician is using a new process developed in an applications engineering project conducted by NASA's Lewis Research Center in conjunction with Chicago State University. Serial numbers and other markings are frequently eliminated from metal objects to prevent tracing ownership of guns, motor vehicles, bicycles, cameras, appliances and jewelry. To restore obliterated numbers, crime laboratory investigators most often employ a chemical etching technique. It is effective, but it may cause metal corrosion and it requires extensive preparatory grinding and polishing. The NASA-Chicago State process is advantageous because it can be applied without variation to any kind of metal, it needs no preparatory work and number recovery can be accomplished without corrosive chemicals; the liquid used is water.

Source record↗

Intelligent subsystem interface for modular hardware system

A single chip application specific integrated circuit (ASIC) which provides a flexible, modular interface between a subsystem and a standard system bus. The ASIC includes a microcontroller/microprocessor, a serial interface for connection to the bus, and a variety of communications interface devices available for coupling to the subsystem. A three-bus architecture, utilizing arbitration, provides connectivity within the ASIC and between the ASIC and the subsystem. The communication interface devices include UART (serial), parallel, analog, and external device interface utilizing bus connections paired with device select signals. A low power (sleep) mode is provided as is a processor disable option.

Krening, Douglas N.↗

Digital optical recorder-reproducer system

A mass archival optical recording and reproduction system includes a recording light source such as a laser beam focussed and directed upon an acousto-optic linear modulator array (or page composer) that receives parallel blocks of data converted from a serial stream of digital data to be stored. The page composer imparts to the laser beam modulation representative of a plurality of parallel channels of data and through focussing optics downstream of the page composer parallel arrays of optical spots are recorded upon a suitable recording medium such as a photographic film floppy disc. The recording medium may be substantially frictionlessly and stably positioned for recording at a record/read station by an air-bearing platen arrangement which is preferably thermodynamically non-throttling so that the recording film may be positioned in the path of the information-carrying light beam in a static or dynamic mode. During readout, the page composer is bypassed and a readout light beam is focussed directly upon the recording medium containing an array of previously recorded digital spots, a sync bit, data positioning bits, and a tracking band. The readout beam which has been directed through the recording medium is then imaged upon a photodetector array, the output of which may be coupled to suitable electronic processing circuitry, such as a digital multiplexer, whereby the parallel spot array is converted back into the original serial data stream.

Reddersen, Brad R.↗

Data compression using Chebyshev transform

The present invention is a method, system, and computer program product for implementation of a capable, general purpose compression algorithm that can be engaged on the fly. This invention has particular practical application with time-series data, and more particularly, time-series data obtained form a spacecraft, or similar situations where cost, size and/or power limitations are prevalent, although it is not limited to such applications. It is also particularly applicable to the compression of serial data streams and works in one, two, or three dimensions. The original input data is approximated by Chebyshev polynomials, achieving very high compression ratios on serial data streams with minimal loss of scientific information.

Cheng, Andrew F.↗

Optimizations of a Hardware Decoder for Deep-Space Optical Communications

The National Aeronautics and Space Administration has developed a capacity approaching modulation and coding scheme that comprises a serial concatenation of an inner accumulate pulse-position modulation (PPM) and an outer convolutional code [or serially concatenated PPM (SCPPM)] for deep-space optical communications. Decoding of this code uses the turbo principle. However, due to the nonbinary property of SCPPM, a straightforward application of classical turbo decoding is very inefficient. Here, we present various optimizations applicable in hardware implementation of the SCPPM decoder. More specifically, we feature a Super Gamma computation to efficiently handle parallel trellis edges, a pipeline-friendly 'maxstar top-2' circuit that reduces the max-only approximation penalty, a low-latency cyclic redundancy check circuit for window-based decoders, and a high-speed algorithmic polynomial interleaver that leads to memory savings. Using the featured optimizations, we implement a 6.72 megabits-per-second (Mbps) SCPPM decoder on a single field-programmable gate array (FPGA). Compared to the current data rate of 256 kilobits per second from Mars, the SCPPM coded scheme represents a throughput increase of more than twenty-six fold. Extension to a 50-Mbps decoder on a board with multiple FPGAs follows naturally. We show through hardware simulations that the SCPPM coded system can operate within 1 dB of the Shannon capacity at nominal operating conditions.

quadratic polynomial interleaver↗

Universal Reconfigurable Translator Module (URTM) Final Report

This report describes the Universal Reconfigurable Translation Module, or URTM. The URTM was developed by Sigma Space Corporation for NASA in order to translate specific serial protocols, both logically and physically. At present, the prototype configuration has targeted MIL-STD-1553B (RT and BC), IEEE 1394b (Firewire), and ECSS-E-50-12A (SpaceWire). The objectives of this program were to study the feasibility of a configurable URTM to translate serial link data as might be used in a space-flight mission and to design, develop, document, and deliver an engineering prototype model of the URTM with a path to spaceflight. By simply connecting two of the three Physical Interface Modules (PIM) on either end of the RPTM (Reconfigurable Protocol Translator Module), the URTM then self configures via a library of interface translation functions, thereby allowing the two data links to communicate seamlessly.

Leventhal, Edward↗

Multi-Modulator for Bandwidth-Efficient Communication

A modulator circuit board has recently been developed to be used in conjunction with a vector modulator to generate any of a large number of modulations for bandwidth-efficient radio transmission of digital data signals at rates than can exceed 100 Mb/s. The modulations include quadrature phaseshift keying (QPSK), offset quadrature phase-shift keying (OQPSK), Gaussian minimum-shift keying (GMSK), and octonary phase-shift keying (8PSK) with square-root raised-cosine pulse shaping. The figure is a greatly simplified block diagram showing the relationship between the modulator board and the rest of the transmitter. The role of the modulator board is to encode the incoming data stream and to shape the resulting pulses, which are fed as inputs to the vector modulator. The combination of encoding and pulse shaping in a given application is chosen to maximize the bandwidth efficiency. The modulator board includes gallium arsenide serial-to-parallel converters at its input end. A complementary metal oxide/semiconductor (CMOS) field-programmable gate array (FPGA) performs the coding and modulation computations and utilizes parallel processing in doing so. The results of the parallel computation are combined and converted to pulse waveforms by use of gallium arsenide parallel-to-serial converters integrated with digital-to-analog converters. Without changing the hardware, one can configure the modulator to produce any of the designed combinations of coding and modulation by loading the appropriate bit configuration file into the FPGA.

Gray, Andrew↗

An Investigation of State-Space Model Fidelity for SSME Data

In previous studies, a variety of unsupervised anomaly detection techniques for anomaly detection were applied to SSME (Space Shuttle Main Engine) data. The observed results indicated that the identification of certain anomalies were specific to the algorithmic method under consideration. This is the reason why one of the follow-on goals of these previous investigations was to build an architecture to support the best capabilities of all algorithms. We appeal to that goal here by investigating a cascade, serial architecture for the best performing and most suitable candidates from previous studies. As a precursor to a formal ROC (Receiver Operating Characteristic) curve analysis for validation of resulting anomaly detection algorithms, our primary focus here is to investigate the model fidelity as measured by variants of the AIC (Akaike Information Criterion) for state-space based models. We show that placing constraints on a state-space model during or after the training of the model introduces a modest level of suboptimality. Furthermore, we compare the fidelity of all candidate models including those embodying the cascade, serial architecture. We make recommendations on the most suitable candidates for application to subsequent anomaly detection studies as measured by AIC-based criteria.

Martin, Rodney Alexander↗

Ethernet-Enabled Power and Communication Module for Embedded Processors

The power and communications module is a printed circuit board (PCB) that has the capability of providing power to an embedded processor and converting Ethernet packets into serial data to transfer to the processor. The purpose of the new design is to address the shortcomings of previous designs, including limited bandwidth and program memory, lack of control over packet processing, and lack of support for timing synchronization. The new design of the module creates a robust serial-to-Ethernet conversion that is powered using the existing Ethernet cable. This innovation has a small form factor that allows it to power processors and transducers with minimal space requirements.

Perotti, Jose↗

Smart Power Supply for Battery-Powered Systems

A power supply for battery-powered systems has been designed with an embedded controller that is capable of monitoring and maintaining batteries, charging hardware, while maintaining output power. The power supply is primarily designed for rovers and other remote science and engineering vehicles, but it can be used in any battery alone, or battery and charging source applications. The supply can function autonomously, or can be connected to a host processor through a serial communications link. It can be programmed a priori or on the fly to return current and voltage readings to a host. It has two output power busses: a constant 24-V direct current nominal bus, and a programmable bus for output from approximately 24 up to approximately 50 V. The programmable bus voltage level, and its output power limit, can be changed on the fly as well. The power supply also offers options to reduce the programmable bus to 24 V when the set power limit is reached, limiting output power in the case of a system fault detected in the system. The smart power supply is based on an embedded 8051-type single-chip microcontroller. This choice was made in that a credible progression to flight (radiation hard, high reliability) can be assumed as many 8051 processors or gate arrays capable of accepting 8051-type core presently exist and will continue to do so for some time. To solve the problem of centralized control, this innovation moves an embedded microcontroller to the power supply and assigns it the task of overseeing the operation and charging of the power supply assets. This embedded processor is connected to the application central processor via a serial data link such that the central processor can request updates of various parameters within the supply, such as battery current, bus voltage, remaining power in battery estimations, etc. This supply has a direct connection to the battery bus for common (quiescent) power application. Because components from multiple vendors may have differing power needs, this supply also has a secondary power bus, which can be programmed a priori or on-the-fly to boost the primary battery voltage level from 24 to 50 V to accommodate various loads as they are brought on line. Through voltage and current monitoring, the device can also shield the charging source from overloads, keep it within safe operating modes, and can meter available power to the application and maintain safe operations.

Krasowski, Michael J.↗

Performance Bounds on Two Concatenated, Interleaved Codes

A method has been developed of computing bounds on the performance of a code comprised of two linear binary codes generated by two encoders serially concatenated through an interleaver. Originally intended for use in evaluating the performances of some codes proposed for deep-space communication links, the method can also be used in evaluating the performances of short-block-length codes in other applications. The method applies, more specifically, to a communication system in which following processes take place: At the transmitter, the original binary information that one seeks to transmit is first processed by an encoder into an outer code (Co) characterized by, among other things, a pair of numbers (n,k), where n (n > k)is the total number of code bits associated with k information bits and n k bits are used for correcting or at least detecting errors. Next, the outer code is processed through either a block or a convolutional interleaver. In the block interleaver, the words of the outer code are processed in blocks of I words. In the convolutional interleaver, the interleaving operation is performed bit-wise in N rows with delays that are multiples of B bits. The output of the interleaver is processed through a second encoder to obtain an inner code (Ci) characterized by (ni,ki). The output of the inner code is transmitted over an additive-white-Gaussian- noise channel characterized by a symbol signal-to-noise ratio (SNR) Es/No and a bit SNR Eb/No. At the receiver, an inner decoder generates estimates of bits. Depending on whether a block or a convolutional interleaver is used at the transmitter, the sequence of estimated bits is processed through a block or a convolutional de-interleaver, respectively, to obtain estimates of code words. Then the estimates of the code words are processed through an outer decoder, which generates estimates of the original information along with flags indicating which estimates are presumed to be correct and which are found to be erroneous. From the perspective of the present method, the topic of major interest is the performance of the communication system as quantified in the word-error rate and the undetected-error rate as functions of the SNRs and the total latency of the interleaver and inner code. The method is embodied in equations that describe bounds on these functions. Throughout the derivation of the equations that embody the method, it is assumed that the decoder for the outer code corrects any error pattern of t or fewer errors, detects any error pattern of s or fewer errors, may detect some error patterns of more than s errors, and does not correct any patterns of more than t errors. Because a mathematically complete description of the equations that embody the method and of the derivation of the equations would greatly exceed the space available for this article, it must suffice to summarize by reporting that the derivation includes consideration of several complex issues, including relationships between latency and memory requirements for block and convolutional codes, burst error statistics, enumeration of error-event intersections, and effects of different interleaving depths. In a demonstration, the method was used to calculate bounds on the performances of several communication systems, each based on serial concatenation of a (63,56) expurgated Hamming code with a convolutional inner code through a convolutional interleaver. The bounds calculated by use of the method were compared with results of numerical simulations of performances of the systems to show the regions where the bounds are tight (see figure).

Moision, Bruce↗

Efficient Mosaicking of Spitzer Space Telescope Images

A parallel version of the MOPEX software, which generates mosaics of infrared astronomical images acquired by the Spitzer Space Telescope, extends the capabilities of the prior serial version. In the parallel version, both the input image space and the output mosaic space are divided among the available parallel processors. This is the only software that performs the point-source detection and the rejection of spurious imaging effects of cosmic rays required by Spitzer scientists. This software includes components that implement outlier-detection algorithms that can be fine-tuned for a particular set of image data by use of a number of adjustable parameters. This software has been used to construct a mosaic of the Spitzer Infrared Array Camera Shallow Survey, which comprises more than 17,000 exposures in four wavelength bands from 3.6 to 8 m and spans a solid angle of about 9 square degrees. When this software was executed on 32 nodes of the 1,024-processor Cosmos cluster computer at NASA s Jet Propulsion Laboratory, a speedup of 8.3 was achieved over the serial version of MOPEX. The performance is expected to improve dramatically once a true parallel file system is installed on Cosmos.

Jacob, Joseph↗