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At least 451 records · Page 25
All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

Prototype Videodisk-Based Part-Task Thermal Imaging Trainer

Thermal images, or infrared images, are representations of the world based on heat, instead of visible light. Research has shown that the resulting thermal image results in perceptual differences leading to difficulties in interpretation (e.g., the determination of slope angle, concavity/convexity), or increased identification latencies. A joint research project between the United States (NASA and U.S. Army) and Israel (Ministry of Defense and Israel Air Force) has resulted in the development of a prototype part-task trainer for the acquisition of perceptual skills associated with thermal imaging usage. This prototype system is videodisk-based under computer control, using recordings of thermal images. A lesson section introduces declarative knowledge, in which the basic physics and heuristics of thermal imagery are taught. An exercise section teaches procedural knowledge, with the user viewing dynamic, actual imagery, with an interactive detection/location determination task. The general philosophy and design of the trainer will be demonstrated.

Brickner, Michael S.↗
NASA NTRS1995

A Dual-Route Model that Learns to Pronounce English Words

This paper describes a model that learns to pronounce English words. Learning occurs in two modules: 1) a rule-based module that constructs pronunciations by phonetic analysis of the letter string, and 2) a whole-word module that learns to associate subsets of letters to the pronunciation, without phonetic analysis. In a simulation on a corpus of over 300 words the model produced pronunciation latencies consistent with the effects of word frequency and orthographic regularity observed in human data. Implications of the model for theories of visual word processing and reading instruction are discussed.

Remington, Roger W.↗
NASA NTRS1995

The PRP Effect Following Callosotomy: Residual Interference Despite Uncoupling of Lateralized Response Codes

A callosotomy patient was tested in two dual-task experiments requiring successive speeded responses to lateralized stimuli. In accord with the recent findings of Pashler, O'Brien, Luck, Hillyard, Mangun, and Gazzaniga (in press), the patient showed a robust psychological refractory period effect (PRP) responses on Task 2 were inversely related to the stimulus-onset asynchrony (SOA). However, three aspects of our data indicated that the processing limitations for the patient were different than those observed with control subjects. First, the split-brain patient did not show an increase in reaction time when the two tasks required responses from a common output system (i.e., both manual responses) in comparison to when different output systems were used (i.e., manual-vocal). Second, inconsistent stimulus-response mappings for the two tasks greatly inflated response latencies for the control subjects, but had minimal effect on the performance of the split-brain patient. Third, the consistency manipulation was underadditive with SOA for only the patient, suggesting a later bottleneck in processing following callosotomy than was observed for the control subjects. It is proposed that sectioning the corpus callosum eliminates interference resulting from competing stimulus response codes. Nonetheless, dual-task interference persists for the split-brain subject because a subcortical gate constrains when selected responses can be implemented.

Ivry, Richard B.↗
NASA NTRS1995

Event-Based Study of the Effect of Execution Environments on Parallel Program Performance

In this paper we seek to demonstrate the importance of studying the effect of changes in execution environment parameters, on parallel applications executed on state-of-the-art multiprocessors. A comprehensive methodology for event-based analysis of program behavior is introduced. This methodology is used to study the performance significance of various system parameters such as processor speed, message-buffer size, buffer copy speed, network bandwidth, communication latency, interrupt overheads and other system parameters. With the help cf a few CFD examples, we illustrate the use of our technique in determining suitable parameter values of the execution environment for three applications. We also demonstrate how this approach can be used to predict performance across architectures and illustrate the use of visual and profile-like feedback to expose the effect of system parameters changes on the performance of specific applications module.

Sarukkai, Sekhar R.↗
NASA NTRS1997

A Portable MPI Implementation of the SPAI Preconditioner in ISIS++

A parallel MPI implementation of the Sparse Approximate Inverse (SPAI) preconditioner is described. SPAI has proven to be a highly effective preconditioner, and is inherently parallel because it computes columns (or rows) of the preconditioning matrix independently. However, there are several problems that must be addressed for an efficient MPI implementation: load balance, latency hiding, and the need for one-sided communication. The effectiveness, efficiency, and scaling behavior of our implementation will be shown for different platforms.

Barnard, Stephen T.↗
NASA NTRS1995

Flight Crew Sleep in Long-Haul Aircraft Bunk Facilities: Survey Results

Modem long-haul aircraft can fly up to 16 continuous hours and provide a 24-hour, global capability. Extra (augmented) flight crew are available on long flights to allow planned rest periods, on a rotating basis, away from the flight deck in onboard crew rest facilities (2 bunks). A NASA/FAA study is under-way to examine the quantity and quality of sleep obtained in long-haul aircraft bunks and the factors that promote or interfere with that sleep. The first phase of the study involved a retrospective survey, followed by a second phase field study to collect standard polysomnographic data during inflight bunk sleep periods. A summary of the Phase I survey results are reported here. A multi-part 54-question retrospective survey was completed by 1,404 flight crew (37% return rate) at three different major US air carriers flying B747-100, 200, 400, and MD- 11 long-haul aircraft. The questions examined demographics, quantity and quality of sleep at home and in onboard bunks, factors that promote or interfere with sleep, and effects on subsequent performance and alertness. Flight crew reported a mean bunk sleep latency of 39.4 mins (SD=28.3 mins) (n=1,276) and a mean total sleep time of 2.2 hrs (SD=1.3 hrs) (n=603). (Different flight lengths could affect overall time available for sleep.) Crew rated 25 factors for their interference or promotion of bunk sleep. Figure I portrays the average ratings for each factor across all three carriers. A principal components analysis of the 25 factors revealed three areas that promoted bunk sleep: physiological (e.g., readiness for sleep), physical environment (e.g., bunk size, privacy), and personal comfort (e.g., blankets, pillows). Five areas were identified that interfered with sleep: environmental disturbance (e.g., background noise, turbulence), luminosity (e.g., lighting), personal disturbances (e.g., bathroom trips, random thoughts), environmental discomfort (e.g., low humidity, cold), and interpersonal disturbances (e.g., bunk partner).

Rosekind, Mark R.↗
NASA NTRS1997

Petaflops Computing: The Key Algorithmic Challenges

The prospect of petaflops-class computers brings to the fore some important algorithmic issues that have been considered in the high performance computing community for several years. Key among them are (1) concurrency (whether the fundamental concurrency of an algorithm is sufficient to keep thousands of processors productively busy); (2) data locality; (3) latency tolerance; and (4) memory and operation count scaling. This introductory presentation will give an overview of these issues.

Bailey, David H.↗
NASA NTRS1998

The P-Mesh: A Commodity-based Scalable Network Architecture for Clusters

We designed a new network architecture, the P-Mesh which combines the scalability and fault resilience of a torus with the performance of a switch. We compare the scalability, performance, and cost of the hub, switch, torus, tree, and P-Mesh architectures. The latter three are capable of scaling to thousands of nodes, however, the torus has severe performance limitations with that many processors. The tree and P-Mesh have similar latency, bandwidth, and bisection bandwidth, but the P-Mesh outperforms the switch architecture (a lower bound for tree performance) on 16-node NAB Parallel Benchmark tests by up to 23%, and costs 40% less. Further, the P-Mesh has better fault resilience characteristics. The P-Mesh architecture trades increased management overhead for lower cost, and is a good bridging technology while the price of tree uplinks is expensive.

Nitzberg, Bill↗
NASA NTRS1997

Predicting Cost/Performance Trade-Offs for Whitney: A Commodity Computing Cluster

Recent advances in low-end processor and network technology have made it possible to build a "supercomputer" out of commodity components. We develop simple models of the NAS Parallel Benchmarks version 2 (NPB 2) to explore the cost/performance trade-offs involved in building a balanced parallel computer supporting a scientific workload. We develop closed form expressions detailing the number and size of messages sent by each benchmark. Coupling these with measured single processor performance, network latency, and network bandwidth, our models predict benchmark performance to within 30%. A comparison based on total system cost reveals that current commodity technology (200 MHz Pentium Pros with 100baseT Ethernet) is well balanced for the NPBs up to a total system cost of around $1,000,000.

Becker, Jeffrey C.↗
NASA NTRS1997

On the Floating Point Performance of the i860 Microprocessor

The i860 microprocessor is a pipelined processor that can deliver two double precision floating point results every clock. It is being used in the Touchstone project to develop a teraflop computer by the year 2000. With such high computational capabilities it was expected that memory bandwidth would limit performance on many kernels. Measured performance of three kernels showed performance is less than what memory bandwidth limitations would predict. This paper develops a model that explains the discrepancy in terms of memory latencies and points to some problems involved in moving data from memory to the arithmetic pipelines.

Lee, King↗
NASA NTRS1998

Challenges of Future High-End Computing

The next major milestone in high performance computing is a sustained rate of one Pflop/s (also written one petaflops, or 10(circumflex)15 floating-point operations per second). In addition to prodigiously high computational performance, such systems must of necessity feature very large main memories, as well as comparably high I/O bandwidth and huge mass storage facilities. The current consensus of scientists who have studied these issues is that "affordable" petaflops systems may be feasible by the year 2010, assuming that certain key technologies continue to progress at current rates. One important question is whether applications can be structured to perform efficiently on such systems, which are expected to incorporate many thousands of processors and deeply hierarchical memory systems. To answer these questions, advanced performance modeling techniques, including simulation of future architectures and applications, may be required. It may also be necessary to formulate "latency tolerant algorithms" and other completely new algorithmic approaches for certain applications. This talk will give an overview of these challenges.

Bailey, David↗
NASA NTRS2002

The Challenge of Planning and Execution for Spacecraft Mobile Robots

The need for spacecraft mobile robots continues to grow. These robots offer the potential to increase the capability, productivity, and duration of space missions while decreasing mission risk and cost. Spacecraft Mobile Robots (SMRs) can serve a number of functions inside and outside of spacecraft from simpler tasks, such as performing visual diagnostics and crew support, to more complex tasks, such as performing maintenance and in-situ construction. One of the predominant challenges to deploying SMRs is to reduce the need for direct operator interaction. Teleoperation is often not practical due to the communication latencies incurred because of the distances involved and in many cases a crewmember would directly perform a task rather than teleoperate a robot to do it. By integrating a mixed-initiative constraint-based planner with an executive that supports adjustably autonomous control, we intend to demonstrate the feasibility of autonomous SMRs by deploying one inside the International Space Station (ISS) and demonstrate in simulation one that operates outside of the ISS. This paper discusses the progress made at NASA towards this end, the challenges ahead, and concludes with an invitation to the research community to participate.

Dorais, Gregory A.↗
NASA NTRS1998

Predicting Cost/Performance Trade-offs For Whitney: A Commodity Computing Cluster

Recent advances in low-end processor and network technology have made it possible to build a "supercomputer" out of commodity components. We develop simple models of the NAS Parallel Benchmarks version 2 (NPB 2) to explore the cost/performance trade-offs involved in building a balanced parallel computer supporting a scientific workload. By measuring single processor benchmark performance, network latency, and network bandwidth, and using closed form expressions detailing the number and size of messages sent by each benchmark, our models predict benchmark performance to within 30%. A comparison based on total system cost reveals that current commodity technology (200 MHz Pentium Pros with 100baseT Ethernet) is well balanced for the NPBs up to a total system cost of around $ 1,000,000.

Becker, Jeffrey C.↗
NASA NTRS1998

The Effect of Set Size on the Relation Between Saccadic and Perceptual Decisions During Search

We have shown that when searching for a disk in noise at one of 10 locations, the accuracy of the I st saccade is similar to that of the perceptual decision at the time of saccadic programming. The present study has two goals: 1) to test whether this linden - extends to a contrast-discrimination task without noise, and 2) to measure the effect of set size on the relation between saccadic and perceptual decisions. Methods: Three observers searched over a grey background (34.5 cd/sq m) for a bright disk (63.2 cd/sq m) among dim disks (54.1 cd/sq m) along the circumference of a circle (r = 5.9 deg.) centered on a fixation cress. Four set sizes (2, 4, 6, 12) were used. In the 1st condition, stimuli were presented for 1 sec. and observers used natural eye movements. We then measured the accuracy of the first saccade (% correct using a shortest-distance criterion). In the 2nd condition, observers fixated a central cross at all times and the stimulus duration was approx. 70 as less than the median latency of the first saccade in the 1st condition (saccadic programming time). We then recorded perceptual performance and discarded trials in which observers broke fixation. Results: For set sizes of 2, 4, 8, and 12, the mean d' across observers for the perceptual decision was 2.03, 1.96, 1.94, 1.71, respectively, while the mean d' of the first saccade was only 0.73, 1.40, 1.23, 1.17. Conclusions: Unlike detection of a disk in noise, for all observers and set-sizes, the perceptual accuracy at the time of saccadic programming is better than that of the lst saccade. For set-sizes of 4, 6, and 12, the amount of information available to the perceptual system relative to that available to the saccadic system is approximately constant (fixed do ratio). For these higher set sizes, the constancy in do across set size for both perception and saccadic decisions is consistent with a simple signal detection theory (SDT) model that processes noisy signals in parallel. However, for 2 observers, at a set-size of 2, saccadic targeting appears to be worse than the SDT model prediction, perhaps due to speed-accuracy trade-off.

Eckstein, M. P.↗
NASA NTRS1999

Autonomous Rovers for Mars Exploration

Rovers will play a critical role in the exploration of Mars. Near-term mission plans call for long traverses over unknown terrain, robust navigation and instrument placement, and reliable operations for extended periods of time. Longer-term missions may visit multiple science sites in a single day and perform opportunistic science data collection, as well as complex scouting, construction, and maintenance tasks in preparation for an eventual human presence. The Pathfinder mission demonstrated the potential for robotic Mars exploration but at the same time indicated the need for more rover autonomy. The highly ground-intensive control with infrequent communication and high latency limited the effectiveness of the Sojourner rover. When failures occurred, Sojourner often sat idle for extended periods of time, awaiting further commands from earth. In future missions, the tasks will be more complex and extended; hence there will be even more situations where things do not go exactly as planned. Significant advances in rover autonomy are needed to cope with increasing task complexity and greater execution uncertainty. Towards this end, we have designed an on-board executive architecture that incorporates robust operation, resource utilization, and failure recovery. In addition, we have designed ground tools to produce and refine contingent schedules that take advantage of the on-board architecture's flexible execution characteristics. Together, the on-board executive and the ground tools constitute an integrated rover autonomy architecture. This work draws from our experience with the Deep Space One autonomy experiment, with enhancements to ensure robust operation in the face of the unpredictable, complex environment that the rover will encounter on Mars. The rover autonomy architecture is currently being developed and deployed on the Marsokhod rover platform at NASA Ames Research Center. The capabilities of the rover autonomy architecture to support autonomous operations will be demonstrated concretely in upcoming field tests.

Anderson, Corin↗
NASA NTRS2002

The Efficiency and the Scalability of an Explicit Operator on an IBM POWER4 System

We present an evaluation of the efficiency and the scalability of an explicit CFD operator on an IBM POWER4 system. The POWER4 architecture exhibits a common trend in HPC architectures: boosting CPU processing power by increasing the number of functional units, while hiding the latency of memory access by increasing the depth of the memory hierarchy. The overall machine performance depends on the ability of the caches-buses-fabric-memory to feed the functional units with the data to be processed. In this study we evaluate the efficiency and scalability of one explicit CFD operator on an IBM POWER4. This operator performs computations at the points of a Cartesian grid and involves a few dozen floating point numbers and on the order of 100 floating point operations per grid point. The computations in all grid points are independent. Specifically, we estimate the efficiency of the RHS operator (SP of NPB) on a single processor as the observed/peak performance ratio. Then we estimate the scalability of the operator on a single chip (2 CPUs), a single MCM (8 CPUs), 16 CPUs, and the whole machine (32 CPUs). Then we perform the same measurements for a chache-optimized version of the RHS operator. For our measurements we use the HPM (Hardware Performance Monitor) counters available on the POWER4. These counters allow us to analyze the obtained performance results.

Frumkin, Michael↗
NASA NTRS2002

Estimating Single-Trial Responses in EEG

Accurate characterization of single-trial field potential responses is critical from a number of perspectives. For example, it allows differentiation of an evoked response from ongoing EEG. We previously developed the multiple component Event Related Potential (mcERP) algorithm to improve resolution of the single-trial evoked response. The mcERP model states that multiple components, each specified by a stereotypic waveform varying in latency and amplitude from trial to trial, comprise the evoked response. Application of the mcERP algorithm to simulated data with three independent, synthetic components has shown that the model is capable of separating these components and estimating their variability. Application of the model to single trial, visual evoked potentials recorded simultaneously from all V1 laminae in an awake, fixating macaque yielded local and far-field components. Certain local components estimated by the model were distributed in both granular and supragranular laminae. This suggests a linear coupling between the responses of thalamo-recipient neuronal ensembles and subsequent responses of supragranular neuronal ensembles, as predicted by the feedforward anatomy of V1. Our results indicate that the mcERP algorithm provides a valid estimation of single-trial responses. This will enable analyses that depend on trial-to-trial variations and those that require separation of the evoked response from background EEG rhythms

Shah, A. S.↗
NASA NTRS2002

An Analysis of Performance Enhancement Techniques for Overset Grid Applications

The overset grid methodology has significantly reduced time-to-solution of high-fidelity computational fluid dynamics (CFD) simulations about complex aerospace configurations. The solution process resolves the geometrical complexity of the problem domain by using separately generated but overlapping structured discretization grids that periodically exchange information through interpolation. However, high performance computations of such large-scale realistic applications must be handled efficiently on state-of-the-art parallel supercomputers. This paper analyzes the effects of various performance enhancement techniques on the parallel efficiency of an overset grid Navier-Stokes CFD application running on an SGI Origin2000 machine. Specifically, the role of asynchronous communication, grid splitting, and grid grouping strategies are presented and discussed. Results indicate that performance depends critically on the level of latency hiding and the quality of load balancing across the processors.

Djomehri, J. J.↗