Tunneling electroresistance effects in epitaxial complex oxides on silicon
Complex oxide-based ferroelectric tunnel junctions (FTJs) show excellent nonvolatile memory characteristics promising for emerging technology. However, integration of these epitaxially grown FTJs electrically with a silicon substrate remains challenging due to their incompatible lattice structures and poor electronic interfaces resulting from the direct synthesis techniques. Here, we present an epitaxial SrRuO 3 /PbZr 0.2 Ti 0.8 O 3 /SrRuO 3 FTJ integrated electrically with a doped silicon substrate after a layer transfer process. The tunnel currents of the FTJ on silicon show a large tunneling electroresistance (~1×10 5 %) effect, which is explained by a numerical FTJ model incorporating pinned dipoles at the interfaces. This proof of concept of the integration of functional oxide heterostructures with silicon opens a pathway to beyond-CMOS computing devices using unconventional materials.