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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Versatile microprocessor-based unit accepts sensor inputs and generates programmed control signals. Typical of possible applications would be to monitor differential temperature measurements in solar-heating systems, to turn on pumps and backup systems, and off-peak control for backup systems.
Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.
Noncontact acoustic technique utilizing air-coupled ultrasonic transducers for measuring motion of chest wall during cardiac cycle gives information on changes in size and compliance of heart ventricles. Information is digitized and fed to microprocessor for rapid storage and analysis for aid in diagnosis of heart condition.
A speech input/output system is presented that can be used to communicate with a task oriented system. Human speech commands and synthesized voice output extend conventional information exchange capabilities between man and machine by utilizing audio input and output channels. The speech input facility is comprised of a hardware feature extractor and a microprocessor implemented isolated word or phrase recognition system. The recognizer offers a medium sized (100 commands), syntactically constrained vocabulary, and exhibits close to real time performance. The major portion of the recognition processing required is accomplished through software, minimizing the complexity of the hardware feature extractor.
The emphasis in current, automatic vehicle testing and diagnosis is primarily centered on the proper operation of the engine. Lateral and longitudinal guidance technologies, including speed control and headway sensing for collision avoidance, are reviewed. The principal guidance technique remains the buried wire. Speed control and headway sensing, even though they show the same basic elements in braking and fuel systems, are proceeding independently. The applications of on-board electronic and microprocessor techniques were investigated; each application (emission control, spark advance, or anti-slip braking) is being treated as an independent problem is proposed. A unified bus system of distributed processors for accomplishing the various functions and testing required for vehicles equipped to use automated highways.
Procedures for installing, operating, and maintaining a programmable control system which utilizes a F8 microprocessor to perform all timing, control, and calculation functions in order to customize system performance to meet individual requirements for solar heating, combined heating and cooling, and/or hot water systems are described. The manual discusses user configuration and options, displays, theory of operation, trouble-shooting procedures, and warranty and assistance. Wiring lists, parts lists, drawings, and diagrams are included.
Orders-of-magnitude improvements in computer performance can be realized with a parallel array of thousands of fast microprocessors. In this architecture, wiring congestion is minimized by limiting processor communication to nearest neighbors. When certain standard algorithms are applied to a viscous flow problem and existing LSI technology is used, performance estimates of this conceptual design show a dramatic decrease in computational time when compared to the CDC 7600.
An automated procedure for measuring and recording the anthropometric active angles is presented. The small portable system consists of a microprocessor controlled video data acquisition system which measures single plane active angles using television video techniques and provides the measured data on sponsored-specified preformatted data sheets. This system, using only a single video camera, observes the end limits of the movement of a pair of separated lamps and calculates the vector angle between the extreme positions.
Electric propulsion power processor technology has processed during the past decade to the point that it is considered ready for application. Several power processor design concepts were evaluated and compared. Emphasis was placed on a 30 cm ion thruster power processor with a beam power rating supply of 2.2KW to 10KW for the main propulsion power stage. Extension in power processor performance were defined and were designed in sufficient detail to determine efficiency, component weight, part count, reliability and thermal control. A detail design was performed on a microprocessor as the thyristor power processor controller. A reliability analysis was performed to evaluate the effect of the control electronics redesign. Preliminary electrical design, mechanical design and thermal analysis were performed on a 6KW power transformer for the beam supply. Bi-Mod mechanical, structural and thermal control configurations were evaluated for the power processor and preliminary estimates of mechanical weight were determined.
A description is given of the Installation, Operation, and Maintenance Manual and information on the power panel and programmable microprocessor, a hydronic solar pump system and a hydronic heating hot water pumping system. These systems are integrated into various configurations for usages in solar energy management, control and monitoring, lighting control, data logging and other solar related applications.
Ultra-reliable core computers are required for improving the reliability of complex military systems. Such computers can provide reliable fault diagnosis, failure circumvention, and, in some cases serve as an automated repairman for their host systems. A small set of building-block circuits which can be implemented as single very large integration devices, and which can be used with off-the-shelf microprocessors and memories to build self checking computer modules (SCCM) is described. Each SCCM is a microcomputer which is capable of detecting its own faults during normal operation and is described to communicate with other identical modules over one or more Mil Standard 1553A buses. Several SCCMs can be connected into a network with backup spares to provide fault-tolerant operation, i.e. automated recovery from faults. Alternative fault-tolerant SCCM configurations are discussed along with the cost and reliability associated with their implementation.
A decoding procedure is described for the (n,k) t-error-correcting Reed-Solomon (RS) code, and an implementation of the (31,15) RS code for the I4-TENEX central system. This code can be used for error correction in large archival memory systems. The principal features of the decoder are a Galois field arithmetic unit implemented by microprogramming a microprocessor, and syndrome calculation by using the g(x) encoding shift register. Complete decoding of the (31,15) code is expected to take less than 500 microsecs. The syndrome calculation is performed by hardware using the encoding shift register and a modified Chien search. The error location polynomial is computed by using Lin's table, which is an interpretation of Berlekamp's iterative algorithm. The error location numbers are calculated by using the Chien search. Finally, the error values are computed by using Forney's method.
Methods of modeling the detection time or latency period of a hardware fault in a digital system are proposed that explain how a computer detects faults in a computational mode. The objectives were to study how software reacts to a fault, to account for as many variables as possible affecting detection and to forecast a given program's detecting ability prior to computation. A series of experiments were conducted on a small emulated microprocessor with fault injection capability. Results indicate that the detecting capability of a program largely depends on the instruction subset used during computation and the frequency of its use and has little direct dependence on such variables as fault mode, number set, degree of branching and program length. A model is discussed which employs an analog with balls in an urn to explain the rate of which subsequent repetitions of an instruction or instruction set detect a given fault.
An optical system for the solar probe is described as well as its capability for improvements in spatial resolution. A magnetograph for measuring the elementary flux tube and obtaining vector geometry field geometry offers the possibility of looking for low contrast weak structure. With the probe's orbit passing over the pole, the structure of the polar field can be directly measured. The detector plane of the system receives a telecentric image of the objective. Because there is an aperture in this focal plane that can both move and change size, polarized line profiles can be obtained at arbitrary points with variable spatial resolution. The telescope microprocessor searches for the magnetic elements and then constructs the vector field.
The National Aeronautics and Space Administration (NASA) has developed an airborne data acquisition and communication system for the National Oceanic and Atmospheric Administration (NOAA). This system known as ASDAR, the Aircraft to Satellite Data Relay, consists of a microprocessor based controller, time clock, transmitter and antenna. Together they acquire meteorological and position information from existing aircraft systems on B-747 aircraft, convert and format these, and transmit them to the ground via the GOES meteorological satellite series. The development and application of the ASDAR system is described with emphasis on unique features. Performance to date is exceptional, providing horizon-to-horizon coverage of aircraft flights. The data collected is of high quality and is considered a valuable addition to the data base from which NOAA generates its weather forecasts.
This paper presents a feasibility analysis, tradeoffs, and implementation for a one-way Doppler extractor system. A Doppler error analysis is discussed which shows that quantization error is a primary source of Doppler measurement error. Several competing extraction techniques are compared, and a 'Vernier' technique is presented which obtains high Doppler resolution with low-speed logic. Parameter tradeoffs and sensitivities for this Vernier technique are discussed, leading to a hardware design configuration. Also presented is a performance evaluation of the resulting breadboard model that verifies the theoretical performance predictions. The breadboard model contains the circuitry to interface with an S-band transponder, to extract the Doppler and time-interval counts, to compute navigational parameters by means of a microprocessor, and to display the results. Performance tests have verified that the breadboard is capable of extracting Doppler, on an S-band signal, to an accuracy of better than 0.02 hertz for a one-second averaging period. This corresponds to a range rate error of no more than 3 millimeters per second.
Consideration is given to the following types of high energy physics instrumentation: drift chambers, multiwire proportional chambers, calorimeters, optical detectors, ionization and scintillation detectors, solid state detectors, and electronic and digital subsystems. Attention is also paid to reactor instrumentation, nuclear medicine instrumentation, data acquisition systems for nuclear instrumentation, microprocessor applications in nuclear science, environmental instrumentation, control and instrumentation of nuclear power generating stations, and radiation monitoring. Papers are also presented on instrumentation for the High Energy Astronomy Observatory.
The data, signal flow, and ground processing requirements for a typical set of X-ray and gamma-ray experiments were examined. A set of algorithms for ground processing were derived and these were taken as requirements imposed on 'onboard' spacecraft computers. Five types of CPU microprocessors were evaluated and compared with one another to determine the degree to which the data processing could be performed onboard the spacecraft. These included the NASA Standard Spacecraft Computer (NSSC-1), the Z-80, a Z-80 augmented with an auxiliary fast multiply chip, and an advanced augmented Z-80 with virtually unlimited memory. These CPU were investigated when used in a centralized mode, an experiment dedicated mode, and a hybrid of the first two modes. It was found that the use of onboard processing can significantly reduce downlink data rates for typical payloads, and may lead to greater efficiency of operation. Quantitative data for gamma-ray and X-ray payloads will be presented, and the results of the analysis discussed.