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At least 451 records · Page 25

Total-Ionizing-Dose Effects on Read Noise of MLC 3-D NAND Memories T

This paper analyzes the total ionizing dose (TID) effects on noise characteristics of commercial multi-level-cell (MLC) 3-D NAND memory technology during the read operation. Additionally, the chips were exposed to a Co-60 gamma-ray source for up to 100 krad(Si) of TID. We find that the number of noisy cells in the irradiated chip increases with TID. Bit-flip noise was more dominant for cells in an erased state during irradiation compared to programmed cells.

3-D NAND Flash↗

O3BNN-R: An Out-Of-Order Architecture for High-Performance and Regularized BNN Inference

Binarized Neural Networks (BNN) have drawn tremendous attention due to significantly reduced computational complexity and memory demand. They have especially shown great potential in cost- and power-restricted domains, such as IoT and smart edge-devices, where reaching a certain accuracy bar is often sufficient, and real-time is highly desired.In this work, we demonstrate that the highly-condensed BNN model can be shrunk significantly further by dynamically pruning irregular redundant edges. Based on two new observations on BNN-specific properties, an out-of-order (OoO) architecture – O3BNN-R, can curtail edge evaluation in cases where the binary output of a neuron can be determined early. Similar to Instruction-Level-Parallelism(ILP), these fine-grained, irregular, runtime pruning opportunities are traditionally presumed to be difficult to exploit. In order to increase the pruning opportunities, we also optimize the training process by adding 2 regularization items in the loss function (1) for pooling pruning and (2) for threshold pruning. We evaluate our design on an FPGA platform using three well-known networks, including VggNet-16, AlexNet for ImageNet, and a VGG-like network for Cifar-10.

Geng, Tong↗

MIND-MAC: Multi-Level In-memory Quasi Non-Destructive MAC Operation in Compact 2T-nC FeRAM for Efficient DNN Accelerator

We present MIND-MAC, a compact 2T-nC FeRAM architecture that performs multi-level, quasi-non-destructive in-memory multiply–accumulate (MAC) for deep neural networks. By exploiting voltage-controlled partial domain switching in MFM capacitors and read-transistor amplification, the cell stores multi-bit weights and gates bit-serial inputs to produce an accumulated current on shared lines. We combine TCAD-extracted parasitics with experimentally calibrated ferroelectric models in SPICE to validate device-/circuit-level behavior, and validate multi-level sensing and QNRO with measurements on a fabricated 2T-3C test vehicle. An analytical system model maps MIND-MAC to a 6-GB main-memory in-memory compute (IMC) architecture and benchmarks VGG13 inference in 61.08 ms at 964.99 mJ. Results indicate high density, reduced rewrite overhead, and energy efficiency, positioning 2T-nC FeRAM as a promising IMC candidate for next-generation AI hardware.

36 MATERIALS SCIENCE↗

Method and apparatus for scheduling in a non-uniform compute device

A data processing apparatus, and method of operation thereof, for executing instructions. The apparatus includes one or more host processors, each having a first processing unit, and a multi-level memory system. One or more levels of the memory system are tightly coupled to a corresponding second processing unit. At least one of the host processors includes an instruction scheduler that routes instructions selectively to at least one of the first and second processing units, dependent upon the availability of the processing units and the location, within the memory system, of data to be used when executing the instructions.

97 MATHEMATICS AND COMPUTING↗

Quantum electronics and optics at the interface of solid neon and superfluid helium

Here, we predict a new quantum electronic structure at the interface between two condensed phases of noble-gas elements: solid neon and superfluid helium. An excess electron injected onto this interface self-confines its wavefunction into a nanometric dome structure. Its size varies with pressure and optical transitions cover a broad mid-infrared spectrum. A collection of such electrons can form a classical Wigner crystal resembling a quantum-dot array on a triangular lattice. Under ultrafast laser illumination, this Wigner crystal can exhibit the quantum optical phenomenon of superradiance in the picosecond time scale. The ultralong spin-coherence time and micron-scale deterministic configurability allow the electrons in this system to serve as quantum information carriers. Their spin states can be controlled and readout by on-chip single-electron devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Characterization of ECRAM materials and devices

As the limits of Moore’s Law approaches, new computing paradigms are developing to breakthrough this bottleneck. One such computer architecture is neuromorphic computing, which models the brain. Electrochemical random-access memory (ECRAM) is a low power and energy efficient memory due to characteristics, such as in-memory compute, ion modulation of the channel conductance, and computation distribution with large scale array integration.

97 MATHEMATICS AND COMPUTING↗

Evaluating the Performance of Integer Sum Reduction in SYCL on GPUs

SYCL is a promising programming model for heterogeneous computing—allowing a single-source code to target devices from multiple vendors. One significant task performed on these accelerators is a primitive operation for integer sum reduction. This paper presents several SYCL implementations of integer sum reduction—using atomic functions, shared local memory, vectorized memory accesses and parameterized workload sizes—to compare the performance and maturity of SYCL against open-source vendor-specific implementations of the same reduction. For a sufficiently large number of integers, tuning the parameters of our SYCL implementations achieves 1.4X speedup over the open-source implementations on an Intel UHD630 integrated GPU. The SYCL reduction is 3% faster than the templated reduction in Thrust, and 0.3% faster than the device reduction in CUB on an Nvidia P100 GPU. The SYCL reduction is 1.9% faster than the templated reduction in Thrust, and 0.4% faster than the device reduction in CUB on an Nvidia V100 GPU.

Jin, Zheming↗

tite

The TITE library provides type erasure implementation utilizing the tag_invoke paradigm proposed for standardization here: https://open-std.org/JTC1/SC22/WG21/docs/papers/2019/p1895r0.pdf. The implementation contained herein is largely modeled after that provided in the standardization proposal and available at https://godbolt.org/z/3TvO4f. Significant modification have been made to the original implementation to improve its suitability to be utilized for GPU architectures. In particular the implementation: - only requires a C++14 standard. - has been extended to obtain vtables for GPU device architectures in addition to CPU host architectures. - provides a gpu_allocator class appropriate for allocation of the type-erased object to GPU memory - provides copy semantics omitted from the original implementation-- - generally the copy semantics are to completely copy the type-erased object - when the usage of the type-erased object guarantees immutability the copy semantics are altered to reference-counted shallow copies (copies of pointers) for improved performance

Solomon, CJ↗

Design and fabrication of robust hybrid photonic crystal cavities

Abstract Heterogeneously integrated hybrid photonic crystal cavities enable strong light–matter interactions with solid state, optically addressable quantum memories. A key challenge to realizing high quality factor ( Q ) hybrid photonic crystals is the reduced index contrast on the substrate compared to suspended devices in air. This challenge is particularly acute for color centers in diamond because of diamond’s high refractive index, which leads to increased scattering loss into the substrate. Here, we develop a design methodology for hybrid photonic crystals utilizing a detailed understanding of substrate-mediated loss, which incorporates sensitivity to fabrication errors as a critical parameter. Using this methodology, we design robust, high-Q, GaAs-on-diamond photonic crystal cavities, and by optimizing our fabrication procedure, we experimentally realize cavities with Q approaching 30,000 at a resonance wavelength of 955 nm.

Abulnaga, Alex↗

Design, characterization and shape recovery behavior of 3D/4D printed shape memory polymers (SMPs)

Shape memory polymers (SMPs) represent a paradigm shift in material science, uniquely capable of undergoing reversible shape transformations triggered by external stimuli, positioning them as pivotal in developing next-generation biomedical devices, aerospace components, and adaptive structures. Extensive research has been done on SMPs with a major focus on high-temperature programming methods, which can limit energy efficiency and applicability with temperature-sensitive materials. Additionally, while various SMP blends have demonstrated great potential, limited work has been done on the suitability for 3D printing these materials, particularly under high-strain and ambient temperature programming conditions. In this study, a three-component optimized SMP composition was evaluated by 3D printing via the Material Extrusion (MEX) technique and investigating its ambient temperature-programming behavior at high strains. The SMP formulation studied was a tailored blend of thermoplastic polyurethane (TPU), polycaprolactone (PCL), and an octadecane diol-based copolymer (OBC) that exhibits robust shape memory behavior, high strain tolerance, and efficient force generation. Rigorous thermal, mechanical, and shape recovery analyses, along with optimized printing parameters and consistent shape recovery rates of up to 90%, were achieved under dynamic mechanical analysis (DMA), even under ambient programming conditions. This work demonstrates the SMP composition’s potential for adaptive, self-deployable systems with 4D printing characteristics ideal for bio-inspired structures and artificial muscle fibers.

Sudan, Kavish [University of Louisville, KY]↗

Predictor-corrector models for lightweight massive machine-type communications in Industry 4.0

Future Industry 4.0 scenarios are characterized by seamless integration between computational and physical processes. To achieve this objective, dense platforms made of small sensing nodes and other resource constraint devices are ubiquitously deployed. All these devices have a limited number of computational resources, just enough to perform the simple operation they are in charge of. The remaining operations are delegated to powerful gateways that manage sensing nodes, but resources are never unlimited, and as more and more devices are deployed on Industry 4.0 platforms, gateways present more problems to handle massive machine-type communications. Although the problems are diverse, those related to security are especially critical. To enable sensing nodes to establish secure communications, several semiconductor companies are currently promoting a new generation of devices based on Physical Unclonable Functions, whose usage grows every year in many real industrial scenarios. Those hardware devices do not consume any computational resource but force the gateway to keep large key-value catalogues for each individual node. In this context, memory usage is not scalable and processing delays increase exponentially with each new node on the platform. In this paper, we address this challenge through predictor-corrector models, representing the key-value catalogues. Models are mathematically complex, but we argue that they consume less computational resources than current approaches. The lightweight models are based on complex functions managed as Laurent series, cubic spline interpolations, and Boolean functions also developed as series. Unknown parameters in these models are predicted, and eventually corrected to calculate the output value for each given key. The initial parameters are based on the Kane Yee formula. An experimental analysis and a performance evaluation are provided in the experimental section, showing that the proposed approach causes a significant reduction in the resource consumption.

97 MATHEMATICS AND COMPUTING↗

Benchmarking Operators in Deep Neural Networks for Improving Performance Portability of SYCL

SYCL is a portable programming model for heterogeneous computing, so it is important to obtain reasonable performance portability of SYCL. Towards the goal of better understanding and improving performance portability of SYCL for machine learning workloads, we have been developing benchmarks for basic operators in deep neural networks (DNNs). These operators could be offloaded to heterogeneous computing devices such as graphics processing units (GPUs) to speed up computation. In this paper, we introduce the benchmarks, evaluate the performance of the operators on GPU-based systems, and describe the causes of the performance gap between the SYCL and Compute Unified Device Architecture (CUDA) kernels. We find that the causes are related to the utilization of the texture cache for read-only data, optimization of the memory accesses with strength reduction, use of local memory, and register usage per thread. We hope that the efforts of developing benchmarks for studying performance portability will stimulate discussion and interactions within the community.

Jin, Zheming [ORNL] (ORCID:000000027197780X)↗

Anomalous magnetic noise in an imperfectly flat landscape in the topological magnet Dy 2 Ti 2 O 7

Noise generated by motion of charge and spin provides a unique window into materials at the atomic scale. From temperature of resistors to electrons breaking into fractional quasiparticles, “listening” to the noise spectrum is a powerful way to decode underlying dynamics. Here, we use ultrasensitive superconducting quantum interference device (SQUIDs) to probe the puzzling noise in a frustrated magnet, the spin-ice compound Dy 2 Ti 2 O 7 (DTO), revealing cooperative and memory effects. DTO is a topological magnet in three dimensions—characterized by emergent magnetostatics and telltale fractionalized magnetic monopole quasiparticles—whose real-time dynamical properties have been an enigma from the very beginning. We show that DTO exhibits highly anomalous noise spectra, differing significantly from the expected Brownian noise of monopole random walks, in three qualitatively different regimes: equilibrium spin ice, a “frozen” regime extending to ultralow temperatures, and a high-temperature “anomalous” paramagnet. We present several distinct mechanisms that give rise to varied colored noise spectra. In addition, we identify the structure of the local spin-flip dynamics as a crucial ingredient for any modeling. Thus, the dynamics of spin ice reflects the interplay of local dynamics with emergent topological degrees of freedom and a frustration-generated imperfectly flat energy landscape, and as such, it points to intriguing cooperative and memory effects for a broad class of magnetic materials.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Cooling and Timing Tests of the ATLAS Fast TracKer VME Boards

The Fast TracKer (FTK) is an ATLAS trigger upgrade built for full-event, low-latency, high-rate tracking. The FTK core, made of 9U VME boards, performs the most demanding computational task. The associative memory board (AMB) serial link processor and the auxiliary card (AUX), plugged on the front and back sides of the same VME slot, constitute the processing unit (PU), which finds tracks using hits from eight layers of the inner detector. The PU works in pipeline with the second stage board (SSB), which finds 12-layer tracks by adding extra hits to the identified tracks. In the designed configuration, 16 PUs and four SSBs are installed in a VME crate. The high power consumption of the AMB, AUX, and SSB (respectively, of about 250, 70, and 160 W per board) required the development of a custom cooling system. Even though the expected power consumption for each VME crate of the FTK system is high compared with a common VME setup, the 8 FTK core crates will use ≈60 kW, which is just a fraction of the power and the space needed for a CPU farm performing the same task. We report on the integration of 32 PUs and eight SSBs inside the FTK system, on the infrastructures needed to run and cool them, and on the tests performed to verify the system processing rate and the temperature stability at a safe value.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Battery Monitoring System

The component that is powered by the battery pack being monitored is a valuable asset and must be in working condition at all times. Battery chemistry and characteristics have a major role in how to evaluate the state of the battery. The battery monitoring system has many parts that lead to an accurate battery reading. The components consist of a coulomb counting device, end of life voltage detection, a consideration of use for a real-time clock (RTC), temperature sensor, and non-volatile random-access memory (NVRAM). The combination of these elements allows the monitoring system to be highly reliant. Moving forward a better implementation of the ideas in this paper and further testing should ensure a high-quality battery monitoring system.

25 ENERGY STORAGE↗

Evaluating Operators in Deep Neural Networks for Improving Performance Portability of SYCL

SYCL is a portable programming model for heterogeneous computing, so it is important to obtain reasonable performance portability of SYCL. Towards the goal of better understanding and improving performance portability of SYCL for machine learning workloads, we have been developing benchmarks for basic operators in deep neural networks (DNNs). These operators could be offloaded to heterogeneous computing devices such as graphics processing units (GPUs) to speed up computation. In this work, we introduce the benchmarks, evaluate the performance of the operators on GPU-based systems, and describe the causes of the performance gap between the SYCL and Compute Unified Device Architecture (CUDA) kernels. We find that the causes are related to the utilization of the texture cache for read-only data, optimization of the memory accesses with strength reduction, shared local memory accesses, and register usage per thread. We hope that the efforts of developing benchmarks for studying performance portability will stimulate discussion and interactions within the community.

97 MATHEMATICS AND COMPUTING↗

Probing Dynamic Phase Changes in Electrochemical Systems with Cryogenic and in Situ Analytical Electron Microscopy (Final Technical Report)

In this project, we focus on the advancement of our newly developed, unique in situ and cryogenic analytical electron microscopy (AEM) techniques and the development of additional high-end capabilities to quantitatively elucidate the mechanisms of resistive state changes in solid-state electrochemical materials for non-volatile, neuromorphic memory. The objectives of the proposed research are (1) to characterize and elucidate the mechanisms by which electronic state changes occur in various solid-state devices to build guiding principles for electrochemically activated smart materials; (2) to advance our understanding of such mechanisms by coupling cryogenic and in situ techniques to control kinetics of the observed mechanisms while mitigating probe-induced damage; and (3) to utilize additional advanced techniques including electron-beam induced current and quantum mechanical simulations in order to identify the underlying fundamental science of such processes, including roles of defect formation and its effect on phase nucleation, as well as dynamics of these processes in the electrochemical systems at the nanometer scale.

25 ENERGY STORAGE↗

Erbium quantum memory platform with long optical coherence via back-end-of-line deposition on foundry-fabricated photonics

Realizing scalable quantum interconnects necessitates the integration of solid-state quantum memories with foundry photonics processes. While prior photonic integration efforts have relied upon specialized, laboratory-scale fabrication techniques, this work demonstrates the monolithic integration of a quantum memory platform with low-loss foundry photonic circuits via back-end-of-line deposition. We deposited thin films of titanium dioxide (Ti⁢O 2 ) doped with erbium (Er) onto silicon nitride nanophotonic waveguides and studied Er optical coherence at subkelvin temperatures with photon echo techniques. Furthermore, we suppressed optical dephasing through ex-situ oxygen annealing and optimized measurement conditions, which yielded an optical coherence time of 64 μ⁢s (a 5-kHz homogeneous linewidth) and slow spectral diffusion of 27 kHz over 4 ms, results that are comparable to state-of-the-art Er nanophotonic devices. Combined with second-long electron spin lifetimes and demonstrated electrical control of Er emission, our findings establish Er:Ti⁢O 2 on foundry photonics as a manufacturable platform for ensemble and single-ion quantum memories.

Electro-optic effects↗