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At least 451 records · Page 25

Simulation of cosmic-ray induced soft errors and latchup in integrated-circuit computer memories

Soft errors have been induced in solid-state static RAM's by iron nuclei from the Lawrence Berkeley Laboratory (LBL) Bevalac, in experiments designed to prove the ability of iron-group cosmic rays to generate such errors. Subsequently, various delidded device types were tested in beams of argon and krypton ions from the LBL 88-inch Cyclotron, at energies near 2 MeV/nucleon. The latter tests showed that some devices are essentially immune to bit error while others are quite susceptible. Good agreement was obtained with model predictions in cases where the latter exist. Latchup, whose cause is attributed to individual heavy ions, was also observed in some device types.

Kolasinski, W. A.↗

Autonomous Slat-Cove-Filler Device for Reduction of Aeroacoustic Noise Associated with Aircraft Systems

A slat cove filler is utilized to reduce airframe noise resulting from deployment of a leading edge slat of an aircraft wing. The slat cove filler is preferably made of a super elastic shape memory alloy, and the slat cove filler shifts between stowed and deployed shapes as the slat is deployed. The slat cove filler may be configured such that a separate powered actuator is not required to change the shape of the slat cove filler from its deployed shape to its stowed shape and vice-versa. The outer contour of the slat cove filler preferably follows a profile designed to maintain accelerating flow in the gap between the slat cove filler and wing leading edge to provide for noise reduction.

Turner, Travis L.↗

On the stability of robotic systems with random communication rates

Control problems of sampled data systems which are subject to random sample rate variations and delays are studied. Due to the rapid growth of the use of computers more and more systems are controlled digitally. Complex systems such as space telerobotic systems require the integration of a number of subsystems at different hierarchical levels. While many subsystems may run on a single processor, some subsystems require their own processor or processors. The subsystems are integrated into functioning systems through communications. Communications between processes sharing a single processor are also subject to random delays due to memory management and interrupt latency. Communications between processors involve random delays due to network access and to data collisions. Furthermore, all control processes involve delays due to casual factors in measuring devices and to signal processing. Traditionally, sampling rates are chosen to meet the worst case communication delay. Such a strategy is wasteful as the processors are then idle a great proportion of the time; sample rates are not as high as possible resulting in poor performance or in the over specification of control processors; there is the possibility of missing data no matter how low the sample rate is picked. Asymptotical stability with probability one for randomly sampled multi-dimensional linear systems is studied. A sufficient condition for the stability is obtained. This condition is so simple that it can be applied to practical systems. A design procedure is also shown.

Kobayashi, H.↗

Presentation on a Space Acceleration Measurement System (SAMS)

The primary objective of the Space Acceleration Measurement Systems (SAMS) project is to provide an acceleration measurement system capable of serving a wide variety of space experiments. The design of the system being developed under this project takes into consideration requirements for experiments located in the middeck, in the orbiter bay, and in Spacelab. In addition to measuring, conditioning, and recording accelerations, the system will be capable of performing complex calculations and interactive control. The main components consist of a remote triaxial optical storage device. In operation, the triaxial sensor head produces output signals in response to acceleration inputs. These signals are preamplified, filtered and converted into digital data which is then transferred to optical memory. The system design is modular, facilitating both software and hardware upgrading as technology advances. Two complete acceleration measurement flight systems will be build and tested under this project.

Chase, Theodore L.↗

Multiple single event upsets in CMOS static rams

The occurrence of multiple upset errors during ground tests can contaminate the data and lead to error cross sections which are too high. In space, multiple errors may produce higher upsets than predicted and if they occur in single words they can defeat error detection and correction hardware. This investigation involves data which were taken during an experimental study of dose imprint effects in static memories. The results show that multiple errors occurred mainly for heavy ions with high linear energy transfers and with the majority of these in the soft upset sections of the dose-imprinted memory samples. The percentages of the total number of errors which were singles, doubles, and triplets, were determined as a function of LET, dose, and soft or hard section of the devices. The experimental observations are compared to the predictions of simple binomial statistics.

Stassinopoulos, E. G.↗

Holographic Optical Data Storage

Although the basic idea may be traced back to the earlier X-ray diffraction studies of Sir W. L. Bragg, the holographic method as we know it was invented by D. Gabor in 1948 as a two-step lensless imaging technique to enhance the resolution of electron microscopy, for which he received the 1971 Nobel Prize in physics. The distinctive feature of holography is the recording of the object phase variations that carry the depth information, which is lost in conventional photography where only the intensity (= squared amplitude) distribution of an object is captured. Since all photosensitive media necessarily respond to the intensity incident upon them, an ingenious way had to be found to convert object phase into intensity variations, and Gabor achieved this by introducing a coherent reference wave along with the object wave during exposure. Gabor's in-line recording scheme, however, required the object in question to be largely transmissive, and could provide only marginal image quality due to unwanted terms simultaneously reconstructed along with the desired wavefront. Further handicapped by the lack of a strong coherent light source, optical holography thus seemed fated to remain just another scientific curiosity, until the field was revolutionized in the early 1960s by some major breakthroughs: the proposition and demonstration of the laser principle, the introduction of off-axis holography, and the invention of volume holography. Consequently, the remainder of that decade saw an exponential growth in research on theory, practice, and applications of holography. Today, holography not only boasts a wide variety of scientific and technical applications (e.g., holographic interferometry for strain, vibration, and flow analysis, microscopy and high-resolution imagery, imaging through distorting media, optical interconnects, holographic optical elements, optical neural networks, three-dimensional displays, data storage, etc.), but has become a prominent am advertising, and security medium as well. The evolution of holographic optical memories has followed a path not altogether different from holography itself, with several cycles of alternating interest over the past four decades. P. J. van Heerden is widely credited for being the first to elucidate the principles behind holographic data storage in a 1963 paper, predicting bit storage densities on the order of 1/lambda(sup 3) with source wavelength lambda - a fantastic capacity of nearly 1 TB/cu cm for visible light! The science and engineering of such a storage paradigm was heavily pursued thereafter, resulting in many novel hologram multiplexing techniques for dense data storage, as well as important advances in holographic recording materials. Ultimately, however, the lack of such enabling technologies as compact laser sources and high performance optical data I/O devices dampened the hopes for the development of a commercial product. After a period of relative dormancy, successful applications of holography in other arenas sparked a renewed interest in holographic data storage in the late 1980s and the early 1990s. Currently, with most of the critical optoelectronic device technologies in place and the quest for an ideal holographic recording medium intensified, holography is once again considered as one of several future data storage paradigms that may answer our constantly growing need for higher-capacity and faster-access memories.

Timucin, Dogan A.↗

MOSFET analog memory circuit achieves long duration signal storage

Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.

Source record↗

Alphanumeric character generator for oscilloscope

Compact portable alphanumeric display device can be used with any general-purpose externally-triggered oscilloscope without need for Z-axis modulation. Factors limiting size of display are: output line capacitance, read-only memory speed, and persistence of cathode-ray-tube.

Lockerson, D. C.↗

Single event upset vulnerability of selected 4K and 16K CMOS static RAM's

Upset thresholds for bulk CMOS and CMOS/SOS RAMS were deduced after bombardment of the devices with 140 MeV Kr, 160 MeV Ar, and 33 MeV O beams in a cyclotron. The trials were performed to test prototype devices intended for space applications, to relate feature size to the critical upset charge, and to check the validity of computer simulation models. The tests were run on 4 and 1 K memory cells with 6 transistors, in either hardened or unhardened configurations. The upset cross sections were calculated to determine the critical charge for upset from the soft errors observed in the irradiated cells. Computer simulations of the critical charge were found to deviate from the experimentally observed variation of the critical charge as the square of the feature size. Modeled values of series resistors decoupling the inverter pairs of memory cells showed that above some minimum resistance value a small increase in resistance produces a large increase in the critical charge, which the experimental data showed to be of questionable validity unless the value is made dependent on the maximum allowed read-write time.

Kolasinski, W. A.↗

Application of digital image analysis techniques to antimisting fuel spray characterization

Pulsed ruby laser sheet illumination of the spray is used for the initial recording of data on very-high-resolution photographic film. The digitization of mosaic elements is effected with a vidicon and video digitizer whose output is stored in computer RAM memory for processing. Highly nonspherical elements and a broad range of drop diameters (8-2000 microns) resulting from the unusual rheological properties of the fuel-additive system are accommodated by the device configuration and algorithms. It is found that the generation of two-dimensional images by means of scattered light also eliminates errors resulting from variations in the index of refraction and from the submicron scattering sites that are often present within the modified fuel. No a priori information on the drop size distribution or on the system response to various drop sizes is required.

Fleeter, R.↗

Information storage at the molecular level - The design of a molecular shift register memory

The control of electron transfer rates is discussed and a molecular shift register memory at the molecular level is described. The memory elements are made up of molecules which can exist in either an oxidized or reduced state and the bits can be shifted between the cells with photoinduced electron transfer reactions. The device integrates designed molecules onto a VLSI substrate. A control structure to modify the flow of information along a shift register is indicated schematically.

Beratan, David N.↗

Ambient temperature recorder

A temperature data recorder, designated the Ambient Temperature Recorder (ATR-4), was developed at NASA Ames Research Center to meet particular requirements for space life sciences experiments. The small, self-contained, four-channel, battery-powered device records 32 kilobytes of temperature data over a range of -40 to +60 C at four sampling intervals ranging from 1.875 to 15 minutes. Data is stored in its internal electronic memory for later readout by a personal computer.

Russell, Larry D.↗

Radiation hardened microprocessor for small payloads

The RH-3000 program is developing a rad-hard space qualified 32-bit MIPS R-3000 RISC processor under the Naval Research Lab sponsorship. In addition, under IR&D Harris is developing RHC-3000 for embedded control applications where low cost and radiation tolerance are primary concerns. The development program leverages heavily from commercial development of the MIPS R-3000. The commercial R-3000 has a large installed user base and several foundry partners are currently producing a wide variety of R-3000 derivative products. One of the MIPS derivative products, the LR33000 from LSI Logic, was used as the basis for the design of the RH-3000 chipset. The RH-3000 chipset consists of three core chips and two support chips. The core chips include the CPU, which is the R-3000 integer unit and the FPA/MD chip pair, which performs the R-3010 floating point functions. The two support whips contain all the support functions required for fault tolerance support, real-time support, memory management, timers, and other functions. The Harris development effort had first passed silicon success in June, 1992 with the first rad-hard 32-bit RH-3000 CPU chip. The CPU device is 30 kgates, has a 508 mil by 503 mil die size and is fabricated at Harris Semiconductor on the rad-hard CMOS Silicon on Sapphire (SOS) process. The CPU device successfully passed tesing against 600,000 test vectors derived directly on the LSI/MIPS test suite and has been operational as a single board computer running C code for the past year. In addition, the RH-3000 program has developed the methodology for converting commercially developed designs utilizing logic synthesis techniques based on a combination of VHDK and schematic data bases.

Shah, Ravi↗

Particle sensor array

A particle sensor array which in a preferred embodiment comprises a static random access memory having a plurality of ion-sensitive memory cells, each such cell comprising at least one pull-down field effect transistor having a sensitive drain surface area (such as by bloating) and at least one pull-up field effect transistor having a source connected to an offset voltage. The sensitive drain surface area and the offset voltage are selected for memory cell upset by incident ions such as alpha-particles. The static random access memory of the present invention provides a means for selectively biasing the memory cells into the same state in which each of the sensitive drain surface areas is reverse biased and then selectively reducing the reversed bias on these sensitive drain surface areas for increasing the upset sensitivity of the cells to ions. The resulting selectively sensitive memory cells can be used in a number of applications. By way of example, the present invention can be used for measuring the linear energy transfer of ion particles, as well as a device for assessing the resistance of CMOS latches to Cosmic Ray induced single event upsets. The sensor of the present invention can also be used to determine the uniformity of an ion beam.

Buehler, Martin G.↗

Ovonic switching in tin selenide thin films

Amorphous tin selenide thin films which possess Ovonic switching properties were fabricated using vacuum deposition techniques. Results obtained indicate that memory type Ovonic switching does occur in these films the energy density required for switching from a high impedance to a low impedance state is dependent on the spacing between the electrodes of the device. The switching is also function of the magnitude of the applied voltage pulse. A completely automated computer controlled testing procedure was developed which allows precise control over the shape of the applied voltage switching pulse. A survey of previous experimental and theoretical work in the area of Ovonic switching is also presented.

Baxter, C. R.↗

High-performance mass storage system for workstations

Reduced Instruction Set Computer (RISC) workstations and Personnel Computers (PC) are very popular tools for office automation, command and control, scientific analysis, database management, and many other applications. However, when using Input/Output (I/O) intensive applications, the RISC workstations and PC's are often overburdened with the tasks of collecting, staging, storing, and distributing data. Also, by using standard high-performance peripherals and storage devices, the I/O function can still be a common bottleneck process. Therefore, the high-performance mass storage system, developed by Loral AeroSys' Independent Research and Development (IR&D) engineers, can offload a RISC workstation of I/O related functions and provide high-performance I/O functions and external interfaces. The high-performance mass storage system has the capabilities to ingest high-speed real-time data, perform signal or image processing, and stage, archive, and distribute the data. This mass storage system uses a hierarchical storage structure, thus reducing the total data storage cost, while maintaining high-I/O performance. The high-performance mass storage system is a network of low-cost parallel processors and storage devices. The nodes in the network have special I/O functions such as: SCSI controller, Ethernet controller, gateway controller, RS232 controller, IEEE488 controller, and digital/analog converter. The nodes are interconnected through high-speed direct memory access links to form a network. The topology of the network is easily reconfigurable to maximize system throughput for various applications. This high-performance mass storage system takes advantage of a 'busless' architecture for maximum expandability. The mass storage system consists of magnetic disks, a WORM optical disk jukebox, and an 8mm helical scan tape to form a hierarchical storage structure. Commonly used files are kept in the magnetic disk for fast retrieval. The optical disks are used as archive media, and the tapes are used as backup media. The storage system is managed by the IEEE mass storage reference model-based UniTree software package. UniTree software will keep track of all files in the system, will automatically migrate the lesser used files to archive media, and will stage the files when needed by the system. The user can access the files without knowledge of their physical location. The high-performance mass storage system developed by Loral AeroSys will significantly boost the system I/O performance and reduce the overall data storage cost. This storage system provides a highly flexible and cost-effective architecture for a variety of applications (e.g., realtime data acquisition with a signal and image processing requirement, long-term data archiving and distribution, and image analysis and enhancement).

Chiang, T.↗

Experiments with recursive estimation in astronomical image processing

Recursive estimation concepts were applied to image enhancement problems since the 70's. However, very few applications in the particular area of astronomical image processing are known. These concepts were derived, for 2-dimensional images, from the well-known theory of Kalman filtering in one dimension. The historic reasons for application of these techniques to digital images are related to the images' scanned nature, in which the temporal output of a scanner device can be processed on-line by techniques borrowed directly from 1-dimensional recursive signal analysis. However, recursive estimation has particular properties that make it attractive even in modern days, when big computer memories make the full scanned image available to the processor at any given time. One particularly important aspect is the ability of recursive techniques to deal with non-stationary phenomena, that is, phenomena which have their statistical properties variable in time (or position in a 2-D image). Many image processing methods make underlying stationary assumptions either for the stochastic field being imaged, for the imaging system properties, or both. They will underperform, or even fail, when applied to images that deviate significantly from stationarity. Recursive methods, on the contrary, make it feasible to perform adaptive processing, that is, to process the image by a processor with properties tuned to the image's local statistical properties. Recursive estimation can be used to build estimates of images degraded by such phenomena as noise and blur. We show examples of recursive adaptive processing of astronomical images, using several local statistical properties to drive the adaptive processor, as average signal intensity, signal-to-noise and autocorrelation function. Software was developed under IRAF, and as such will be made available to interested users.

Busko, I.↗

Using Modern Design Tools for Digital Avionics Development

Using Modem Design Tools for Digital Avionics Development Shrinking development time and increased complexity of new avionics forces the designer to use modem tools and methods during hardware development. Engineers at the Marshall Space Flight Center have successfully upgraded their design flow and used it to develop a Mongoose V based radiation tolerant processor board for the International Space Station's Water Recovery System. The design flow, based on hardware description languages, simulation, synthesis, hardware models, and full functional software model libraries, allowed designers to fully simulate the processor board from reset, through initialization before any boards were built. The fidelity of a digital simulation is limited to the accuracy of the models used and how realistically the designer drives the circuit's inputs during simulation. By using the actual silicon during simulation, device modeling errors are reduced. Numerous design flaws were discovered early in the design phase when they could be easily fixed. The use of hardware models and actual MIPS software loaded into full functional memory models also provided checkout of the software development environment. This paper will describe the design flow used to develop the processor board and give examples of errors that were found using the tools. An overview of the processor board firmware will also be covered.

Hyde, David W.↗