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At least 451 records · Page 25

Investigation of superlattice device structures

This report describes the investigation of growth properties, and the structure of epitaxial multilayer Si(Si(1x)Ge(x)) films grown on bulk Silicon Substrates. It also describes the fabrication and characterization of MOSFET and MESFET devices made on these epitaxial films. Films were grown in a CVD reactor using hydrides of Si and Ge with H2 and He as carrier gases. Growth temperatures were between 900 C and 1050 C with most films grown at 1000 C. Layer thickness was between 300A and 2000A and total film thickness was between 0.25 micro m and 7 micro m. The Ge content (X) in the alloy layers was between .05 and 0.2. N-type multilayer films grown on (100) p-type Si showed Hall mobility in the range 1000 to 1500 sq cm/v for an average carrier concentration of approx. 10 to the 16th power/cu cm. This is up to 50% higher than the Hall mobility observed in epitaxial Si films grown under the same conditions and with the same average carrier concentration. The mobility enhancement occurred in films with average carrier concentration (n) from 0.7 x 10 to the 16th power to 2 x 10 to the 17th power/cu cm, and total film thickness greater than 1.0 micro m. No mobility enhancement was seen in n-type multilayer films grown on (111) Si or in p-type multilayer films. The structure of the films was investigated was using SEM, TEM, AES, SIMS, and X-ray double crystal diffraction techniques. The film composition profile (AES, SIMS) showed that the transition region between layers is of the order of about 100A. The TEM examination revealed a well defined layered structure with fairly sharp interfaces and good crystalline quality. It also showed that the first few layers of the film (closest to the substrate) are uneven, most probably due to the initial growth pattern of the epitaxial film where growth occurs first in isolated islands that eventually growth and coalesce. The X-ray diffraction measurement determined the elastic strain and strain relief in the alloy layers of the film and the elastic strain in the intervening Si layers.

Gergis, I. S.↗

Infrared and visible detector electronics for the Infrared Astronomical Satellite (IRAS)

The paper describes the detectors, preamplifiers, and processing electronics; the system characterization test methods and results; and the performance of the detectors and electronics during the first month of on-orbit operation of the IRAS telescope. The Focal Plane Array (FPA) consists of 62 IR channels and 8 visible channels operating at 2.5 K. The IR detectors are grouped in eight 7 or 8 channel staggered linear subarrays with shared bias voltage; the visible detectors are grouped in two 4 channel skewed arrays, also with shared bias. Each channel detector is dc coupled to a TIA preamplifier through a very low power thermally isolated JFET source follower operating at about 65 K within the FPA housing. The visible channel detectors are ac coupled to TIA preamplifiers and signal chain electronics using MOSFET source followers operating at about 2.5 K within the FPA housing. The detectors, preamplifiers, analog electronics, and grounding are discussed as they evolved and were implemented during FPA retrofit, telescope integration, and preparation for launch.

Langford, D. L.↗

FET charge sensor and voltage probe

A MOSFET structure having a biased gate covered with an insulator is described. The insulator is of such a thickness as to render the structure capable of giving a measure of accumulated charge. The structure is also capable of being used in a stacked structure as a particle spectrometer.

Robinson, P. A., Jr.↗

InSb arrays: Astronomy with a 32x32 CCD/development of a 58x62 DRO

Experience gained in operating infrared detector arrays for high sensitivity astronomical applications at the University of Rochester are summarized. Progress made in operating the 32 x 32 InSb array with bump-bonded Silicon CCD readout is described. Astronomical work done with the 32 x 32 camera is also described. Plans for the future, including improvements for the 32 x 32 camera system as well as implementing a new generation of 58 x 62 InSb array using switched-MOSFET direct readout multiplexing system in the place of the older CCD technology is discussed.

Forrest, W. J.↗

Evaluation and characterization of hybrid arrays

An Infrared Camera was built for astronomical observations and for testing arrays for satellite based work. The detectors are sensitive to mid infrared wavelengths. The camera was tested at the University of Arizona 61 and 90 inch telescopes and the NASA IRTF. These tests have demonstrated a sensitivity consistent with photon shot noise with an approximately 10% quantum efficiency for each pixel when the camera was used with a 1.6% spectral filter or when used with a Fabry-Perot having a resolving power of 2000. Initial measurements of read out noise, dark current, cross talk, and hysteresis were made. The detector chip in current use is a hybrid array manufactured by the Hughes Aircraft Company. Because part of the goal was to develop and advance technology, it was decided to work with a switched MOSFET array. This architecture is very promising, and the detector parameters will be quantified carefully.

Arens, J. F.↗

IRAC test report. Gallium doped silicon band 2: Read noise and dark current

A direct readout infrared detector array, a candidate for the Space Infrared Telescope Facility (SIRTF) Infrared Array Camera (IRAC), has been tested. The array has a detector surface of gallium doped silicon, bump bonded to a 58x62 pixel MOSFET multiplexer on a separate chip. Although this chip and system do not meet all the SIRTF requirements, the critically important read noise is within a factor of 3 of the requirement. Significant accomplishments of this study include: (1) development of a low noise correlated double sampling readout system with a readout noise of 127 to 164 electrons (based on the detector integrator capacitance of 0.1 pF); (2) measurement of the readout noise of the detector itself, ranging from 123 to 214 electrons with bias only (best to worst pixel), and 256 to 424 electrons with full clocking in normal operation at 5.4 K where dark current is small. Thirty percent smaller read noises are obtained at a temperature of 15K; (3) measurement of the detector response versus integration time, showing significant nonlinear behavior for large signals, well below the saturation level; and (4) development of a custom computer interface and suitable software for collection, analysis and display of data.

Lamb, Gerald↗

Development of 30 micrometers extrinsic silicon multiplexed infrared deterctor array

Two hybrid infrared (IR) detector arrays of antimony-doped silicon (Si:Sb) were produced and tested to evaluate their potential for use in low-background IR astronomy applications. The format of the arrays is 58 x 62 elements, with 76 micron-square pixels. A random-access, switched metal-oxide semiconductor field effect transistor (MOSFET) silicon multiplexer is used to read out the array elements. Reduced-background tests of signal, noise, and noise equivalent power were conducted over the temperature range 3.2 to 12 K. The arrays were found to have good sensitivity and good uniformity.

Orias, G.↗

The 5-kW arcjet power electronics

The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

Gruber, R. P.↗

Power conditioning for large dc motors for space flight applications

The design and performance of a prototype power-conditioning system for use with large brushless dc motors on NASA space missions are discussed in detail and illustrated with extensive diagrams, drawings, and graphs. The 5-kW 8-phase parallel module evaluated here would be suitable for use in the Space Shuttle Orbiter cargo bay. A current-balancing magnetic assembly with low distributed inductance permits high-speed current switching from a low-voltage bus as well as current balancing between parallel MOSFETs.

Veatch, Martin S.↗

Blocked impurity band hybrid infrared focal plane arrays for astronomy

High-performance infrared hybrid focal plane arrays using 10- x 50-element Si:As blocked-impurity-band (BIB) detectors (cutoff wavelength = 28 microns) and matching switched MOSFET multiplexers have been developed and characterized for space astronomy. Use of impurity-band-conduction technology provides detectors which are nuclear-radiation-hard and free of the many anomalies associated with conventional silicon photoconductive detectors. Emphasis in the present work is on recent advances in detector material quality which have led to significantly improved detector and hybrid characteristics. Results demonstrating increased quantum efficiency (particularly at short-wavelength infrared), obtained by varying the BIB detector properties (infrared active layer thickness and arsenic doping profile), are summarized. Measured read noise and dark current for different temperatures are reported. The hybrid array performance achieved demonstrates that BIB detectors are well suited for use in astronomical instrumentation.

Reynolds, D. B.↗

5-kW arcjet power electronics

The initial design and evaluation of a 5 kW arcjet power electronics breadboard which as been integrated with a modified 1 kW design laboratory arcjet is presented. A single stage, 5 kW full bridge, pulse width modulated (PWM), power converter was developed which was phase shift regulated. The converter used metal oxide semiconductor field effect transistor (MOSFET) power switches and incorporated current mode control and an integral arcjet pulse ignition circuit. The unoptimized power efficiency was 93.5 and 93.9 percent at 5 kW and 50A output at input voltages of 130 and 150V, respectively. Line and load current regulation at 50A output was within one percent. The converter provided up to 6.6 kW to the arcjet with simulated ammonia used as a propellant.

Gruber, R. P.↗

MCT/MOSFET Switch

Metal-oxide/semiconductor-controlled thyristor (MCT) and metal-oxide/semiconductor field-effect transistor (MOSFET) connected in switching circuit to obtain better performance. Offers high utilization of silicon, low forward voltage drop during "on" period of operating cycle, fast turnon and turnoff, and large turnoff safe operating area. Includes ability to operate at high temperatures, high static blocking voltage, and ease of drive.

Rippel, Wally E.↗

Current-Monitoring and -Limiting Circuit For 28-Vdc Supply

Current-monitoring and -limiting circuit protects 28-Vdc power supply against steady overload. Provides some protection against sudden peak currents. Acts as limiter, monitoring amplifier, and delayed-action circuit breaker. Consists of pair of power metal oxide/semiconductor field-effect transistors (MOSFET's).

Rodriguez, G. Ernest↗

Voltage-Boosting Driver For Switching Regulator

Driver circuit assures availability of 10- to 15-V gate-to-source voltage needed to turn on n-channel metal oxide/semiconductor field-effect transistor (MOSFET) acting as switch in switching voltage regulator. Includes voltage-boosting circuit efficiently providing gate voltage 10 to 15 V above supply voltage. Contains no exotic parts and does not require additional power supply. Consists of NAND gate and dual voltage booster operating in conjunction with pulse-width modulator part of regulator.

Trump, Ronald C.↗

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Buehler, M. G.↗

InSb DRO array characteristics

Researchers tested 58 x 62 low-doped InSb diode arrays bonded to MOSFET readouts for their performance potential in a low background space environment. Of primary concern were the quantum efficiency, dark current and read noise. The quantum efficiency (45 percent at 3.3 microns) and dark current (less than 2.4e(-)/s) were found to be adequate for the Space Infrared Telescope Facility (SIRTF) experiments, while the read noise (200 e(-) RMS) was found to be wanting. More subtle concerns, such as image quality, linearity/calibratibility and flat fielding were also investigated. In these respects the arrays appear to be well suited for the high sensitivity, photometric accuracy, and image clarity demanded by the SIRTF experiments.

Forrest, W. J.↗

Laboratory and telescope use of the NICMOS2 128 x 128 HgCdTe array

The second generation of Hubble Space Telescope (HST) instruments will include a near-infrared instrument. This choice has driven the development of near-infrared arrays to larger sizes and lower read noises. Rockwell International has delivered an array for use in the Near Infrared Camera and Multi-Object Spectrometer (NICMOS) instrument; this array has been dubbed NICMOS2. NICMOS2 is a 128x128 array of HgCdTe diodes In-bonded to a switched MOSFET readout. The readout was specifically designed for astronomical use with the HST requirement of low read noise a prime goal. These arrays use detector material which is similar to that used by Rockwell in previous arrays (e.g., HgCdTe produced on a sapphire substrate), but the NICMOS2 devices differ substantially from other 128x128 arrays produced by Rockwell in having a read noise of only 30 electrons when read out using appropriate correlated sampling. NICMOS2 has now been characterized in the laboratory, and it has been used on groundbased telescopes.

Rieke, Marcia J.↗

Future directions for NICMOS arrays

The Near Infrared Camera and Multi-Object Spectrometer (NICMOS) for the Hubble Space Telescope (HST) requires focal plane arrays of 256x256 pixels for both its cameras and its spectrometers. The new arrays, developed by the Rockwell Corporation for NICMOS, have 40 microns pixels of HgCdTe bump bonded to a switched MOSFET readout. Expected read noise and dark current for the arrays at 60 K are 30 e and 1 e/sec. respectively. The basis for these numbers is previous experience with 128x128 arrays.

Thompson, R.↗