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This panel seeks to discuss the current challenges for the efficient execution of irregular applications and to propose directions for the development of next generation systems.
Serialization code generators for C++ have restrictions on the implementation of dynamic arrays and void/function pointers. If the target program is not implemented with these restrictions, de- velopers have to manually change the source code to facilitate se- rialization code generation. Unfortunately, such changes hamper the benefits of code generation, and they are not localized. This pa- per presents the de-/serialization code generator Ser++ that does not restrict the implementation of these pointer types and, hence, eliminates the need to adapt the source code for serialization code generation. Ser++ can be considered an aspect weaver that i) traces the pointers, ii) identifies the statements in which properties regard- ing the serialization of pointer attributes can be extracted and, finally, iii) weaves the code to store these properties at runtime. It generates the de-/serialization functions in such a way that they serialize the pointer attributes according to the stored values of the properties. We have successfully used Ser++ to generate de- /serialization methods for a computer architecture and a power- flow simulator, without any modifications to the existing source code.
Computer architecture experts expect that non-volatile memory (NVM) hierarchies will play a more significant role in future systems including mobile, enterprise, and HPC architectures. With this expectation in mind, we present NVL-C: a novel programming system that facilitates the efficient and correct programming of NVM main memory systems. The NVL-C programming abstraction extends C with a small set of intuitive language features that target NVM main memory, and can be combined directly with traditional C memory model features for DRAM. We have designed these new features to enable compiler analyses and run-time checks that can improve performance and guard against a number of subtle programming errors, which, when left uncorrected, can corrupt NVM-stored data. Moreover, to enable recovery of data across application or system failures, these NVL-C features include a flexible directive for specifying NVM transactions. So that our implementation might be extended to other compiler front ends and languages, the majority of our compiler analyses are implemented in an extended version of LLVM's intermediate representation (LLVM IR). We evaluate NVL-C on a number of applications to show its flexibility, performance, and correctness.
This paper examines whether lossy compression can be used effectively in physics simulations as a possible strategy to combat the expected data-movement bottleneck in future high performance computing architectures. We show that, for the codes and simulations we tested, compression levels of 3–5X can be applied without causing significant changes to important physical quantities. Rather than applying signal processing error metrics, we utilize physics-based metrics appropriate for each code to assess the impact of compression. We evaluate three different simulation codes: a Lagrangian shock-hydrodynamics code, an Eulerian higher-order hydrodynamics turbulence modeling code, and an Eulerian coupled laser-plasma interaction code. We compress relevant quantities after each time-step to approximate the effects of tightly coupled compression and study the compression rates to estimate memory and disk-bandwidth reduction. We find that the error characteristics of compression algorithms must be carefully considered in the context of the underlying physics being modeled.
Recent advancements in technology scaling have shown a trend towards greater integration with large-scale chips containing thousands of processors connected to memories and other I/O devices using non-trivial network topologies. Software simulation proves insufficient to study the tradeoffs in such complex systems due to slow execution time, whereas hardware RTL development is too time-consuming. We present OpenSoC Fabric, an on-chip network generation infrastructure which aims to provide a parameterizable and powerful on-chip network generator for evaluating future high performance computing architectures based on SoC technology. OpenSoC Fabric leverages a new hardware DSL, Chisel, which contains powerful abstractions provided by its base language, Scala, and generates both software (C++) and hardware (Verilog) models from a single code base. The OpenSoC Fabric2 infrastructure is modeled after existing state-of-the-art simulators, offers large and powerful collections of configuration options, and follows object-oriented design and functional programming to make functionality extension as easy as possible.
The Kokkos library implements thread-parallel execution policies and shared-memory multidimensional array data structures that enable applications and domain libraries to develop computational kernels that are performance portable across multicore-CPU and manycore-accelerator (e.g. GPU) computing architectures.
A processor emulator and a suite of benchmark applications have been developed to assist in characterizing the performance of data-centric workloads on current and future computer architectures. Some of the applications have been collected from other open source projects. For more details on the emulator and an example of its usage, see reference [1].
A simulation of a research processor-in-memory class computer architecture running the accumulation function of sparse matrix-matrix multiply.
Many materials, metal alloys in particular, have features on the on micrometer or nanometer scale that have a large impact on the properties of the material. These features are known as the microstructure of the material. Understanding why and how the microstructure forms in a material is of fundamental scientific interest as well as of significant technological interest. The capability to predict microstructure evolution in a material allows the intentional design of microstructures and hence the intentional design of material properties. The phase-field method is one of the leading methods for predicting microstructure evolution. One of the most significant problems for phase-field models is their computational expense. Even limited phase-field simulations can easily require thousands of CPU core-hours to complete, which significantly limits their use. This code provides both a general framework for creating scalable, GPU-accelerated phase-field model applications as well as several applications themselves. The code is capable of using hundreds of GPUs efficiently, which greatly reduces the time required to perform simulations. The code is written with an emphasis on performance portability, that is the ability for the code to run efficiently on a number of different computing architectures without modification of the source code. The performance portability of this code is primarily enabled through the use of two libraries, Kokkos (performance portable data structures and execution patterns) and heFFTe (performance portable distributed 3D fast Fourier transforms). The code consists of a core library, applications, and tests. The core library includes shared functionality between applications. This includes interfaces with fast Fourier transform (FFT) libraries such as heFFTe, data structures based on Kokkos, file input and output capabilities, and a solver for infinitesimal strain mechanical equilibrium problems. Five applications are included in the code. The flagship application is the MEUMAPPS-SS application, which implements the Kim-Kim-Suzuki phase-field model for precipitation for an arbitrary number of phases and components in a metal alloy. Five simpler applications are also included that solve the Eshelby inclusion problem, Allen-Cahn equation, the coupled Allen-Cahn and diffusion equations, and the Cahn-Hilliard equation. The code includes two applications to solve the Cahn-Hilliard equation, one with constant-step-size first-order time integration and the second with adaptive high-order time integration.
The latest release of Genesis supports parallel computer architecture, based on the Message Passing Interface (MPI) protocol.
ParaDiS, or Parallel Dislocation Simulator, is a simulation tool that performs direct numerical simulation of dislocation ensembles, the carriers of plasticity, to predict the strength in crystalline materials from the fundamental physics of defect motion, evolution, and interaction. The code has been successfully deployed on high performance computing architectures and used to study the origins of strength and strain hardening for cubic crystals, the strength of micro-pillars, and irradiated materials at LLNL. The ParaDiS code has been successfully deployed on more than one hundred thousand CPU's with over ten million active degrees of freedom.
SPADES (Solver for PArallel Discrete Event Simulation) is an open-source parallel discrete event simulation (PDES) package built on the AMReX library. Targeted at solving discrete event systems in parallel, this software package aims to be performance portable and scalable on heterogeneous computing architectures, e.g., graphic processing units (GPU). SPADES implements optimistic synchronization with rollback through an implementation of the Time Warp algorithm. An alternative conservative synchronization approach is also implemented using the Lower Bound on Incoming Time Stamp. In our implementation, logical processes are represented as cells in a grid and event messages are represented as particles. SPADES supports various parallel decomposition strategies, including the use of the Message Passing Interface (MPI) and OpenMP threading. All major GPU architectures (e.g., Intel, AMD, NVIDIA) are supported through the use of performance portability functionalities implemented in AMReX. The SPADES software is released in NREL Software Record SWR-24-99 “SPADES (Scalable Parallel Discrete Events Simulation)”.
MGARD is a software providing error-controlled lossy compression and data refactoring based on multi-grid theories. It transforms floating-point scientific data into a multilevel representation, followed by quantization and lossless encoding processes, resulting in a self-describing compressed buffer. It supports diverse data topologies, error control norms, and computing architectures.
Fully-consistent, full-core, 3D, deterministic neutron transport simulations using the orthogonal mesh code Denovo were run on the massively parallel computing architecture Jaguar XT5. Using energy and spatial parallelization schemes, Denovo was able to efficiently scale to more than 160k processors. Cell-homogenized cross sections were used with step-characteristics, linear-discontinuous finite element, and trilinear-discontinuous finite element spatial methods. It was determined that using the finite element methods gave considerably more accurate eigenvalue solutions for large-aspect ratio meshes than using step-characteristics.
Bioinformatics research is frequently performed using complex workflows with multiple steps, fans, merges, and conditionals. This complexity makes management of the workflow difficult on a computer cluster, especially when running in parallel on large batches of data: hundreds or thousands of samples at a time. Scientific workflow management systems could help with that. Many are now being proposed, but is there yet the “best” workflow management system for bioinformatics? Such a system would need to satisfy numerous, sometimes conflicting requirements: from ease of use, to seamless deployment at peta- and exa-scale, and portability to the cloud. We evaluated Swift/T as a candidate for such role by implementing a primary genomic variant calling workflow in the Swift/T language, focusing on workflow management, performance and scalability issues that arise from production-grade big data genomic analyses. In the process we introduced novel features into the language, which are now part of its open repository. Additionally, we formalized a set of design criteria for quality, robust, maintainable workflows that must function at-scale in a production setting, such as a large genomic sequencing facility or a major hospital system. The use of Swift/T conveys two key advantages. (1) It operates transparently in multiple cluster scheduling environments (PBS Torque, SLURM, Cray aprun environment, etc.), thus a single workflow is trivially portable across numerous clusters. (2) The leaf functions of Swift/T permit developers to easily swap executables in and out of the workflow, which makes it easy to maintain and to request resources optimal for each stage of the pipeline. While Swift/T’s data-level parallelism eliminates the need to code parallel analysis of multiple samples, it does make debugging more difficult, as is common for implicitly parallel code. Nonetheless, the language gives users a powerful and portable way to scale up analyses in many computing architectures.