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At least 433 records · Page 24

Transcriptomics of Temporal- versus Substrate-Specific Wood Decay in the Brown-Rot Fungus Fibroporia radiculosa

Brown-rot fungi lack many enzymes associated with complete wood degradation, such as lignin-attacking peroxidases, and have developed alternative mechanisms for rapid wood breakdown. To identify the effects of culture conditions and wood substrates on gene expression, we grew Fibroporia radiculosa in submerged cultures containing Wiley milled wood (5 days) and solid wood wafers (30 days), using aspen, pine, and spruce as a substrate. The comparative analysis revealed that wood species had a limited effect on the transcriptome: <3% of genes were differentially expressed between different wood species substrates. The comparison between gene expression during growth on milled wood and wood wafer conditions, however, indicated that the genes encoding plant cell wall-degrading enzymes, such as glycoside hydrolases and peptidases, were activated during growth on wood wafers, confirming previous reports. On the other hand, it was shown for the first time that the genes encoding Fenton chemistry enzymes, such as hydroquinone biosynthesis enzymes and oxidoreductases, were activated during submerged growth on ground wood. This illustrates the diversity of wood-decay reactions encoded in fungi and activated at different stages of this process.

59 BASIC BIOLOGICAL SCIENCES↗

Erase-mode recording characteristics of photochromic CaF2, SrTiO3, and CaTiO3 crystals.

Erase-mode optical recording characteristics of photochromic crystal wafers of CaF2:La,Na; CaF2:Ce,Na; SrTiO3:Ni,Mo,Al; and CaTiO3:Ni,Mo have been measured. An argon laser operating at 5145 A was used for both optical recording and optical readout. Sensitometric curves of optical-density change versus logarithm of exposure are shown for a number of erase-beam intensities between 0.2 mW/sq cm and 2 W/sq cm. In this range, time-intensity reciprocity holds for the CaF2 materials but fails for the titanates, particularly at low intensities. The dependences of sensitivity, gamma, and maximum transmission contrast ratio on wafer thickness and material are discussed. Wafers of SrTiO3, CaTiO3, and CaF2 exhibiting approximately equal maximum contrast ratios have relative sensitivities approximately in the ratio 5:2:1, respectively, at an erase intensity of 1 W/sq cm.

Duncan, R. C., Jr.↗

Development of a plan for automating integrated circuit processing

The operations analysis and equipment evaluations pertinent to the design of an automated production facility capable of manufacturing beam-lead CMOS integrated circuits are reported. The overall plan shows approximate cost of major equipment, production rate and performance capability, flexibility, and special maintenance requirements. Direct computer control is compared with supervisory-mode operations. The plan is limited to wafer processing operations from the starting wafer to the finished beam-lead die after separation etching. The work already accomplished in implementing various automation schemes, and the type of equipment which can be found for instant automation are described. The plan is general, so that small shops or large production units can perhaps benefit. Examples of major types of automated processing machines are shown to illustrate the general concepts of automated wafer processing.

Source record↗

Slicing of silicon into sheet material: Silicon sheet growth development for the large area silicon sheet task of the low cost silicon solar array project

Multiblade slurry sawing is used to slice 10 cm diameter silicon ingots into wafers 0.024 cm thick using 0.050 cm of silicon per slice (0.026 cm kerf loss). Total slicing time is less than twenty hours, and 143 slices are produced simultaneously. Productivity (slice area per hour per blade) is shown as a function or blade load and thickness, and abrasive size. Finer abrasive slurries cause a reduction in slice productivity, and thin blades cause a reduction of wafer accuracy. Sawing induced surface damage is found to extend 18 microns into the wafer.

Holden, S. C.↗

X-ray topography as a process control tool in semiconductor and microcircuit manufacture

A bent wafer camera, designed to identify crystal lattice defects in semiconductor materials, was investigated. The camera makes use of conventional X-ray topographs and an innovative slightly bent wafer which allows rays from the point source to strike all portions of the wafer simultaneously. In addition to being utilized in solving production process control problems, this camera design substantially reduces the cost per topograph.

Parker, D. L.↗

Array automated assembly, phase 2

An analysis was made of cost tradeoffs for shaping modified square wafers from cylindrical crystals. Tests were conducted of the effectiveness of texture etching for removal of surface damage on sawed wafers. A single step texturing etch appeared adequate for removal of surface damage on wafers cut with multiple blade reciprocating slurry saws.

Taylor, W. E.↗

Preliminary evaluation of Glass Resin materials for solar cell cover use

The glass resins were deposited by several techniques on 200 micron thick cells and on 50 microns thick wafers. The covered cells were exposed to ultraviolet light in vacuum to an intensity of 10 UV energy-equivalent solar constants at air mass zero for 728 hr. The exposure was followed by a single long thermal cycle from ambient temperature to -150 C. Visual inspection of the samples indicated that all samples had darkened to varying degrees. The loss in short-circuit current was found to range from 8 to 24%, depending on the resin formulation. In another test over 40 glass resin-coated silicon wafers withstood 15 thermal cycles from 100 to-196 C in one or more of the thicknesses tested. Several of the resin-coated wafers were tested at 65 C and 90% relative humidity for 170 hr. No change in physical appearance was detected.

Marsik, S. J.↗

The Establishment of a Production-ready Manufacturing Process Utilizing Thin Silicon Substrates for Solar Cells

During the months of February and March, work towards the goals of the contract were started as scheduled. The first shipment of thin substrates were received and wafer processing was initiated. The objective of the contract is to investigate, develop and characterize the methods for establishing a production-ready manufacturing process which utilizes thin silicon substrates for solar cells. The thin substrates to be manufactured are three inches diameter, p-type Czochralski wafers of approximately 1 Omega cm resistivity. The wafers are prepared by sawing directly to thickness of 8 mils and 5 mils. To ensure removal of residual saw damage, most substrates are chemically etched to final thicknesses of 7 mils and 4 mils. The thin substrates are used to fabricate solar cells by standard processing techniques.

Pryor, R. A.↗

The effects of copper and titanium on silicon solar cells

Copper-doped N/P silicon solar cells fabricated from the Czochralski grown single-crystal wafers were found to have good electrical characteristics, but the titanium-doped N/P silicon solar cells has considerably lower conversion efficiency. However, in the copper/titanium-doped solar cells, copper seems to mitigate the unfavorable effects of titanium. To explain this behavior, microstructural tests were performed on silicon wafers and solar cells doped with copper, titanium and copper/titanium. Dark forward and reverse I-V measurements were performed on the solar cells to correlate the microstructural defects with the p-n junction properties. It was found that copper precipitates were formed in the copper-doped and copper/titanium-doped wafers and cells. There was a significant voltage drop in the dark reverse I-V measurements of the titanium solar cells. Also, there were some electronically active defects in the depletion region of some titanium-doped cells. Reasons that lead to the above results are given in detail.

Salama, A. M.↗

Multijunction high-voltage solar cell

Multijunction cell allows for fabrication of high-voltage solar cell on single semiconductor wafer. Photovoltaic energy source using cell is combined on wafer with circuit it is to power. Cell consists of many voltage-generating regions internally or externally interconnected to give desired voltage and current combination. For computer applications, module is built on silicon wafer with energy for internal information processing and readouts derived from external light source.

Evans, J. C., Jr.↗

Slicing of Silicon into Sheet Material. Silicon Sheet Growth Development for the Large Area Silicon Sheet Task of the Low Cost Solar Array Project

The use of multiblade slurry sawing to produce silicon wafers from ingots was investigated. The commercially available state of the art process was improved by 20% in terms of area of silicon wafers produced from an ingot. The process was improved 34% on an experimental basis. Economic analyses presented show that further improvements are necessary to approach the desired wafer costs, mostly reduction in expendable materials costs. Tests which indicate that such reduction is possible are included, although demonstration of such reduction was not completed. A new, large capacity saw was designed and tested. Performance comparable with current equipment (in terms of number of wafers/cm) was demonstrated.

Fleming, J. R.↗

The random walk of a drilling laser beam

The disregistry of holes drilled with a pulse laser beam in 330-micron-thick single-crystal silicon-on-sapphire wafers is examined. The exit positions of the holes were displaced from the hole entrance positions on the opposing face of the wafer, and this random displacement increased with the number of laser pulses required. A model in which the bottom of the drill hole experiences small random displacements during each laser pulse is used to describe the experimental observations. It is shown that the average random displacement caused by each pulse is only a few percent of the hole diameter and can be reduced by using as few laser pulses as necessary while avoiding the cracking and spalling of the wafer that occur with a hole drilled with a single pulse.

Anthony, T. R.↗

Empirical study of the interaction of silicon substrate thinness, device design, and solar cell processing

Processing experiments using wire-saw techniques to slice thin silicon wafers are described. Substrates were sliced directly to 17 mil, 8 mil, and 5 mil thicknesses. Some of the 8 mil substrates and all of the 5 mil substrates were chemically etched to 7 and 4 mils, respectively, to guarantee removal of any saw damage. The wafers wire sawed to 17 mil thicknesses were processed as reference cells. A baseline process which results in an n(+)-p cell structure, and two advanced processes which provide n(+)-p-p(+) structures were utilized. By using a p(+) enhancement layer on the solar cell back surface, the performance of the 7 mil wafers was increased to exceed that of the 17 mil solar cells with simple n(+)-p structures. Cells fabricated by an ion implantation sequence utilizing elemental boron and phosphorus implants were shown to be capable of equalling or exceeding the performance of cells fabricated by an equivalent all-diffusion process.

Pryor, R. A.↗

High-Production Silicon-Ingot Slicer

New concept for slicing silicon ingots into wafers promises to increase production rates and improve yields of good wafers, thereby reducing cost of manufacturing silicon solar cells. In proposed wafer slicer, stack of ganged blades cuts group of silicon ingots simultaneously. Blades cut horizontally while ingots rotate about their vertical axes.

Kuo, Y. S.↗

Development and fabrication of a solar cell junction processing system

Modifications to the ground plane, to insure a good electrical return path during the pulse discharge, were made using a ring of beryllium copper finger stock attached to the underside of the aluminum ground plate. Experiments on annealing of wafers with ion implantation damage continued. The entire surface of 100 mm diameter wafers were annealed by one pulse for the standard implant (10 keV, phosphorus, 2x10 to the 15th power ions/sq cm). While samples are being fabricated into solar cells for electrical characterization, work is continuing on improvement of the electron beam uniformity and the optimization of the diode parameters. The engineering design was completed and the manufacturing detail drawings were released for fabrication. Assembly of the subcomponents for the exit and entrance locks is almost complete. These components include the cassettes, the indexing mechanisms, main doors, and wafer carrier transfer modules. The 'Y' track and three phase transition track sections are under final assembly and test.

Giesling, R.↗

Corrosion inhibitors for water-base slurry in multiblade sawing

The use of a water-base slurry instead of the standard PC oil vehicle was proposed for multiblade sawing (MBS) silicon wafering technology. Potential cost savings were considerable; however, significant failures of high-carbon steel blades were observed in limited tests using a water-based slurry during silicon wafering. Failures were attributed to stress corrosion. A specially designed fatigue test of 1095 steel blades in distilled water with various corrosion inhibitor solutions was used to determine the feasibility of using corrosion inhibitors in water-base MBS wafering. Fatigue tests indicate that several corrosion inhibitors have significant potential for use in a water-base MBS operation. Blade samples tested in these specific corrosion-inhibitor solutions exhibited considerably greater lifetime than those blades tested in PC oil.

Chen, C. P.↗

Evaluation and verification of epitaxial process sequence for silicon solar-cell production

To achieve the program goals, 28 minimodules were fabricated and tested, using 600 cells made from three-inch-diameter wafers processed by the sequence chosen for this purpose. Of these 600 cells, half were made from epitaxially grown layers on potentially low-cost substrates. The other half were made from commercial semiconductor-grade (SG), single-crystal silicon wafers that served as controls. Cell processing was normally performed on mixed lots containing significant numbers of each of these two types of wafers. After evaluation of the performance of all cells, they were separated by types for incorporation into modules that were to be tested for electrical performance and response to environmental stress. A simplified flow chart displaying this scheme, for quantities representing half of the planned total to be processed, is presented.

Redfield, D.↗

Method of making a high voltage V-groove solar cell

A method is provided for making a high voltage multijunction solar cell. The cell comprises a plurality of discrete voltage generating regions, or unit cells, which are formed in a single semiconductor wafer and are connected together so that the voltages of the individual cells are additive. The unit cells comprise doped regions of opposite conductivity types separated by a gap. The method includes forming V-shaped grooves in the wafer and thereafter orienting the wafer so that ions of one conductivity type can be implanted in one face of the groove while the other face is shielded. A metallization layer is applied and selectively etched away to provide connections between the unit cells.

Evans, J. C., Jr.↗