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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24
All sourcesNASA NTRSDOE OSTI
NASA NTRS1997

An Adaptive Flow Solver for Air-Borne Vehicles Undergoing Time-Dependent Motions/Deformations

This report describes a concurrent Euler flow solver for flows around complex 3-D bodies. The solver is based on a cell-centered finite volume methodology on 3-D unstructured tetrahedral grids. In this algorithm, spatial discretization for the inviscid convective term is accomplished using an upwind scheme. A localized reconstruction is done for flow variables which is second order accurate. Evolution in time is accomplished using an explicit three-stage Runge-Kutta method which has second order temporal accuracy. This is adapted for concurrent execution using another proven methodology based on concurrent graph abstraction. This solver operates on heterogeneous network architectures. These architectures may include a broad variety of UNIX workstations and PCs running Windows NT, symmetric multiprocessors and distributed-memory multi-computers. The unstructured grid is generated using commercial grid generation tools. The grid is automatically partitioned using a concurrent algorithm based on heat diffusion. This results in memory requirements that are inversely proportional to the number of processors. The solver uses automatic granularity control and resource management techniques both to balance load and communication requirements, and deal with differing memory constraints. These ideas are again based on heat diffusion. Results are subsequently combined for visualization and analysis using commercial CFD tools. Flow simulation results are demonstrated for a constant section wing at subsonic, transonic, and a supersonic case. These results are compared with experimental data and numerical results of other researchers. Performance results are under way for a variety of network topologies.

Singh, Jatinder↗
NASA NTRS1997

Real-Time Sensor Validation System Developed for Reusable Launch Vehicle Testbed

A real-time system for validating sensor health has been developed for the reusable launch vehicle (RLV) program. This system, which is part of the propulsion checkout and control system (PCCS), was designed for use in an integrated propulsion technology demonstrator testbed built by Rockwell International and located at the NASA Marshall Space Flight Center. Work on the sensor health validation system, a result of an industry-NASA partnership, was completed at the NASA Lewis Research Center, then delivered to Marshall for integration and testing. The sensor validation software performs three basic functions: it identifies failed sensors, it provides reconstructed signals for failed sensors, and it identifies off-nominal system transient behavior that cannot be attributed to a failed sensor. The code is initiated by host software before the start of a propulsion system test, and it is called by the host program every control cycle. The output is posted to global memory for use by other PCCS modules. Output includes a list indicating the status of each sensor (i.e., failed, healthy, or reconstructed) and a list of features that are not due to a sensor failure. If a sensor failure is found, the system modifies that sensor's data array by substituting a reconstructed signal, when possible, for use by other PCCS modules.

Jankovsky, Amy L.↗
NASA NTRS1995

The NEAT Camera Project

The NEAT (Near Earth Asteroid Tracking) camera system consists of a camera head with a 6.3 cm square 4096 x 4096 pixel CCD, fast electronics, and a Sun Sparc 20 data and control computer with dual CPUs, 256 Mbytes of memory, and 36 Gbytes of hard disk. The system was designed for optimum use with an Air Force GEODSS (Ground-based Electro-Optical Deep Space Surveillance) telescope. The GEODSS telescopes have 1 m f/2.15 objectives of the Ritchey-Chretian type, designed originally for satellite tracking. Installation of NEAT began July 25 at the Air Force Facility on Haleakala, a 3000 m peak on Maui in Hawaii.

NEAT Camera↗
NASA NTRS2007

The Naturalistic Flight Deck System: An Integrated System Concept for Improved Single-Pilot Operations

This paper reviews current and emerging operational experiences, technologies, and human-machine interaction theories to develop an integrated flight system concept designed to increase the safety, reliability, and performance of single-pilot operations in an increasingly accommodating but stringent national airspace system. This concept, know as the Naturalistic Flight Deck (NFD), uses a form of human-centered automation known as complementary-automation (or complemation) to structure the relationship between the human operator and the aircraft as independent, collaborative agents having complimentary capabilities. The human provides commonsense knowledge, general intelligence, and creative thinking, while the machine contributes specialized intelligence and control, extreme vigilance, resistance to fatigue, and encyclopedic memory. To support the development of the NFD, an initial Concept of Operations has been created and selected normal and non-normal scenarios are presented in this document.

Schutte, Paul C.↗
NASA NTRS2010

Flexible Peripheral Component Interconnect Input/Output Card

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Bigelow, Kirk K.↗
NASA NTRS2014

Method and System for Controlling a Dexterous Robot Execution Sequence Using State Classification

A robotic system includes a dexterous robot and a controller. The robot includes a plurality of robotic joints, actuators for moving the joints, and sensors for measuring a characteristic of the joints, and for transmitting the characteristics as sensor signals. The controller receives the sensor signals, and is configured for executing instructions from memory, classifying the sensor signals into distinct classes via the state classification module, monitoring a system state of the robot using the classes, and controlling the robot in the execution of alternative work tasks based on the system state. A method for controlling the robot in the above system includes receiving the signals via the controller, classifying the signals using the state classification module, monitoring the present system state of the robot using the classes, and controlling the robot in the execution of alternative work tasks based on the present system state.

Sanders, Adam M.↗
DOE OSTI2020

Evaluating turbulence models at high energy densities

The RESHOCK campaign at Lawrence Livermore National Laboratory has been working on increasing our understanding of the evolution of turbulent, unstable plasma interfaces which are applicable in various HED applications including ICF implosions. A common approach to model such interfaces involves the use of Renolds-Averaged-Navier-Stokes (RANS) models whose parameters have been constrained by theory and experiments. These parameter sets are not unique and the applicability of one set of tuned model parameters to systems with differing shock strengths or material densities has not been well tested. Our new NIF experiments, along with related studies of turbulent shear flows, provide data and model validation for plasma interfaces in the HED regime. Our experiments measure mixing-layer width at an unstable interface in the plasma regime and are specifically designed to challenge mix models of the Reynolds-Averaged-Navier-Stokes (RANS) type where turbulence is assumed to be fully developed, i.e. the flow exhibits a broad spectrum of length scales without memory of the initial condition.4 We utilize precise control of the initial interface conditions (densities on both sides of the interface, an initial rippled perturbation pattern consisting of equally weighted wavelengths between 10 and 20 microns, and initial material compositions) along with a repeatable drive history

36 MATERIALS SCIENCE↗
NASA NTRS1991

An enhanced Ada run-time system for real-time embedded processors

An enhanced Ada run-time system has been developed to support real-time embedded processor applications. The primary focus of this development effort has been on the tasking system and the memory management facilities of the run-time system. The tasking system has been extended to support efficient and precise periodic task execution as required for control applications. Event-driven task execution providing a means of task-asynchronous control and communication among Ada tasks is supported in this system. Inter-task control is even provided among tasks distributed on separate physical processors. The memory management system has been enhanced to provide object allocation and protected access support for memory shared between disjoint processors, each of which is executing a distinct Ada program.

Sims, J. T.↗
NASA NTRS1985

Man-machine interface and control of the shuttle digital flight system

The space shuttle main engine (SSME) presented new requirements in the design of controls for large pump fed liquid rocket engine systems. These requirements were the need for built in full mission support capability, and complexity and flexibility of function not previously needed in this type of application. An engine mounted programmable digital control system was developed to meet these requirements. The engine system and controller and their function are described. Design challenges encountered during the course of development included accommodation for a very severe engine environment, the implementation of redundancy and redundancy management to provide fail operational/fail safe capability, removal of heat from the package, and significant constraints on computer memory size and processing time. The flexibility offered by programmable control reshaped the approach to engine design and development and set the pattern for future controls development in these types of applications.

Burghduff, R. D.↗
NASA NTRS1984

Utilization of Historic Information in an Optimisation Task

One of the basic components of a discrete model of motor behavior and decision making, which describes tracking and supervisory control in unitary terms, is assumed to be a filtering mechanism which is tied to the representational principles of human memory for time-series information. In a series of experiments subjects used the time-series information with certain significant limitations: there is a range-effect; asymmetric distributions seem to be recognized, but it does not seem to be possible to optimize performance based on skewed distributions. Thus there is a transformation of the displayed data between the perceptual system and representation in memory involving a loss of information. This rules out a number of representational principles for time-series information in memory and fits very well into the framework of a comprehensive discrete model for control of complex systems, modelling continuous control (tracking), discrete responses, supervisory behavior and learning.

Boesser, T.↗
DOE OSTI2025

Interlayer Exciton Polarons in Mesoscopic V 2 O 5 for Broadband Optoelectronic Synapses

Persistent photoconductivity and optoelectronic synaptic behavior are demonstrated in solution-processed mesoscopic α-phase vanadium pentoxide (V 2 O 5 ) thin films. First-principles simulations coupled with the two-site Holstein polaron hopping model show that vacancies at the terminal oxygen position lead to long recombination times because photoexcited electrons and holes reside on different layers separated by the van der Waals gap, forming a weakly coupled interlayer exciton polaron. Mid-gap polaronic states also significantly broaden the photoresponse of the films to span across visible and infrared wavelengths. By controlling the amplitude/intensity, duration, and/or number of optical pulses, tunable optoelectronic memory functions, such as short-term and long-term plasticity, are experimentally established in V 2 O 5 -based optoelectronic synapses. Furthermore, device fabrication was extended to mechanically flexible ultrathin glass substrates. Flexible optoelectronic synapses maintained high performance after 150 bending cycles.

Phan, Thanh Luan [National Renewable Energy Labora↗
DOE OSTI2024

Nonvolatile memory cells from hafnium zirconium oxide ferroelectric tunnel junctions using Nb and NbN electrodes

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have attracted interest as non-volatile memory for microelectronics due to ease of integration into back-end-of-line (BEOL) complementary metal oxide semiconductor fabrication. This work examines asymmetric electrode NbN/HZO/Nb devices with 7 nm thick HZO as FTJs in a memory structure, with an output resistance that can be controlled by read and write voltages. The individual FTJs are measured to have a tunneling electroresistance of 10 during the read state without significant filament conduction formation and reasonable ferroelectric performance. Endurance and remanent polarizations of up to 10 5 cycles and 20 μC/cm 2 , respectively, are measured and are shown to be dependent on the cycling voltage. Electrical measurements demonstrate how magnitude of the write pulse can modulate the high state resistance and the read pulse influences both resistance values as well as separation of resistance states. Then, by using two opposite switching FTJ devices in series, a programmable nonvolatile resistor divider is demonstrated. Measurements of these two FTJ unit memory cells show wide applicability to a BEOL microfabrication process for a re-readable, rewritable, and nonvolatile memory cell.

42 ENGINEERING↗
NASA NTRS2013

Assessing the Performance Limits of Internal Coronagraphs Through End-to-End Modeling

As part of the NASA ROSES Technology Demonstrations for Exoplanet Missions (TDEM) program, we conducted a numerical modeling study of three internal coronagraphs (PIAA, vector vortex, hybrid bandlimited) to understand their behaviors in realistically-aberrated systems with wavefront control (deformable mirrors). This investigation consisted of two milestones: (1) develop wavefront propagation codes appropriate for each coronagraph that are accurate to 1% or better (compared to a reference algorithm) but are also time and memory efficient, and (2) use these codes to determine the wavefront control limits of each architecture. We discuss here how the milestones were met and identify some of the behaviors particular to each coronagraph. The codes developed in this study are being made available for community use. We discuss here results for the HBLC and VVC systems, with PIAA having been discussed in a previous proceeding.

Inner working angle (IWA)↗
NASA NTRS1982

Improved Parallel-Access Alinement Network

Network channels elements of data array from memory ports to processor ports using a hardware-generated binary control work. Depending on control work selected, data may be shifted in increments or transposed in each of three levels to reach appropriate processing ports. A similar arrangement with reversed wiring is used to return data from processing ports to respective memory modules. Selection gate used in network incorporates two AND gates feeding an OR gate. In some logic families the OR gate may be fabricated as a "wired OR".

Barnes, G. H.↗
NASA NTRS1986

Experimental Parallel-Processing Computer

Master processor supervises slave processors, each with its own memory. Computer with parallel processing serves as inexpensive tool for experimentation with parallel mathematical algorithms. Speed enhancement obtained depends on both nature of problem and structure of algorithm used. In parallel-processing architecture, "bank select" and control signals determine which one, if any, of N slave processor memories accessible to master processor at any given moment. When so selected, slave memory operates as part of master computer memory. When not selected, slave memory operates independently of main memory. Slave processors communicate with each other via input/output bus.

Mcgregor, J. W.↗
DOE OSTI2026

Memory-efficient nonsmooth dynamic optimization using adaptive randomized compression

Dynamic optimization problems arise in many applications including flow control, full waveform inversion, and medical imaging. These problems are plagued by significant computational challenges. One such challenge — and the focus of this work — is the memory limitation induced by the size of the underlying dynamical system. In particular, the entire dynamic trajectory is required for derivative computation and therefore must be stored or recomputed using, e.g., checkpointing. Although recent work demonstrated the use of adaptive randomized sketching to overcome the memory challenge, that work only applies to smooth unconstrained problems, prohibiting its use for nonsmooth regularized and constrained problems. The inclusion of nonsmooth regularizers and constraints is critical as they often arise in an attempt to preserve certain physical properties or to promote sparsity. To solve these problems, we introduce a trust-region algorithm for minimizing the sum of a smooth nonconvex function and a nonsmooth convex function that leverages randomized sketching to compress the dynamical system trajectories and adaptively adjust the sketch rank to satisfy a gradient inexactness condition. We prove convergence of this algorithm and demonstrate that it achieves substantial memory reduction on three discretized PDE-constrained optimization applications.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1991

Performance of a disk array prototype

A prototype disk array's component-performance limits are examined using SCSI bus traces, Sprite operating system traces, and user programs. The array performs successfully for a workload of small, random I/O operations, achieving 275 I/Os per second on 14 disks before the Sun4/280 host becomes CPU-limited. The prototype is less successful in delivering high throughput for large, sequential operations. Memory system contention on the Sun4/280 host limits throughput to 2.3 MBytes/sec under the Sprite Operating System. Throughput is also limited by the bandwidth supported by the VME backplane, disk controller and disks, and overheads associated with the SCSI protocol. We conclude that merely using a powerful host CPU and many disks will not provide the full bandwidth possible from disk arrays. Host memory bandwidth and throughput of disk controllers are equally important. In addition, operating systems should avoid unnecessary copy and cache flush operations that can saturate the host memory system.

Chervenak, Ann L.↗
DOE OSTI2023

A Hybrid Optimization and Deep Learning Algorithm for Cyber-Resilient DER Control

With the proliferation of distributed energy resources (DERs) in the distribution grid, it is a challenge to effectively control a large number of DERs resilient to the communication and security disruptions, as well as to provide the online grid services, such as voltage regulation and virtual power plant (VPP) dispatch. To this end, a hybrid feedback-based optimization algorithm along with deep learning forecasting technique is proposed to specifically address the cyber-related issues. The online decentralized feedback-based DER optimization control requires timely, accurate voltage measurement from the grid. However, in practice such information may not be received by the control center or even be corrupted. Therefore, the long short-term memory (LSTM) deep learning algorithm is employed to forecast delayed/missed/attacked messages with high accuracy. The IEEE 37-node feeder with high penetration of PV systems is used to validate the efficiency of the proposed hybrid algorithm. The results show that 1) the LSTM-forecasted lost voltage can effectively improve the performance of the DER control algorithm in the practical cyber-physical architecture; and 2) the LSTM forecasting strategy outperforms other strategies of using previous message and skipping dual parameter update.

cyber-resilient algorithm↗