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NASA NTRS1979

Standard Transistor Array (STAR). Volume 1: Placement technique

A large scale integration (LSI) technology, the standard transistor array uses a prefabricated understructure of transistors and a comprehensive library of digital logic cells to allow efficient fabrication of semicustom digital LSI circuits. The cell placement technique for this technology involves formation of a one dimensional cell layout and "folding" of the one dimensional placement onto the chip. It was found that, by use of various folding methods, high quality chip layouts can be achieved. Methods developed to measure of the "goodness" of the generated placements include efficient means for estimating channel usage requirements and for via counting. The placement and rating techniques were incorporated into a placement program (CAPSTAR). By means of repetitive use of the folding methods and simple placement improvement strategies, this program provides near optimum placements in a reasonable amount of time. The program was tested on several typical LSI circuits to provide performance comparisons both with respect to input parameters and with respect to the performance of other placement techniques. The results of this testing indicate that near optimum placements can be achieved by use of the procedures incurring severe time penalties.

Cox, G. W.↗

NASA NTRS1986

Clay-mineraloid weathering products in Antarctic meteorites

The production of clay mineraloids (CMs) in the weathering of stony meteorites recovered in the Allan Hills and Elephant Moraine areas of Antarctica is investigated, applying electron microbeam analysis, pyrolysis/mass spectroscopy, X-ray diffractometry, and differential scanning calorimetry to whole-rock chips from two eucrites, two diogenites, and an H5 chondrite. The data are presented in tables, graphs, and photomicrographs and characterized in detail. Massive to incipient-vermicular CM formations with smectitelike or micalike compositions and indications of poor crystallization are observed and attributed to hydrocryogenic diagenesis (with little or no liquid water) on time scales of 10-1000 kyr. The need to take the compositional effects of weathering into account before attempting to reconstruct the preterrestrial histories of meteorites is stressed.

Gooding, James L.↗

NASA NTRS2016

Design and Performance of A High Resolution Micro-Spec: An Integrated Sub-Millimeter Spectrometer

Micro-Spec is a compact sub-millimeter (approximately 100 GHz--1:1 THz) spectrometer which uses low loss superconducting microstrip transmission lines and a single-crystal silicon dielectric to integrate all of the components of a diffraction grating spectrometer onto a single chip. We have already successfully evaluated the performance of a prototype Micro-Spec, with spectral resolving power, R=64. Here we present our progress towards developing a higher resolution Micro-Spec, which would enable the first science returns in a balloon flight version of this instrument. We describe modifications to the design in scaling from a R=64 to a R=256 instrument, as well as the ultimate performance limits and design concerns when scaling this instrument to higher resolutions.

spectrometer↗

DOE OSTI2025

First demonstration of a TES based cryogenic Li 2 MoO 4 detector for neutrinoless double beta decay search

Cryogenic calorimetric experiments to search for neutrinoless double-beta decay (0vββ) are highly competitive, scalable and versatile in isotope. The largest planned detector array, CUPID, is comprised of about 1500 individual Li 2 100 MoO 4 detector modules with a further scale up envisioned for a follow up experiment (CUPID-1T). In this article, we present a novel detector concept targeting this second stage with a low impedance TES based readout for the Li 2 MoO 4 absorber that is easily mass-produced and lends itself to a multiplexed readout. We present the detector design and results from a first prototype detector operated at the NEXUS shallow underground facility at Fermilab. The detector is a 2-cm-side cube with 21 g mass that is strongly thermally coupled to its readout chip to allow rise-times of ~0.5 ms. This design is more than one order of magnitude faster than present NTD based detectors and is hence expected to effectively mitigate backgrounds generated through the pile-up of two independent two neutrino decay events coinciding close in time. Together with a baseline resolution of 1.95 keV (FWHM) these performance parameters extrapolate to a background index from pile-up as low as 5 • 10 –6 counts/keV/kg/yr in CUPID size crystals. The detector was calibrated up to the MeV region showing sufficient dynamic range for 0vββ searches. In combination with a SuperCDMS HVeV detector this setup also allowed us to perform a precision measurement of the scintillation time constants of Li 2 MoO 4 , which showed a primary component with a fast O(20 μs) time scale. Similar content being viewe

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2024

Hierarchical Phased-Array Antennas Coupled to Al KIDs: A Scalable Architecture for Multi-band Millimeter/Submillimeter Focal Planes

We present the optical characterization of two-scale hierarchical phased-array antenna kinetic inductance detectors (KIDs) for millimeter/submillimeter wavelengths. Our KIDs have a lumped-element architecture with parallel plate capacitors and aluminum inductors. The incoming light is received with a hierarchical phased array of slot dipole antennas, split into 4 frequency bands (between 125 GHz and 365 GHz) with on-chip lumped-element band-pass filters, and routed to different KIDs using microstriplines. Individual pixels detect light for the 3 higher-frequency bands (190–365 GHz), and the signals from four individual pixels are coherently summed to create a larger pixel detecting light for the lowest frequency band (125–175 GHz). The spectral response of the band-pass filters was measured using Fourier transform spectroscopy (FTS), the far-field beam pattern of the phased-array antennas was obtained using an infrared source mounted on a 2-axis translating stage, and the optical efficiency of the KIDs was characterized by observing loads at 294 K and 77 K. We report on the results of these three measurements.

47 OTHER INSTRUMENTATION↗

DOE OSTI2022

Microelectronics at the Department of Energy: Capabilities and Opportunities for Driving U.S. Competitiveness

Microelectronics are everywhere—embedded in our consumer products; underlying our power, transportation, and information infrastructure; and fortifying our national security. These and other microelectronics applications are also intricately linked with America’s energy and decarbonization goals. For instance, advanced power electronics are critical to our transition to renewable power and electric transport, and more energy-efficient computing and consumer devices are needed as energy consumption grows rapidly. Meanwhile, global supply chain disruptions beginning in 2020 and the ensuing chip shortage caused by the COVID-19 pandemic highlight the vulnerability of microelectronics supply chains. The globally distributed manufacturing base can be disrupted in unexpected ways, and there is no single solution to these challenges given the range of applications and technologies within the microelectronics industry—from ever-smaller, nanoscale feature sizes to large-scale commodity use cases to specialized functionalities. Rather, solutions will require the private sector, federal agencies, and research and development (R&D) organizations such as labs and universities to act in concert beyond their individual missions.

36 MATERIALS SCIENCE↗

DOE OSTI2021

Toward Performance Portable Programming for Heterogeneous System-on-Chips: Case Study with Qualcomm Snapdragon SoC

Future heterogeneous Domain-Specific System-on-Chips (DSSoC) will be extraordinarily complex in terms of processors, memory hierarchies, and interconnection networks.To manage this complexity, architects, system software designers, and application developers need programming technologies that are flexible, accurate, efficient, and productive. These technologies will need to be as independent of any one specific architecture as is practical, because the sheer dimensionality and scale of the complexity will not allow porting and optimizing applications foreach given DSSoC. To address these issues, we are developing Cosmic Castle, a performance portable programming toolchain for streaming applications on heterogeneous architectures. The primary focus of Cosmic Castle is on enabling efficient and performant code generation through the smart compiler and intelligent runtime system. This paper presents the preliminary evaluation of our ongoing work toward Cosmic Castle. Specifically, we detail our code porting efforts and evaluate various benchmarks on the Qualcomm Snapdragon SoC using tools developed through Cosmic Castle.

Cabrera, Anthony↗

NASA NTRS2004

Fabrication of a novel gigabit/second free-space optical interconnect - photodetector characterization and testing and system development

The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.

Savich, Gregory R.↗

NASA NTRS1993

Coordinated field study for CaPE: Analysis of energy and water budgets

The objectives of this hydrologic cycle study are to understand and model (1) surface energy and land-atmosphere water transfer processes, and (2) interactions between convective storms and surface energy fluxes. A surface energy budget measurement campaign was carried out by an interdisciplinary science team during the period July 8 - August 19, 1991 as part of the Convection and Precipitation/Electrification Experiment (CaPE) in the vicinity of Cape Canaveral, FL. Among the research themes associated with CaPE is the remote estimation of rainfall. Thus, in addition to surface radiation and energy budget measurements, surface mesonet, special radiosonde, precipitation, high-resolution satellite (SPOT) data, geosynchronous (GOES) and polar orbiting (DMSP SSM/I, OLS; NOAA AVHRR) satellite data, and high altitude airplane data (AMPR, MAMS, HIS) were collected. Initial quality control of the seven surface flux station data sets has begun. Ancillary data sets are being collected and assembled for analysis. Browsing of GOES and radar data has begun to classify days as disturbed/undisturbed to identify the larger scale forcing of the pre-convective environment, convection storms and precipitation. The science analysis plan has been finalized and tasks assigned to various investigators.

Goodman, Steven J.↗

NASA NTRS2018

A First Look at 22 nm FDSOI SRAM Single-Event Test Results

We will present the first ever single-event effects testing results on a 22 nm fully-depleted silicon-on-insulator test chip. The 128 MB SRAMs were irradiated with heavy ions and the results are compared to previous technology generations.

Silicon-on-insulator↗

NASA NTRS2018

Yearlong 500 °C Operational Demonstration of Up-Scaled 4H-SiC JFET Integrated Circuits

This work describes recent progress in the design, processing, upscaling, and testing of 500°C durable two-level interconnect 4H-SiC JFET IC technology undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for 1 year (8760 hours) at 500°C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500°C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016.

Neudeck, Philip G.↗

NASA NTRS1996

Field Geology/Processes

The field geology/process group examined the basic operations of a terrestrial field geologist and the manner in which these operations could be transferred to a planetary lander. Four basic requirements for robotic field geology were determined: geologic content; surface vision; mobility; and manipulation. Geologic content requires a combination of orbital and descent imaging. Surface vision requirements include range, resolution, stereo, and multispectral imaging. The minimum mobility for useful field geology depends on the scale of orbital imagery. Manipulation requirements include exposing unweathered surfaces, screening samples, and bringing samples in contact with analytical instruments. To support these requirements, several advanced capabilities for future development are recommended. Capabilities include near-infrared reflectance spectroscopy, hyper-spectral imaging, multispectral microscopy, artificial intelligence in support of imaging, x ray diffraction, x ray fluorescence, and rock chipping.

Allen, Carlton↗

DOE OSTI2024

Giant energy storage and power density negative capacitance superlattices

Dielectric electrostatic capacitors, because of their ultrafast charge-discharge, are desirable for high-power energy storage applications. Along with ultrafast operation, on-chip integration can enable miniaturized energy storage devices for emerging autonomous microelectronics and microsystems. Moreover, state-of-the-art miniaturized electrochemical energy storage systems-microsupercapacitors and microbatteries-currently face safety, packaging, materials and microfabrication challenges preventing on-chip technological readiness, leaving an opportunity for electrostatic microcapacitors. Here, in this study, we report record-high electrostatic energy storage density (ESD) and power density, to our knowledge, in HfO 2 -ZrO 2 -based thin film microcapacitors integrated into silicon, through a three-pronged approach. First, to increase intrinsic energy storage, atomic-layer-deposited antiferroelectric HfO 2 -ZrO 2 films are engineered near a field-driven ferroelectric phase transition to exhibit amplified charge storage by the negative capacitance effect, which enhances volumetric ESD beyond the best-known back-end-of-the-line-compatible dielectrics (115 J cm -3 ). Second, to increase total energy storage, antiferroelectric superlattice engineering scales the energy storage performance beyond the conventional thickness limitations of HfO 2 -ZrO 2 -based (anti)ferroelectricity (100-nm regime). Third, to increase the storage per footprint, the superlattices are conformally integrated into three-dimensional capacitors, which boosts the areal ESD nine times and the areal power density 170 times that of the best-known electrostatic capacitors: 80 mJ cm -2 and 300 kW cm -2 , respectively. This simultaneous demonstration of ultrahigh energy density and power density overcomes the traditional capacity-speed trade-off across the electrostatic-electrochemical energy storage hierarchy. Furthermore, the integration of ultrahigh-density and ultrafast-charging thin films within a back-end-of-the-line-compatible process enables monolithic integration of on-chip microcapacitors, which can unlock substantial energy storage and power delivery performance for electronic microsystems.

25 ENERGY STORAGE↗

DOE OSTI2026

Collection of fluorescence from an ion using trap-integrated photonics

Spontaneously emitted photons are entangled with the electronic and nuclear degrees of freedom of the emitting atom, so interference and measurement of these photons can entangle separate matter-based quantum systems as a resource for quantum information processing. Since confinement in a single-mode facilitates the photon interference needed for generating entanglement, the dipole emission patterns relevant in spontaneous emission present a mode-matching challenge. Current demonstrations rely on bulk photon-collection and manipulation optics that suffer from large component size and system-to-system variability—factors that impede scaling to the large numbers of entangled pairs needed for quantum information processing. To address these limitations, we demonstrate a collection method that enables passive phase stability, straightforward photonic manipulation, and intrinsic reproducibility. Specifically, we engineer a waveguide-integrated grating to couple photons emitted from a trapped ion into a single optical mode within a microfabricated ion-trap chip. Using the integrated collection optic, we characterize the collection efficiency, image the ion, and detect the ion’s quantum state. The integrated optic covers 2.18% of the solid angle and collects 1.97 ± 0.3% of the spontaneously emitted light incident on the grating for a total collection efficiency of 0.043% into a single-mode waveguide. This proof-of-principle demonstration lays the foundation for leveraging the inherent stability and reproducibility of integrated photonics to create, manipulate, and measure multipartite quantum states in arrays of quantum emitters.

Optical physics↗

DOE OSTI2024

DS-GL: Advancing Graph Learning via Harnessing the Power of Nature within Dynamic Systems

With the rapid digitization of the world, an increasing number of real-world applications are turning to nonEuclidean data, modeled as graphs. Due to their intrinsic high complexity and irregularity, learning from graph data demands tremendous computational power. Recently, CMOS-compatible Ising machines, i.e., dynamic systems composed of CMOS components, have emerged as a new approach that harnesses the inherent power of natural annealing within dynamic systems to efficiently resolve binary optimization problems and have been adopted for traditional graph computation, such as max-cut. However, when performing complex Graph Learning (GL) tasks, Ising machines face significant hurdles: (i) they are inherently binary and thus ill-suited for real-valued problems; (ii) their expensive all-to-all coupling network that guarantees effective natural annealing poses daunting scalability concerns. To address these challenges, this paper proposes a nature-powered graph learning framework dubbed DS-GL, which is the first effort to transform the process of solving graph learning problems into the natural annealing process within a parameterized dynamic system embodied as a CMOS chip. To tackle the two major hurdles, DS-GL first augments the Ising machine architecture to modify the self-reaction term of its Hamiltonian function from linear to quadratic, effectively serving as an energy regulator. This adjustment maintains the system’s original physical interpretation while enabling it to process continuous, real-valued data. Second, to address the scaling issue, DS-GL further upgrades the real-valued dense Ising machine by decomposing it into a mesh-based multi-PE dynamic system that supports efficient distributed spatial-temporal co-annealing across different PEs through sparse interconnects. By exploiting the inherent sparsity and component structures in real-world graphs, DS-GL is able to map complex graph learning tasks onto the scalable dynamic system while maintaining high accuracy. Evaluations with three diverse GL applications across six real-world datasets, including traffic flow and COVID-19 prediction, show that DS-GL can deliver from 102× to 106× speedups and 500× energy reduction over Graph Neural Networks on GPUs, with 5% - 20% accuracy enhancement.

Song, Ruibing↗

DOE OSTI2021

Performing In Situ Closed-Cell Gas Reactions in the Transmission Electron Microscope

Gas reactions studied by in situ electron microscopy can be used to capture the real-time morphological and microchemical transformations of materials at length scales down to the atomic level. In situ closed-cell gas reaction (CCGR) studies performed using (scanning) transmission electron microscopy (STEM) can separate and identify localized dynamic reactions, which are extremely challenging to capture using other characterization techniques. For these experiments, we used a CCGR holder that utilizes microelectromechanical systems (MEMS)-based heating microchips (hereafter referred to as "E-chips"). The experimental protocol described here details the method for performing in situ gas reactions in dry and wet gases in an aberration-corrected STEM. This method finds relevance in many different materials systems, such as catalysis and high-temperature oxidation of structural materials at atmospheric pressure and in the presence of various gases with or without water vapor. Here, several sample preparation methods are described for various material form factors. During the reaction, mass spectra obtained with a residual gas analyzer (RGA) system with and without water vapor further validates gas exposure conditions during reactions. Integrating an RGA with an in situ CCGR-STEM system can, therefore, provide critical insight to correlate gas composition with the dynamic surface evolution of materials during reactions. In situ/operando studies using this approach allow for detailed investigation of the fundamental reaction mechanisms and kinetics that occur at specific environmental conditions (time, temperature, gas, pressure), in real-time, and at high spatial resolution.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

DOE OSTI2021

Experimental and computational analysis of bending fatigue failure in chopped carbon fiber chip reinforced composites

With a better balance among good mechanical performance, high freedom of design, and low material and manufacturing cost, chopped carbon fiber chip reinforced sheet molding compound (SMC) composites show great potential in different engineering applications. Here in this paper, bending fatigue behaviors of SMC composites considering the heterogeneous fiber orientation distributions have been thoroughly investigated utilizing both experimental and computational methods. First, four-point bending fatigue tests are performed with designed SMC composites, and the local modulus is adopted as a metric to represent the local fiber orientation of two opposing sides. Interestingly, SMC composites with and without large discrepancy in local modulus of opposing sides show different fatigue behaviors. Interrupted tests are conducted to explore the bending fatigue failure mechanism, and the damage processes of valid specimens are also closely examined. We find that the fatigue failure of SMC composites under four-point bending is governed by crack propagation instead of crack initiation. Because of this, the heterogeneous local fiber orientations of both sides of the specimen influence fatigue life. The microstructure of the lower side shows a direct influence while that of the upper side also exhibiting influence which becomes more prominent for high cycle fatigue cases. Furthermore, a hybrid micro–macro computational model is proposed to efficiently study the cyclic bending behavior of SMC composites. The region of interest is reconstructed with a modified random sequential absorption algorithm to conserve all the microstructural details including the heterogeneous fiber orientation, while the rest of the regions are modeled as homogenized macro-scale continua. Combined with a framework to capture the progressive fatigue damage under cyclic bending, the bending fatigue behaviors of SMC composites are accurately captured by the hybrid computational model comparing with our experimental analysis.

36 MATERIALS SCIENCE↗

DOE OSTI2024

Fault localization in a microfabricated surface ion trap using diamond nitrogen-vacancy center magnetometry

Here, as quantum computing hardware becomes more complex with ongoing design innovations and growing capabilities, the quantum computing community needs increasingly powerful techniques for fabrication failure root-cause analysis. This is especially true for trapped-ion quantum computing. As trapped-ion quantum computing aims to scale to thousands of ions, the electrode numbers are growing to several hundred, with likely integrated photonic components also adding to the electrical and fabrication complexity, making faults even harder to locate. In this work, we used a high-resolution quantum magnetic imaging technique, based on nitrogen-vacancy centers in diamond, to investigate short-circuit faults in an ion trap chip. We imaged currents from these short-circuit faults to ground and compared them to intentionally created faults, finding that the root cause of the faults was failures in the on-chip trench capacitors. This work, where we exploited the performance advantages of a quantum magnetic sensing technique to troubleshoot a piece of quantum computing hardware, is a unique example of the evolving synergy between emerging quantum technologies to achieve capabilities that were previously inaccessible.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗