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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Papers are presented dealing with the design of reliable, low cost, advanced avionics systems applicable to general aviation in the 1980's and beyond. Sensors, displays, integrated circuits, microprocessors, and minicomputers are among the topics discussed.
A microprocessor-based instrumentation system was developed to be used in the measurement and analysis of fourth harmonic power generated by the DSN high-power transmitters.
Digital computer components which perform two dimensional array logic operations (Tse logic) on binary data arrays are described. The properties of Golay transforms which make them useful in image processing are reviewed, and several architectures for Golay transform processors are presented with emphasis on the skeletonizing algorithm. Conventional logic control units developed for the Golay transform processors are described. One is a unique microprogrammable control unit that uses a microprocessor to control the Tse computer. The remaining control units are based on programmable logic arrays. Performance criteria are established and utilized to compare the various Golay transform machines developed. A critique of Tse logic is presented, and recommendations for additional research are included.
This paper describes an automatic system for acquisition, logging and analysis of stress, strain and acoustic emission data. The complete system is a combination of several standard items of equipment and a newly developed intelligent data logger which has the capability to send data directly to a large scale computer for reduction and plotting. The data logging and all interfacing with peripheral equipment are accomplished using digital electronics. The heart of the system is a four-bit microprocessor and digital cassette tape unit. The system, which is controlled by instructions from a cathode ray tube terminal, has the capability to transmit data from the cassette unit to a large computer via a time sharing option. Typical results are presented for acoustic emission count rate and total count curves superimposed on stress-strain diagrams for boron/epoxy advanced composites.
Developement of computer architecture is discussed in terms of the proliferation of the microprocessor, the utility of the medium-scale computer, and the sheer computational power of the large-scale machine. Changes in new applications brought about because of ever lowering costs, smaller sizes, and faster switching times are included.
A set of programs called Command and Control System (CCS), intended as a user manual, is described for the operation of CCS by the personnel supporting the wind monitoring portion of the launch mission. Wind data obtained by tracking balloons is sent by electronic means using telephone lines to other locations. Steering commands are computed from a system called ADDJUST for the on-board computer and relays this data. Data are received and automatically stored in a microprocessor, then via a real time program transferred to the UNIVAC 1100/40 computer. At this point the data is available to be used by the Command and Control system.
A high speed imaging system based on state-of-the-art photosensor arrays was designed for use in nuclear diagnostics. The system is comprised of a front end rapid scan solid state camera, a high speed digitizer, and a PCM line driver in a downhole package and a memory buffer system in an uphole trailer. The downhole camera takes a snapshot of a nuclear device created flux stream, digitizes the image and transmits it to the uphole memory system before being destroyed. The memory system performs two functions: it retains the data for local display and processing by a microprocessor, and it buffers the data for retransmission at slower rates to a computational facility. In the talk, the impetus for such a system as well as its operation was discussed, along with systems under development which incorporate higher data rates and more resolution.
The final design of a field portable microprocessor-based, microwave measuring and analysis instrument to be used for S-band transmitter fourth-harmonic power analysis and its impact on X-band reception in a dual S-X-band system is described.
A brief description of the Loran-C system is presented with a suggested receiver based on a standard AM-FM integrated circuit chip. Construction details of the Mini-L Loran-C prototype front-end are considered. The Mini-L system was bench tested for approximately 500 hours under a variety of reception conditions. The Mini-L concept combined with a microprocessor system is a promising approach to the development of truly low-cost Loran-C receivers for the marine and airborne user.
A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.
A two-inch hyperbolic rod quadrupole mass analyzer with a mass range of 400 to 200 amu and a sensitivity exceeding 100 packs per billion has been developed and tested. This analyzer is the basic hardware portion of a microprocessor-controlled quadrupole mass spectrometer for a Gas Analysis and Detection System (GADS). The development and testing of the hyperbolic-rod quadrupole mass spectrometer and associated hardware are described in detail.
A hardware/software system which incorporates a microprocessor design and software for the calculation of normalized radar cross section in real time was developed. Interface is provided to decommutate the NASA ADAS data stream for aircraft parameters used in processing and to provide output in the form of strip chart and pcm compatible data recording.
A circuit for interfacing the JOLT (TM) microprocessor to four digital displays was designed and fabricated. Circuit operation and test program are described and presented in detail.
The design requirements for a Programmable Data Communications Controller (PDCC) that reduces the difficulties in attaching data terminal equipment to a computer are presented. The PDCC is an interface between the computer I/O channel and the bit serial communication lines. Each communication line is supported by a communication port that handles all line control functions and performs most terminal control functions. The port is fabricated on a printed circuit board that plugs into a card chassis, mating with a connector that is joined to all other card stations by a data bus. Ports are individually programmable; each includes a microprocessor, a programmable read-only memory for instruction storage, and a random access memory for data storage.
A VLF receiver front end has been designed using standard linear IC's. The basic methods have been evaluated extensively on the omega 10.2-kHz channel but are readily adaptable to any other VLF frequency in the 10.2-20 kHz region. Applications for the modules exist in position location, time-frequency measurements, and signal propagation. The set provides control gates, zero-crossing signals, and analog outputs to interface with any type of digital logic, microprocessor, or analog signal processor.
This paper presents the results obtained in a continuing investigation of real-time distributed processing systems which is being conducted at the Jet Propulsion Laboratory. A distributed processor architecture has been developed for control and data handling on a planetary spacecraft. This system, designated the Unified Data System, has been implemented in a feasibility breadboard. The following aspects of the Unified Data System are described: (1) standardized building block elements and their configuration into microprocessor modules, (2) a highly redundant bus structure which connects the various modules and facilitates intercommunications with minimal software support, (3) the structure of software within the individual modules and its coordination between modules, and (4) the mechanisms by which fault-tolerance can be implemented within the network. Through the attributes of multilevel standardization, simplicity, and flexibility, this system is expected to result in significant cost savings to future spacecraft missions.
The application of charge-coupled device (CCD) processors to automatic-control systems is suggested. CCD processors are a new form of semiconductor component with the unique ability to process sampled signals on an analog basis. Specific implementations of controllers are suggested for linear time-invariant, time-varying, and nonlinear systems. Typical processing time should be only a few microseconds. This form of technology may become competitive with microprocessors and minicomputers in addition to supplementing them.
The paper describes three design approaches to individual cell monitoring and control for sealed secondary battery cells. One technique involves a modular strap-on single cell protector which contains all the electronics required for monitoring cell voltage, responding to external commands, and forming a bypass circuit for the cell. A second technique, the multiplexed cell protector, uses common circuitry to monitor and control each cell in a battery pack. The third technique, the computerized cell protector, by replacing the hard-wired logic of the multiplexed cell protector with a microprocessor, achieves greatest control flexibility and inherent computational capability with a minimum parts count implementation.