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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24

Hardware-in-the-Loop Simulation of a Distribution System with Air Conditioners under Model Predictive Control: Preprint

Many have proposed that responsive load provided by distributed energy resources (DERs) and demand response (DR) are an option to provide flexibility to the grid and especially to distribution feeders. However, because responsive load involves a complex interplay between tariffs and DER and DR technologies, it is challenging to test and evaluate options without negatively impacting customers. This paper describes a hardware-in-the-loop (HIL) simulation system that has been developed to reduce the cost of evaluating the impact of advanced controllers (e.g., model predictive controllers) and technologies (e.g., responsive appliances). The HIL simulation system combines large-scale software simulation with a small set of representative building equipment hardware. It is used to perform HIL simulation of a distribution feeder and the loads on it under various tariff structures. In the reported HIL simulation, loads include many simulated air conditioners and one physical air conditioner. Independent model predictive controllers manage operations of all air conditioners under a time-of-use tariff. Results from this HIL simulation and a discussion of future development work of the system are presented.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Hardware-in-the-Loop (HIL) Simulations for Smart Grid Impact Studies: Preprint

Hardware-in-the-loop (HIL) simulation is increasingly employed in power engineering as more inverter-based generation and smart appliances are connected to the electric grid. HIL techniques allow for co-simulation of analytical models with actual devices whose complex behavior is computationally inefficient or difficult to capture. It also allows for testing of the behavior of these devices under adverse conditions that only occur rarely in the field, but that are important to evaluate. An overview of how HIL simulation has been used to date is provided. This paper further proposes that HIL simulation should play an important role in evaluating new control strategies, especially at the distribution level, that are being proposed to allow for continued affordable and reliable operation of the electric grid with the introduction of these new technologies. It presents a new capability that was developed to enable evaluation of interactions between residential loads and the smart grid: smart home hardware-in-the-loop. The paper includes results from an HIL simulation that incorporates multiple technologies and controls.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Performance Evaluation of Distributed Energy Resources Management System via Advanced Hardware-in-the-Loop Simulation: Preprint

This paper presents an advanced hardware-in-the-loop (HIL) platform to evaluate the performance of voltage regulation coordinated across advanced distribution management systems (ADMS), distributed energy management system (DERMS), and DERs. The HIL platform provides realistic laboratory testing, including accurate modeling of the real-world distribution system from a utility partner, real controller (ADMS and DERMs) and power (DERs) hardware, and standard communications protocols. The test results show proper functionalities of the integrated platform and performance of the peak load management of coordinated control systems. Based on the laboratory testing, the utility can set up the same grid automation system to manage DERs to achieve system-level control and operation objectives (e.g., peak load management), thus derisking potential issues (e.g., instability) for field deployment.

24 POWER TRANSMISSION AND DISTRIBUTION↗

1.2.4.404 - Data-Driven Approach for Hydropower Plant Controller Prototyping Using Remote Hardware in the Loop (DR-HIL)

Real-time prototyping of hydropower plant controls is important for reducing the cost and the risk of field deployment. This project will 1) collect design and operational data from actual hydro plants and 2) use a physics-informed machine learning approach for real-time emulation of hydropower plants, including hydro turbine and hydrodynamics. The data-driven models will be interfaced with digital real-time simulation at NREL’s Flatirons campus for hardware-in-the-loop (HIL) testing of the governor hardware device or controller-HIL (CHIL). The proposed approach will also establish the connectivity based remote CHIL testing capability using real-time data streams from an actual hydro plant. This integrated hydro-plant emulation with CHIL will be used to prototype hydro-governor controls and eventually provide an opportunity to test hydropower integrated with various technologies (e.g. conventional and renewable generation, energy conversion, etc.) as HIL.

controls prototyping↗

Validation of HVAC Hardware-in-the-Loop Simulation for Advanced Control Strategies in Smart Homes: Preprint

Residences with smart thermostats can use advanced control strategies to manage their cooling/heating demand, but it is difficult to evaluate optimal control strategies for flexible heating, ventilation, and air conditioning (HVAC) systems in a traditional laboratory setting. The HVAC hardware-in-the-loop (HIL) system combines physical HVAC equipment and a physical thermostat with a simulated house to enable realistic operation of the hardware in any climate. This HIL platform allows researchers to evaluate advanced control strategies for homes with different construction or vintage types, as well as different climates and occupancy schedules. To demonstrate the capabilities of the HVAC HIL system, experimental results with a SEER 16, HSPF 9.5, 3 ton single-speed air source heat pump are validated against past field data collected from a heavily instrumented, unoccupied, retrofit house located in Sacramento, California. Three different cooling strategies are recreated in the HVAC HIL platform, including two different pre-cooling schedules that were designed to shift energy use away from the evening peak. The room temperatures, heat pump energy use, and run time show good agreement between the field data and HIL experimental results for three strategies.

cooling strategies↗

Power Hardware-in-the-Loop Interfaces for Inverter-Based Microgrid Experiments Including Transitions: Preprint

Microgrids continue to proliferate, particularly those that rely on inverter-based resources as the microgrid's voltage and frequency leader. Hardware-in-the-loop (HIL) simulations can de-risk microgrid deployments, and therefore we need power-hardware-in-the-loop (PHIL) interfaces for grid-forming (GFM) inverters to enable simulations of seamless transitions between islanded and grid-connected operation. Such microgrid interfaces are particularly challenging to model when the inverters need to switch modes, i.e., between grid-following (GFL) and GFM as the microgrid transitions between grid-connected and islanded operation. This paper presents two PHIL interfaces for such microgrids and the preliminary experimental results: One interface is suitable for those who have access to a power amplifier that can operate as a controllable current source, and the other is for those who need a solution that uses a voltage-mode power amplifier.

battery energy storage system↗

Controller Hardware-in-the-Loop Evaluation of a Microgrid Controller for a Microgrid System with Multiple Grid-Forming Inverters: Preprint

This paper presents the laboratory evaluation of a commercial Microgrid Management System (MGMS) implemented in the real-world Bronzeville Microgrid which features a futuristic scenario with high renewable energy integration and the use of multiple Grid-Forming (GFM) inverters. The primary objective of the performance evaluation for the MGMS is to assess the MGMS's capability to dispatch GFM units, including a GFM PV unit and two GFM battery units, to maintain the system stability and ensure economic operation, thus guaranteeing the microgrid's resilience during prolonged outages and dynamic events. The laboratory controller hardware-in-the-loop provides realistic testing environment through detailed electromagnetic transient modeling of the microgrid system, hardware MGMS, and standard communication protocols (DNP3). The CHIL evaluation shows how the MGMS effectively manages the GFM inverters, highlighting its performance in maintaining stability, reliability, and survivability in a microgrid environment with a high penetration of renewable energy sources.

controller hardware-in-the-loop↗

Controller-Hardware-in-the-Loop Evaluation of a Microgrid Controller for a Microgrid System With Multiple Grid-Forming Inverters

This paper presents the laboratory evaluation of a commercial Microgrid Management System (MGMS) implemented in the real-world Bronzeville Microgrid which features a futuristic scenario with high renewable energy integration and the use of multiple Grid-Forming (GFM) inverters. The primary objective of the performance evaluation for the MGMS is to assess the MGMS's capability to dispatch GFM units, including a GFM PV unit and two GFM battery units, to maintain the system stability and ensure economic operation, thus guaranteeing the microgrid's resilience during prolonged outages and dynamic events. The laboratory controller hardware-in-the-loop provides realistic testing environment through detailed electromagnetic transient modeling of the microgrid system, hardware MGMS, and standard communication protocols (DNP3). This CHIL evaluation shows how the MGMS effectively manages the GFM inverters, highlighting its performance in maintaining stability, reliability, and survivability in a microgrid environment with a high penetration of renewable energy sources.

controller hardware-in-the-loop↗

Investigating Formal Methods Tools and their Applicability for Hardware Vulnerability Remediation

Formal methods use mathematical logic and equations to prove that a system or code is secure. In this poster, I examine existing formal methods tools and their application for projects working to remediate vulnerabilities in hardware and hardware description language. This poster is focused on the tools ReWire and AutoGenILA and I hope to evaluate their benefits and weaknesses with the intention of creating an internal report on the application and weaknesses of existing formal methods tools and identifying gaps for future formal methods tool creation.

97 - MATHEMATICS AND COMPUTING↗

Measuring qubit stability in a gate-based NISQ hardware processor

Some of the most problematic issues that limit the implementation of applications on Noisy Intermediate Scale Quantum (NISQ) machines are the adverse impacts of both incoherent and coherent errors. We conducted an in-depth study of coherent errors on a quantum hardware platform using a transverse field Ising model Hamiltonian as a sample user application. We report here on the results from these computations using several error mitigation protocols that profile these errors and provide an indication of the hardware qubit stability. Through a detailed set of measurements we identify inter-day and intra-day qubit calibration drift and the impacts of quantum circuit placement on groups of qubits in different physical locations on the processor. This paper also discusses how these measurements can provide a better understanding of these types of errors and how they may improve efforts to validate the accuracy of quantum computations.

Yeter-Aydeniz, Kübra↗

Hardware-In-the-Loop Benchmarking Setup for Phasor Based Control Validation

Phasor Based Control is a novel approach to controlling Distributed Energy Resources that aims at relieving various constraints that arise in the distribution grid. It is a two-layer control system with a supervisory control that coordinates distributed controllers to reach voltage phasor targets. The distributed controllers use local synchrophasor measurements and operate as feedback controllers. This control method is currently under development with several algorithms being under consideration for both the central and distributed components. In this report, we present the experimental setup that was prepared to prototype a hardware implementation and validate the control method in Hardware-In-the-Loop.

24 POWER TRANSMISSION AND DISTRIBUTION↗

ATLAS FTK Challenge: Simulation of a Billion-fold Hardware Parallelism

During the current LHC shutdown period the ATLAS experiment will upgrade the Trigger and Data Acquisition system to include a hardware tracker coprocessor: the Fast TracKer (FTK). The FTK receives data from the 80 million of channels of the ATLAS silicon detector, identifying charged tracks and reconstructing their parameters at a rate of up to 100 KHz and within 100 microseconds. To achieve this performance, the FTK system identifies candidate tracks utilizing the computing power of a custom ASIC chip with associative memory (AM) designed to perform “pattern matching” at very high speed; track parameters are then calculated using modern FPGAs. A detailed simulation of this massive system has been developed with the goal of supporting the hardware design and studying its impact in the ATLAS online event selection at high LHC luminosities. We present the issues related to emulating FTK on a general-purpose CPU platform, using ATLAS computing Grid resources, and the solutions developed in order to mitigate these problems and allow the studies required to support the system design, construction and installation.

Distributed Computing↗

Efficient Mixed-Precision Matrix Factorization of the Inverse Overlap Matrix in Electronic Structure Calculations with AI-Hardware and GPUs

In recent years, a new kind of accelerated hardware has gained popularity in the artificial intelligence (AI) community which enables extremely high-performance tensor contractions in reduced precision for deep neural network calculations. In this article, we exploit Nvidia Tensor cores, a prototypical example of such AI-hardware, to develop a mixed precision approach for computing a dense matrix factorization of the inverse overlap matrix in electronic structure theory, S –1 . This factorization of S –1 , written as ZZT = S –1 , is used to transform the general matrix eigenvalue problem into a standard matrix eigenvalue problem. Here we present a mixed precision iterative refinement algorithm where Z is given recursively using matrix–matrix multiplications and can be computed with high performance on Tensor cores. To understand the performance and accuracy of Tensor cores, comparisons are made to GPU-only implementations in single and double precision. Additionally, we propose a nonparametric stopping criteria which is robust in the face of lower precision floating point operations. The algorithm is particularly useful when we have a good initial guess to Z, for example, from previous time steps in quantum-mechanical molecular dynamics simulations or from a previous iteration in a geometry optimization.

36 MATERIALS SCIENCE↗

Hardware functional obfuscation with ferroelectric active interconnects

Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we propose an efficient hardware encryption technique with minimal complexity and overheads based on ferroelectric field-effect transistor (FeFET) active interconnects. By utilizing the threshold voltage programmability of the FeFETs, run-time reconfigurable inverter-buffer logic, utilizing two FeFETs and an inverter, is enabled. Judicious placement of the proposed logic makes it act as a hardware encryption key and enable encoding and decoding of the functional output without affecting the critical path timing delay. Additionally, a peripheral programming scheme for reconfigurable logic by reusing the existing scan chain logic is proposed, obviating the need for specialized programming logic and circuitry for keybit distribution. Our analysis shows an average encryption probability of 97.43% with an increase of 2.24%/ 3.67% delay for the most critical path/ sum of 100 critical paths delay for ISCAS85 benchmarks.

42 ENGINEERING↗

Operando microscopy for neuromorphic hardware

Microscopy techniques can uncover the physical properties and dynamic behaviours of materials, driving the discovery of emergent phenomena and guiding the design of next-generation computing hardware. As artificial intelligence becomes pervasive, the demand for high-performance materials to support sustainable information technologies is growing. Here, this Review highlights state-of-the-art imaging from electron and X-ray to optical techniques to probe the dynamics of neuromorphic materials, including operando characterization of devices. We examine design principles for neuromorphic materials, along with obstacles that hinder their development. Emphasis is placed on spatially and temporally resolved approaches that capture state changes including phase transitions, ferroic switching and spin-wave propagation that emulate biological components such as neurons, synapses and their connectivity. We discuss challenges in operando characterization and the integration of artificial intelligence-driven analysis for feedback-guided material discovery. Finally, we outline opportunities for real-time imaging of neuromorphic systems, paving the way towards adaptive, brain-inspired hardware.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Solving sparse finite element problems on neuromorphic hardware

The finite element method (FEM) is one of the most important and ubiquitous numerical methods for solving partial differential equations (PDEs) on computers for scientific and engineering discovery. Applying the FEM to larger and more detailed scientific models has driven advances in high-performance computing for decades. Here we demonstrate that scalable spiking neuromorphic hardware can directly implement the FEM by constructing a spiking neural network that solves the large, sparse, linear systems of equations at the core of the FEM. We show that for the Poisson equation, a fundamental PDE in science and engineering, our neural circuit achieves meaningful levels of numerical accuracy and close to ideal scaling on modern, inherently parallel and energy-efficient neuromorphic hardware, specifically Intel’s Loihi 2 neuromorphic platform. We illustrate extensions to irregular mesh geometries in both two and three dimensions as well as other PDEs such as linear elasticity. Our spiking neural network is constructed from a recurrent network model of the brain’s motor cortex and, in contrast to black-box deep artificial neural network-based methods for PDEs, directly translates the well-understood and trusted mathematics of the FEM to a natively spiking neuromorphic algorithm.

Applied mathematics↗

Quantum subspace expansion in the presence of hardware noise

Finding ground state energies on current quantum processing units (QPUs) using algorithms such as the variational quantum eigensolver (VQE) continues to pose challenges. Hardware noise severely affects both the expressivity and trainability of parameterized quantum circuits, limiting them to shallow depths in practice. Here, we demonstrate that both issues can be addressed by synergistically integrating VQE with a quantum subspace expansion, allowing for an optimal balance between quantum and classical computing capabilities and costs. We perform a systematic benchmark analysis of the iterative quantum-assisted eigensolver in the presence of hardware noise. We determine ground state energies of 1D and 2D mixed-field Ising spin models on noisy simulators and the IBM QPUs ibmq_quito (5 qubits) and ibmq_guadalupe (16 qubits). To maximize accuracy, we propose a suitable criterion to select the subspace basis vectors according to the trace of the noisy overlap matrix. Finally, we show how to systematically approach the exact solution by performing controlled quantum error mitigation based on probabilistic error reduction on the noisy backend fake_guadalupe.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Multi-machine validation of plasma initiation modelling and prospects for future devices: Predicting plasma initiation using only hardware design and control room input data

This paper reports on the generic prediction capability of full electromagnetic plasma initiation modelling with DYON, which was carried out for the first time in fusion research by the joint modelling of the International Tokamak Physics Activity—Integrating Operation Scenario group. The following devices were included in the experiment database: VEST (spherical torus, copper coils, Stainless steel wall, R/a = 0.3 m/0.2 m, V v = 3.7 m 3 ), MAST-U (spherical torus, copper coils, C wall, R/a = 0.7 m/0.5 m, V v = 55 m 3 ), EAST (conventional tokamak, superconducting coils, metallic wall, R/a = 1.85 m/0.5 m, V v = 38 m 3 ), DIII-D (conventional tokamak, copper coils, C wall, R/a = 1.67 m/0.65 m, V v = 35 m 3 ), and KSTAR (conventional tokamak, superconducting coils, C wall, R/a = 1.8 m/0.5 m, V v = 55 m 3 ). Despite the different hardware features of the devices, the required operating spaces of the loop voltage induction and prefill gas pressure for inductive plasma initiation in each device were successfully reproduced by the predictive simulations with DYON using only the individual hardware design and the control room input data for each discharge. This successful validation across multiple machines demonstrates that the full electromagnetic DYON modelling can capture the essential physics of inductive plasma initiation. The simulation settings commonly employed for all modelling and the modifications necessary to account for the discrepancies between individual devices are reported. Predictions for ITER based on the multi-machine validation indicate that a wide range of prefill gas pressures exists for the Townsend breakdown and the plasma burn-through (0.01–1.5 mPa).

DYON↗