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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 433 records · Page 24
All sourcesNASA NTRSDOE OSTI
NASA NTRS1994

Monolithic Optical-To-Electronic Receiver

Monolithic optoelectronic integrated circuit converts multiplexed digital optical signals into electrical signals, separates, and distributes them to intended destinations. Developed to deliver phase and amplitude commands to monolithic microwave integrated circuits (MMIC's) at elements of millimeter-wave phased-array antenna from single optical fiber driven by external array controller. Also used in distribution of high-data-rate optical communications in local-area networks (LAN's). Notable features include options for optical or electrical clock inputs; outputs for raw data, addresses, and instructions for diagnosis; and optical-signal-detection circuit used to reduce power consumption by 80 percent between data-transmission times. Chip fabricated by processes available at many major semiconductor foundries. Distribution of digital signals in aircraft, automobiles, and ships potential application.

Kunath, Richard↗
DOE OSTI2020

Electronic Bottleneck Suppression in Next‐Generation Networks with Integrated Photonic Digital‐to‐Analog Converters

Digital‐to‐analog converters (DAC) are indispensable functional units in signal processing instrumentation and wide‐band telecommunication links for both civil and military applications. As photonic systems are capable of high data throughput and low latency, an increasingly found system limitation stems from the required domain crossing such as digital to analog and electronic to optical. A photonic DAC implementation, in contrast, enables a seamless signal conversion with respect to both energy efficiency and short signal delay, often requiring bulky discrete optical components and electric–optic transformation, hence introducing inefficiencies. Herein, a novel coherent parallel photonic DAC concept along with a 4‐bit experimental prototype capable of performing this DAC without optic–electric–optic domain crossing is introduced. This new paradigm guarantees a linear intensity weighting among bits when operating at high sampling rates (50 GHz), featuring an exceptional sampling efficiency (> 100 GS ) and small footprint (≈1 mm 2 ) in an 8‐bit implementation. Importantly, this photonic DAC enables seamless interfaces of next‐generation data processing hardware with high relevance in data centers, task‐specific compute accelerators such as neuromorphic engines, and network edge processing applications.

Meng, Jiawei↗
NASA NTRS1993

Automated propellant leak detection

An automated hydrogen leak detection system is being developed for earth-to-orbit rocket engine applications. The system consists of three elements, a sensor array, a signal processing unit, and a diagnostic processor. The sensor array consists of discrete solid state sensors which are located at specific potential leak sites and in potential leak zones. The signal processing unit provides excitations power for the sensors and provides analog to digital data conversion of the sensor signals. The diagnostic computer analyzes the sensor outputs to determine leak sources and magnitude. Leak data from the sensor network is interpreted using knowledge based software and displayed on-line through a graphical user interface including 3-D leak visualization. The system requirements have been developed assuming eventual application to the Space Shuttle Main Engine which requires approximately 72 measurement locations. A prototype system has been constructed to demonstrate the operational features of the system. This system includes both prototype electronics and data processing software algorithms. Experiments are in progress to evaluate system operation at conditions which simulate prelaunch and flight. The prototype system consists of a network using 16 sensors within a testbed which simulates engine components. Sensor response, orientation, and data analysis algorithms are being evaluated using calibrated leaks produced within the testbed. A prototype flight system is also under development consisting of 8 sensors and flight capable electronics with autonomous control and data recording.

Makel, D. B.↗
NASA NTRS2004

Parallel-Processing Equalizers for Multi-Gbps Communications

Architectures have been proposed for the design of frequency-domain least-mean-square complex equalizers that would be integral parts of parallel- processing digital receivers of multi-gigahertz radio signals and other quadrature-phase-shift-keying (QPSK) or 16-quadrature-amplitude-modulation (16-QAM) of data signals at rates of multiple gigabits per second. Equalizers as used here denotes receiver subsystems that compensate for distortions in the phase and frequency responses of the broad-band radio-frequency channels typically used to convey such signals. The proposed architectures are suitable for realization in very-large-scale integrated (VLSI) circuitry and, in particular, complementary metal oxide semiconductor (CMOS) application- specific integrated circuits (ASICs) operating at frequencies lower than modulation symbol rates. A digital receiver of the type to which the proposed architecture applies (see Figure 1) would include an analog-to-digital converter (A/D) operating at a rate, fs, of 4 samples per symbol period. To obtain the high speed necessary for sampling, the A/D and a 1:16 demultiplexer immediately following it would be constructed as GaAs integrated circuits. The parallel-processing circuitry downstream of the demultiplexer, including a demodulator followed by an equalizer, would operate at a rate of only fs/16 (in other words, at 1/4 of the symbol rate). The output from the equalizer would be four parallel streams of in-phase (I) and quadrature (Q) samples.

Gray, Andrew↗
NASA NTRS2013

Single-Event Transient Testing of Low Dropout PNP Series Linear Voltage Regulators

As demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing

Adell, Philippe↗
NASA NTRS2013

Single-event transient testing of low dropout PNP series linear voltage regulators

As demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing

Allen, Gregory↗
NASA NTRS1985

Parallel VLSI Architecture

Fermat number transformation convolutes two digital data sequences. Very-large-scale integration (VLSI) applications, such as image and radar signal processing, X-ray reconstruction, and spectrum shaping, linear convolution of two digital data sequences of arbitrary lenghts accomplished using Fermat number transform (ENT).

Truong, T. K.↗
NASA NTRS1999

An Analysis of Gravity-Field Estimation Based on Intersatellite Dual-1-Way Biased Ranging

The GRACE (Gravity Recovery And Climate Experiment) mission is designed to make global, highly accurate measurements of the Earth's gravity field with high spatial resolution. Ancillary GPS occultation measurements are also to be carried out for atmospheric monitoring. In the dual-1-way biased ranging of this mission, the range between two satellites separated by 100 to 200 km in nearly polar, coplanar, circular orbits, is measured to very high precision, to within an additive constant, through the exchange of K- and Ka-band sinusoidal signals. Such biased ranging data, along with GPS L-band range and phase data, can be processed and fit over successive multiday intervals to obtain accurate estimates of the Earth's gravity field. This report approximately models and analyzes this process, from the generation of the RF signals at the two satellites through the extraction of the geopotential. The steps include generation of the transmitted signals, processing the received signals to extract high-rate baseband phase, carrying out a dual-1-way combination of baseband phase to extract high-rate biased range for each band, combining K- and Ka-band ranges to correct for the ionosphere effect, and processing the resulting high-rate biased range values to extract three types of reduced-rate observables: biased range, range rate and range acceleration. The version of dual-1-way biased ranging developed by this report improves upon previous versions in a number of ways: highly accurate satellite-timetag corrections derived from concurrent GPS data, better baseband phase extraction using highly digital processing, highly accurate USO-rate calibration derived from concurrent GPS data, an improved method for extracting high-rate biased range from baseband phase, improved filtering for extracting reduced- rate observables from high-rate biased range, and parallel extraction of three observable types.

SINUSOIDAL SIGNALS↗
NASA NTRS1995

The Yerkes Observatory 60-channel far infrared camera for the Kuiper Airborne Observatory

The Yerkes Observatory Far Infrared Camera employs a two-dimensional, 60-detector array of (3)He-cooled silicon bolometers for broadband imaging in the spectral range of 40 to 240 microns. Four interchangeable filters have effective wavelengths of 60, 100, 160, and 200 microns. Three interchangeable lens sets give pixel sizes of 17, 27, and 45 in. Signals are processed through nitrogen-temperature JFET source-follower amplifiers, warm preamplifiers, and digital signal processors, and the system is controlled through a graphical user interface on a Macintosh computer. The camera has been used to image a wide variety of galactic and extragalactic far infrared sources.

Harper, D. AL, Jr.↗
DOE OSTI2023

In-pixel AI for lossy data compression at source for X-ray detectors

Integrating neural networks for data compression directly in the Read-Out Integrated Circuits (ROICs), i.e. the pixelated front-end, would result in a significant reduction in off-chip data transfer, overcoming the I/O bottleneck. Our ROIC test chip (AI-In-Pixel-65) is designed in a 65 nm Low Power CMOS process for the readout of pixelated X-ray detectors. Each pixel consists of an analog front-end for signal processing and a 10b analog-to-digital converter operating at 100KSPS. Here, we compare two non-reconfigurable techniques, Principal Component Analysis (PCA) and an AutoEncoder (AE) as lossy data compression engines implemented within the pixelated area. The PCA algorithm achieves 50$×$ compression, adds one clock cycle latency, and results in a 21% increase in the pixel area. The AE achieves 70$×$ compression, adds 30 clock cycle latency, and results in a similar area increase.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1973

Code-regenerative clean-up loop for a ranging transponder

Digital processing system phase locks on received ranging signal and creates clean replica of received ranging code. System is broadly applicable to variety of terrestrial ranging problems, including oceanic navigation.

Hurd, W. J.↗
NASA NTRS1987

A prototype 4800 bps voice terminal for the mobile satellite experiment

The authors report the final stage of a research project for the NASA mobile satellite experiment (MSAT-X). The work has resulted in two alternative coding techniques which have achieved good communications quality at 4.8 kb/s while tolerating vehicle noise, fading, and a fairly high-error-rate, bursty channel. The authors have constructed a circuit board based on three AT&T 32-bit floating-point DSP32 digital signal processors (DSP) and providing both excess processing power and considerable flexibility for handling different variations of the algorithms. A Motorola 68HC11 microcomputer chip serves as the board controller and interface handler. Mounted on a wirewrapped card, the prototype's circuit footprint amounts to only 225 cm2 and consumes about 13 W of power. A description is given of the architecture, signal processing and communication functions, circuitry, and firmware of the prototype. Issues such as synchronization, framing, error control, and modem interface are also addressed.

Chan, Wai-Yip↗
NASA NTRS1990

Integrated Optoelectronic Interface

Proposed optoelectronic integrated-circuit device serves as "universal" or standard interface for transmission and reception of digital and analog signals in communication, data-processing, and control systems. Eliminates need for custom design of interface circuitry in sense that it embodies "master-chip" design easily adaptable to use with specific equipment. Includes directly modulated semiconductor laser to generate light signals for transmission along optical fiber; positive/intrinsic/negative, avalanche, or other photodiode to detect light signals received along another optical fiber;and driving, synchronizing, preamplifying, and signal-regenerating circuitry. Muliplexes electronic signals before transmission and/or demultiplexes electronic signals after reception.

Katz, Joseph↗
NASA NTRS1989

Rapidly quantifying the relative distention of a human bladder

A device and method of rapidly quantifying the relative distention of the bladder in a human subject are disclosed. The ultrasonic transducer which is positioned on the subject in proximity to the bladder is excited by a pulser under the command of a microprocessor to launch an acoustic wave into the patient. This wave interacts with the bladder walls and is reflected back to the ultrasonic transducer, when it is received, amplified and processed by the receiver. The resulting signal is digitized by an analog-to-digital converter under the command of the microprocessor and is stored in the data memory. The software in the microprocessor determines the relative distention of the bladder as a function of the propagated ultrasonic energy; and based on programmed scientific measurements and individual, anatomical, and behavioral characterists of the specific subject as contained in the program memory, sends out a signal to turn on any or all of the audible alarm, the visible alarm, the tactile alarm, and the remote wireless alarm.

Companion, John A.↗
NASA NTRS1991

Rapidly quantifying the relative distention of a human bladder

A device and method was developed to rapidly quantify the relative distention of the bladder of a human subject. An ultrasonic transducer is positioned on the human subject near the bladder. A microprocessor controlled pulser excites the transducer by sending an acoustic wave into the human subject. This wave interacts with the bladder walls and is reflected back to the ultrasonic transducer where it is received, amplified, and processed by the receiver. The resulting signal is digitized by an analog to digital converter, controlled by the microprocessor again, and is stored in data memory. The software in the microprocessor determines the relative distention of the bladder as a function of the propagated ultrasonic energy. Based on programmed scientific measurements and the human subject's past history as contained in program memory, the microprocessor sends out a signal to turn on any or all of the available alarms. The alarm system includes and audible alarm, the visible alarm, the tactile alarm, and the remote wireless alarm.

Companion, John A.↗
NASA NTRS2008

Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Reinhart, Richard C.↗
NASA NTRS2015

Precision of FLEET Velocimetry Using High-Speed CMOS Camera Systems

Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 microseconds, precisions of 0.5 meters per second in air and 0.2 meters per second in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision HighSpeed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

Peters, Christopher J.↗