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At least 415 records · Page 23

Flexible Architecture for FPGAs in Embedded Systems

Commonly, field-programmable gate arrays (FPGAs) being developed in cPCI embedded systems include the bus interface in the FPGA. This complicates the development because the interface is complicated and requires a lot of development time and FPGA resources. In addition, flight qualification requires a substantial amount of time be devoted to just this interface. Another complication of putting the cPCI interface into the FPGA being developed is that configuration information loaded into the device by the cPCI microprocessor is lost when a new bit file is loaded, requiring cumbersome operations to return the system to an operational state. Finally, SRAM-based FPGAs are typically programmed via specialized cables and software, with programming files being loaded either directly into the FPGA, or into PROM devices. This can be cumbersome when doing FPGA development in an embedded environment, and does not have an easy path to flight. Currently, FPGAs used in space applications are usually programmed via multiple space-qualified PROM devices that are physically large and require extra circuitry (typically including a separate one-time programmable FPGA) to enable them to be used for this application. This technology adds a cPCI interface device with a simple, flexible, high-performance backend interface supporting multiple backend FPGAs. It includes a mechanism for programming the FPGAs directly via the microprocessor in the embedded system, eliminating specialized hardware, software, and PROM devices and their associated circuitry. It has a direct path to flight, and no extra hardware and minimal software are required to support reprogramming in flight. The device added is currently a small FPGA, but an advantage of this technology is that the design of the device does not change, regardless of the application in which it is being used. This means that it needs to be qualified for flight only once, and is suitable for one-time programmable devices or an application specific integrated circuit (ASIC). An application programming interface (API) further reduces the development time needed to use the interface device in a system.

Clark, Duane I.↗

Advanced EVA Suit Camera System Development Project

The National Aeronautics and Space Administration (NASA) at the Johnson Space Center (JSC) is developing a new extra-vehicular activity (EVA) suit known as the Advanced EVA Z2 Suit. All of the improvements to the EVA Suit provide the opportunity to update the technology of the video imagery. My summer internship project involved improving the video streaming capabilities of the cameras that will be used on the Z2 Suit for data acquisition. To accomplish this, I familiarized myself with the architecture of the camera that is currently being tested to be able to make improvements on the design. Because there is a lot of benefit to saving space, power, and weight on the EVA suit, my job was to use Altium Design to start designing a much smaller and simplified interface board for the camera's microprocessor and external components. This involved checking datasheets of various components and checking signal connections to ensure that this architecture could be used for both the Z2 suit and potentially other future projects. The Orion spacecraft is a specific project that may benefit from this condensed camera interface design. The camera's physical placement on the suit also needed to be determined and tested so that image resolution can be maximized. Many of the options of the camera placement may be tested along with other future suit testing. There are multiple teams that work on different parts of the suit, so the camera's placement could directly affect their research or design. For this reason, a big part of my project was initiating contact with other branches and setting up multiple meetings to learn more about the pros and cons of the potential camera placements we are analyzing. Collaboration with the multiple teams working on the Advanced EVA Z2 Suit is absolutely necessary and these comparisons will be used as further progress is made for the overall suit design. This prototype will not be finished in time for the scheduled Z2 Suit testing, so my time was also spent creating a case for the original interface board that is already being used. This design is being done by use of Creo 2. Due to time constraints, I may not be able to complete the 3-D printing portion of this design, but I was able to use my knowledge of the interface board and Altium Design to help in the task. As a side project, I assisted another intern in selecting and programming a microprocessor to control linear actuators. These linear actuators will be used to move various increments of polyethylene for controlled radiation testing. For this, we began the software portion of the project using the Arduino's coding environment to control an Arduino Due and H-Bridge components. Along with the obvious learning of computer programs such as Altium Design and Creo 2, I also acquired more skills with networking and collaborating with others, being able to multi-task because of responsibilities to work on various projects, and how to set realistic goals in the work place. Like many internship projects, this project will be continued and improved, so I also had the chance to improve my organization and communication skills as I documented all of my meetings and research. As a result of my internship at JSC, I desire to continue a career with NASA, whether that be through another internship or possibly a co-op. I am excited to return to my university and continue my education in electrical engineering because of all of my experiences at JSC.

Mock, Kyla↗

Modernization of the Control Systems of High-Frequency, Brush-Free, and Collector Exciters of Turbogenerators

Methods of modernizing the regulation systems of electric machinery exciters with high-frequency, brush-free, and collector exciters by means of microprocessor technology are examined. The main problems of modernization are to increase the response speed of a system and to use a system stabilizer to increase the stability of the power system.

24 POWER TRANSMISSION AND DISTRIBUTION↗

A fiber optic, ultraviolet light-emitting diode-based, two wavelength fluorometer for monitoring reactive adsorption

Construction and use of an ultraviolet light-emitting diode-based fluorometer for measuring photoluminescence (PL) from powder samples with a fiber optic probe is described. Fluorescence at two wavelengths is detected by miniature photomultiplier tubes, each equipped with a different band pass filter, whose outputs are analyzed by a microprocessor. Photoluminescent metal oxides and hydroxides, and other semiconducting nanoparticles, often undergo changes in their emission spectra upon exposure to reactive gases, and the ratio of the PL intensities at two wavelengths is diagnostic of adsorption. Use of this instrument for reactive gas sensing and gas filtration applications is illustrated by measuring changes in the PL ratio for zirconium hydroxide and zinc oxide particles upon exposure to air containing low concentrations of sulfur dioxide.

36 MATERIALS SCIENCE↗

Computer Electromagnetics and Supercomputer Architecture

The dramatic increase in performance over the last decade for microporcessor computations is compared with that for the supercomputer computations. This performance, the projected performance, and a number of other issues such as cost and the inherent pysical limitations in curent supercomputer technology have naturally led to parallel supercomputers and ensemble of interconnected microprocessors.

Electromagnetics Microprocessors Computers↗

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

Security-informed safety: integrating security within the safety demonstration of a smart device - 157

Safety and security engineering have, over the years, developed their own regulations, standards, cultures, and practices. However, there's a growing realisation that security is closely connected to safety. Safety must be security-informed: if a safety-critical system isn't secure, it isn't safe. A safety demonstration is incomplete and unconvincing unless it considers security. In our work for government and industry, we have used the Claims, Arguments, Evidence (CAE) framework to analyse the impact of security on a safety justification or safety case and identified the significant changes needed to address security explicitly. This will impact the design and implementation process as well as the assurance and V and V approach. In this paper we discuss the impact of integrating security when developing a safety demonstration of a smart device. A smart device is an instrument, device or component that contains a microprocessor (and therefore contains both hardware and software) and is programmed to provide specialised capabilities, often measuring or controlling a process variable. Examples of smart devices include radiation monitors, relays, turbine governors, uninterruptible power supplies and heating ventilation, and air conditioning controllers. (authors)

42 ENGINEERING↗

Investigation of instrumentation containing an embedded digital device - 257

The U.S. nuclear power industry primarily relies on mature, well-proven analog technology as the basis for most instrumentation and control (I and C) equipment employed in its nuclear power plants (NPPs). However, the market for this legacy instrumentation is very small and availability of such equipment for spare parts or replacement is increasingly limited. Frequently, modern I and C equipment contains embedded digital devices (EDDs), such as microprocessors and programmable logic devices. While the enhanced functional capabilities provided by the digital components offer improved performance, reliability, and maintainability, the corresponding complexity of sophisticated digital implementations also exacerbate concerns about an increased potential for undetected systematic faults, which can lead to common-cause failure (CCF). As part of a research project sponsored by the U.S. Department of Energy, an investigation has been conducted of commercially available instrumentation marketed for nuclear or industrial application. The objective was to identify the usage of EDDs and to determine the types of functional roles allocated to the devices. Examples of the equipment surveyed include smart sensors, sequencers for emergency diesel generators, pumps, valve actuators, motor control centers, breakers, priority logic modules, and uninterruptible power sources. Where sufficient detail was found, an evaluation was performed to ascertain the nature and role of the digital technology implemented in the instrumentation. The information gained through this investigation serves as technical input for defining a classification approach for EDDs based on the functional impact of the device. For example, the role of an EDD can involve any of the following functions: performance monitoring and diagnostics, information extraction and communication, instrument condition monitoring and protection, or execution of core instrument functions. Classifying digital devices according to their role in the operation of the instrumentation in which they are embedded can enable determination of the potential functional impact of failure of that device and contribute to determination of the potential safety significance of a CCF event disabling all instances of that device. This paper will report on the findings of the investigation of instrumentation with EDDs and indicate considerations for the emerging classification approach. The higher-level goal of this effort is to determine whether a graded approach to qualification testing may be possible based on classification. (authors)

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Development of a model based assessment process for qualification of embedded digital devices in NPP applications: research approach and current status - 263

The instrumentation and control (I and C) equipment used in currently operating U.S. nuclear power plants (NPPs) is primarily based on mature analog technologies that are progressing towards obsolescence. The continued reliance on this legacy analog technology, which is also being propagated into new NPP designs, imposes performance penalties and maintenance burdens in comparison with modern digital I and C instrumentation. In many instances, currently available I and C equipment contain embedded digital devices (EDDs) such as microprocessors and programmable logic devices. Experience in other industries, such as avionics, has shown that digital I and C equipment containing EDDs can provide significant benefits over analog-based equipment in terms of performance, reliability, and maintainability. In recent years, due to the high demand for digital technologies in the industrial I and C marketplace, it is becoming increasingly difficult for NPPs to acquire instrumentation that is not equipped with an EDD. However, the nuclear power industry has been slow to adopt digital technology, especially in safety-related systems, in large part as a result of regulatory concerns about common-cause failure (CCF) vulnerabilities of equipment with EDDs. Consequently, there is a clear need to develop cost effective qualification methods to contribute to the assessment of CCF vulnerability posed by EDDs in modern instrumentation that could be used in NPPs. This paper describes the research regarding qualification methods for equipment with EDDs that is sponsored by the Nuclear Energy Enabling Technologies (NEET) Advanced Sensors and Instrumentation (ASI) program of the U.S. Department of Energy (DOE). The purpose of the current research is to develop an effective approach employing science-based methods to resolve concerns about CCF vulnerability that serve to inhibit deployment of advanced instrumentation (e.g., sensors, actuators, microcontrollers) with EDDs in nuclear power applications. (authors)

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

High-precision control of tracked field robots in the presence of unknown traction coefficients

Accurate steering through crop rows that avoids crop damage is one of the most important tasks for agricultural robots utilized in various field operations, such as monitoring, mechanical weeding, or spraying. In practice, varying soil conditions can result in off-track navigation due to unknown traction coefficients so that it can cause crop damage. To address this problem, this work presents the development, application, and experimental results of a real-time receding horizon estimation and control (RHEC) framework applied to a fully autonomous mobile robotic platform to increase its steering accuracy. Recent advances in cheap and fast microprocessors, as well as advances in solution methods for nonlinear optimization problems, have made nonlinear receding horizon control (RHC) and receding horizon estimation (RHE) methods suitable for field robots that require high-frequency (milliseconds) updates. A real-time RHEC framework is developed and applied to a fully autonomous mobile robotic platform designed by the authors for in-field phenotyping applications in sorghum fields. Nonlinear RHE is used to estimate constrained states and parameters, and nonlinear RHC is designed based on an adaptive system model that contains time-varying parameters. The capabilities of the real-time RHEC framework are verified experimentally, and the results show an accurate tracking performance on a bumpy and wet soil field. Finally, the mean values of the Euclidean error and required computation time of the RHEC framework are equal to 0.0423 m and 0.88 ms, respectively.

42 ENGINEERING↗

Porting DMRG++ Scientific Application to OpenPOWER

With the rapidly changing microprocessor designs and architectural diversity (multi-cores, many-cores, accelerators) for the next generation HPC systems, scientific applications must adapt to the hardware, to exploit the different types of parallelism and resources available in the architecture. To get the benefit of all the in-node hardware threads, it is important to use a single programming model to map and coordinate the available work to the different heterogeneous execution units in the node (e.g., multi-core hardware threads (latency optimized), accelerators (bandwidth optimized), etc.).Our goal is to show that we can manage the node complexity of these systems by using OpenMP for in-node parallelization by exploiting different “programming styles” supported by OpenMP 4.5 to program CPU cores and accelerators. Finding out the suitable programming-style (e.g., SPMD style, multi-level tasks, accelerator programming, nested parallelism, or a combination of these) using the latest features of OpenMP to maximize performance and achieve performance portability across heterogeneous and homogeneous systems is still an open research problem.We developed a mini-application, Kronecker Product (KP), from the original DMRG++ application (sparse matrix algebra) computational motif to experiment with different OpenMP programming styles on an OpenPOWER architecture and present their results in this paper.

Chatterjee, Ronnie↗

Accelerating nuclear configuration interaction calculations through a preconditioned block iterative eigensolver

We describe a number of recently developed techniques for improving the performance of large-scalenuclear configuration interaction calculations on high performance parallel computers. We show thebenefit of using a preconditioned block iterative method to replace the Lanczos algorithm that hastraditionally been used to perform this type of computation. The rapid convergence of the block iterativemethod is achieved by a proper choice of starting guesses of the eigenvectors and the construction of aneffective preconditioner. These acceleration techniques take advantage of special structure of the nuclearconfiguration interaction problem which we discuss in detail. The use of a block method also allows usto improve the concurrency of the computation, and take advantage of the memory hierarchy of modernmicroprocessors to increase the arithmetic intensity of the computation relative to data movement. Wealso discuss the implementation details that are critical to achieving high performance on massivelyparallel multi-core supercomputers, and demonstrate that the new block iterative solver is two to threetimes faster than the Lanczos based algorithm for problems of moderate sizes on a Cray XC30 system.

Shao, Meiyue↗

Towards generic memory forensic framework for programmable logic controllers

A Programmable Logic Controller (PLC) is a microprocessor-based controller that is used to automate physical processes in critical infrastructure and various other industries and manufacturing sectors. Initially, PLCs were completely isolated from the Internet, and cyber security was not incorporated at the time of development. The introduction of industry 4.0 and the evolution of ICS systems to communicate over public IP addresses from the Internet enhanced productivity and efficiency, but Internet connectivity exposed the systems and their vulnerabilities, which led to an increase in cyber attacks. When a system is sabotaged/compromised, security analysts need to get to the root cause of the attack as quickly as possible to recover the system. To do so, memory forensic analysis is critical to provide a unique insight into the run-time memory activities and extract a reliable source of evidence. In this paper, we analyze the memory structure of the Schneider Electric Modicon M221 PLC. To build a memory profile, we reverse engineer the communication protocol and conduct differential analysis to gain knowledge about the structure of the memory and the low-level representation of control logic instructions. We then identify dynamic and static memory regions by modifying different project fields and conducting differential analysis, which allows us to identify boundaries of critical memory structures and extract important forensic artifacts that can be found in the memory. The Python implementation of the memory profile can help reduce the time and effort required for manual analysis in case of cyber incident or system failure.

97 MATHEMATICS AND COMPUTING↗

Autonomous nondestructive evaluation of resistance spot welded joints

The application of non-destructive evaluation approaches has attracted strong interests in modern automotive industries. Here, we present an autonomous deep-computing framework to analyze raw videos from infrared systems and to predict weld nugget shape and size with unprecedented accuracy and speed. In a comprehensive training and testing experiment with 90 videos (seven sets of welding material stack-ups), a new method was developed to assemble sufficient datasets for neural network training. Our framework successfully predicts all the nugget shapes with F1 scores that range from 0.84 to 0.92. The total training time on Nvidia DGX station takes less than 10 min for each set of welding material stack-up. The real inference time of an individual dataset (with 30 video frames) takes about 0.005 s. The procedure and methods developed in the study can be applied to other image-based weld property prediction, as well as other manufacturing processes. Furthermore, our well-trained neural networks take limited memory resources (2.3 MB) and are suitable for embedded microprocessors for in-situ welding quality control as edge computing within an intelligent welding framework.

42 ENGINEERING↗

A central role for cadherin signaling in cancer

Cadherins are homophilic adhesion molecules with important functions in cell-cell adhesion, tissue morphogenesis, and cancer. In epithelial cells, E-cadherin accumulates at areas of cell-cell contact, coalesces into macromolecular complexes to form the adherens junctions (AJs), and associates via accessory partners with a subcortical ring of actin to form the apical zonula adherens (ZA). As a master regulator of the epithelial phenotype, E-cadherin is essential for the overall maintenance and homeostasis of polarized epithelial monolayers. Its expression is regulated by a host of genetic and epigenetic mechanisms related to cancer, and its function is modulated by mechanical forces at the junctions, by direct binding and phosphorylation of accessory proteins collectively termed catenins, by endocytosis, recycling and degradation, as well as, by multiple signaling pathways and developmental processes, like the epithelial to mesenchymal transition (EMT). Nuclear signaling mediated by the cadherin associated proteins β-catenin and p120 promotes growth, migration and pluripotency. Receptor tyrosine kinase, PI3K/AKT, Rho GTPase, and HIPPO signaling, are all regulated by E-cadherin mediated cell-cell adhesion. Finally, the recruitment of the microprocessor complex to the ZA by PLEKHA7, and the subsequent regulation of a small subset of miRNAs provide an additional mechanism by which the state of epithelial cell-cell adhesion affects translation of target genes to maintain the homeostasis of polarized epithelial monolayers. Collectively, the data indicate that loss of E-cadherin function, especially at the ZA, is a common and crucial step in cancer progression. - Highlights: • General review of the cadherin-catenin complex. • Nuclear signaling events regulated by β-catenin, p120, and E-cadherin. • Cadherin dysfunction in cancer. • Crosstalk between cadherin complexes and the RNAi machinery.

60 APPLIED LIFE SCIENCES↗

Parallelized Kalman-Filter-Based Reconstruction of Particle Tracks on Many-Core Processors and GPUs

For over a decade now, physical and energy constraints have limited clock speed improvements in commodity microprocessors. Instead, chipmakers have been pushed into producing lower-power, multi-core processors such as Graphical Processing Units (GPU), ARM CPUs, and Intel MICs. Broad-based efforts from manufacturers and developers have been devoted to making these processors user-friendly enough to perform general computations. However, extracting performance from a larger number of cores, as well as specialized vector or SIMD units, requires special care in algorithm design and code optimization. One of the most computationally challenging problems in high-energy particle experiments is finding and fitting the charged-particle tracks during event reconstruction. This is expected to become by far the dominant problem at the High-Luminosity Large Hadron Collider (HL-LHC), for example. Today the most common track finding methods are those based on the Kalman filter. Experience with Kalman techniques on real tracking detector systems has shown that they are robust and provide high physics performance. This is why they are currently in use at the LHC, both in the trigger and offine. Previously we reported on the significant parallel speedups that resulted from our investigations to adapt Kalman filters to track fitting and track building on Intel Xeon and Xeon Phi. Here, we discuss our progresses toward the understanding of these processors and the new developments to port the Kalman filter to NVIDIA GPUs.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Parallelized Kalman-Filter-Based Reconstruction of Particle Tracks on Many-Core Architectures

Faced with physical and energy density limitations on clock speed, contemporary microprocessor designers have increasingly turned to on-chip parallelism for performance gains. Algorithms should accordingly be designed with ample amounts of fine-grained parallelism if they are to realize the full performance of the hardware. This requirement can be challenging for algorithms that are naturally expressed as a sequence of small-matrix operations, such as the Kalman filter methods widely in use in high-energy physics experiments. In the High-Luminosity Large Hadron Collider (HL-LHC), for example, one of the dominant computational problems is expected to be finding and fitting charged-particle tracks during event reconstruction; today, the most common track-finding methods are those based on the Kalman filter. Experience at the LHC, both in the trigger and offline, has shown that these methods are robust and provide high physics performance. Previously we reported the significant parallel speedups that resulted from our efforts to adapt Kalman-filter-based tracking to many-core architectures such as Intel Xeon Phi. Here we report on how effectively those techniques can be applied to more realistic detector configurations and event complexity.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗