Results for “Clock Synchronization” — Page 23

DOE OSTI2018

Quantum-authenticated clock signal

The present disclosure is directed to a system and method of distributing time information to enable synchronization in an authenticated manner via a quantum channel. A source device may transmit a timing signal, T on a communication channel from the source device to a receiver device. The timing signal T may be include a time or times stored in memory or calculated using a previously agreed upon formula. The method may include transmitting a quantum system Q from the source device to the receiver device. The quantum system may be prepared in a randomly chosen state and may be measured by the receiver device in a randomly chosen measurement basis.

47 OTHER INSTRUMENTATION↗

NASA NTRS2003

The Effects of Spaceflight on the Rat Circadian Timing System

Two fundamental environmental influences that have shaped the evolution of life on Earth are gravity and the cyclic changes occurring over the 24-hour day. Light levels, temperature, and humidity fluctuate over the course of a day, and organisms have adapted to cope with these variations. The primary adaptation has been the evolution of a biological timing system. Previous studies have suggested that this system, named the circadian (circa - about; dies - a day) timing system (CTS), may be sensitive to changes in gravity. The NASA Neurolab spaceflight provided a unique opportunity to evaluate the effects of microgravity on the mammalian CTS. Our experiment tested the hypotheses that microgravity would affect the period, phasing, and light sensitivity of the CTS. Twenty-four Fisher 344 rats were exposed to 16 days of microgravity on the Neurolab STS-90 mission, and 24 Fisher 344 rats were also studied on Earth as one-G controls. Rats were equipped with biotelemetry transmitters to record body temperature (T(sub b)) and heart rate (HR) continuously while the rats moved freely. In each group, 18 rats were exposed to a 24-hour light-dark (LD 12:12) cycle, and six rats were exposed to constant dim red-light (LL). The ability of light to induce a neuronal activity marker (c-fos) in the circadian pacemaker of the brain, the suprachiasmatic nucleus (SCN), was examined in rats studied on flight days two (FD2) and 14 (FD14), and postflight days two (R+1) and 14 (R+13). The flight rats in LD remained synchronized with the LD cycle. However, their T(sub b), rhythm was markedly phase-delayed relative to the LD cycle. The LD flight rats also had a decreased T(sub b) and a change in the waveform of the T(sub b) rhythm compared to controls. Rats in LL exhibited free-running rhythms of T(sub b), and HR; however, the periods were longer in microgravity. Circadian period returned to preflight values after landing. The internal phase angle between rhythms was different in flight than in one-G. Compared with control rats, the flight rats exhibited no change in HR. Finally, the LD FD2 flight rats demonstrated a reduced sensitivity to light as shown by significantly reduced c-fos expression in the SCN in comparison with controls. These findings constitute the first demonstration that microgravity affects the fundamental properties of the mammalian circadian timing system, specifically by influencing the clock's period, and its ability to maintain temporal organization and phase angle of synchronization to an external LD cycle.

Fuller, Charles A.↗

NASA NTRS1985

Efficient implementation of real-time programs under the VAX/VMS operating system

Techniques for writing efficient real-time programs under the VAX/VMS oprating system are presented. Basic operations are presented for executing at real-time priority and for avoiding needlless processing delays. A highly efficient technique for accessing physical devices by mapping to the input/output space and accessing the device registrs directly is described. To illustrate the application of the technique, examples are included of different uses of the technique on three devices in the Langley Avionics Integration Research Lab (AIRLAB): the KW11-K dual programmable real-time clock, the Parallel Communications Link (PCL11-B) communication system, and the Datacom Synchronization Network. Timing data are included to demonstrate the performance improvements realized with these applications of the technique.

Johnson, S. C.↗

NASA NTRSDate not supplied

The Design of a Flexible, Interoperable Navigation Signal for Future Lunar Missions

The LunaNet Interoperability Specification (LNIS) is a set of standards currently under development by NASA, ESA, and JAXA, which define a common, interoperable set of services and interfaces for lunar communication and navigation. The LNIS includes specifications for the GNSS-like Augmented Forward Signal (AFS). The LANS (Lunar Augmented Navigation Service) will be comprised of Multiple LunaNet Service Provider (LNSP) nodes broadcasting the AFS, such as NASA’s LCRNS (Lunar Communications Relay and Navigation Systems), ESA’s Moonlight LCNS (Lunar Communication and Navigation Services) and the Japan LNSS (Lunar Navigation Satellite System). The LANS will provide a GNSS-like capability enabling orbiting and surface users in lunar space (such as Artemis) to estimate their position, velocity and time as described in Giordano et al., (2023). Initial capabilities will focus on providing service to the lunar South pole region. The specification of AFS defines two orthogonal signal components on a single carrier, with the in-phase component (AFS-I) being a lower-chip-rate data channel tailored for applications where low SWaP is critical (e.g., IoT devices or search and rescue), and the quadrature component (AFS-Q) being a high-chip-rate data-less pilot signal for high-precision, robust lunar navigation and positioning applications. An initial description of AFS was provided in the LNIS, (2023), and initial analysis results were shown in Dafesh, et al., (2024). In this work, we provide rationale for updates to the LNIS that define key aspects of the signal including the primary spreading code designs for the data and pilot channels, and a three-tiered overlay code approach for the pilot channel that provides flexible signal acquisition alternatives, rapid time dissemination and robust frame Sync. The paper also describes a robust data sync word that is designed to enable frame Sync. for low-SWaP receivers that only use the I channel, as well as a low-density parity check code (LDPC) data message encoding design and interleaving definition. The work further describes the impact of the updated AFS design in terms of improved acquisition performance, interference resistance, navigation message capabilities and rapid absolute time dissemination for users able to access clock and ephemeris data over an external network. The cross-correlation and synchronization performance of the AFS design is also compared to potential alternatives, further providing rationale for the final signal design configuration.

LANS↗

NASA NTRS2025

The Design of a Flexible, Interoperable Navigation Signal for Future Lunar Missions

The LunaNet Interoperability Specification (LNIS) is a set of standards currently under development by NASA, ESA, and JAXA, which define a common, interoperable set of services and interfaces for lunar communication and navigation. The LNIS includes specifications for the GNSS-like Augmented Forward Signal (AFS). The LANS (Lunar Augmented Navigation Service) will be comprised of Multiple LunaNet Service Provider (LNSP) nodes broadcasting the AFS, such as NASA’s LCRNS (Lunar Communications Relay and Navigation Systems), ESA’s Moonlight LCNS (Lunar Communication and Navigation Services) and the Japan LNSS (Lunar Navigation Satellite System). The LANS will provide a GNSS-like capability enabling orbiting and surface users in lunar space (such as Artemis) to estimate their position, velocity and time as described in Giordano et al., (2023). Initial capabilities will focus on providing service to the lunar South pole region. The specification of AFS defines two orthogonal signal components on a single carrier, with the in-phase component (AFS-I) being a lower-chip-rate data channel tailored for applications where low SWaP is critical (e.g., IoT devices or search and rescue), and the quadrature component (AFS-Q) being a high-chip-rate data-less pilot signal for high-precision, robust lunar navigation and positioning applications. An initial description of AFS was provided in the LNIS, (2023), and initial analysis results were shown in Dafesh, et al., (2024). In this work, we provide rationale for updates to the LNIS that define key aspects of the signal including the primary spreading code designs for the data and pilot channels, and a three-tiered overlay code approach for the pilot channel that provides flexible signal acquisition alternatives, rapid time dissemination and robust frame Sync. The paper also describes a robust data sync word that is designed to enable frame Sync. for low-SWaP receivers that only use the I channel, as well as a low-density parity check code (LDPC) data message encoding design and interleaving definition. The work further describes the impact of the updated AFS design in terms of improved acquisition performance, interference resistance, navigation message capabilities and rapid absolute time dissemination for users able to access clock and ephemeris data over an external network. The cross-correlation and synchronization performance of the AFS design is also compared to potential alternatives, further providing rationale for the final signal design configuration.

LunaNet↗

DOE OSTI2023

Sampling synchronization through GPS signals

A method uses a distributed data acquisition system with multiple, physically unconnected, data acquisition units, that can be in wireless communication with a remote host, to timestamp measurement data with sub-microsecond time base accuracy of sampling clock relative to an absolute timeframe. A current absolute time is derived from messages received from a satellite radio beacon positioning system (GPS). Measurement data is sampled by each unit at a specified sampling rate. Using hardware logic, batches of sampled data are associated with corresponding timestamps representing the absolute time at which the data was sampled. Data and timestamps may be transmitted to the host. A time offset bias is compensated by comparing timestamps against a nominal time based on start time and nominal sampling rate. The sampling clock rate may be disciplined using time pulses from the GPS receiver. An initial start of data sampling by all units can also be synchronized.

Zhuge, James Q.↗

NASA NTRS1983

One nanosecond time synchronization using series and GPS

Subnanosecond time sychronization between two remote rubidium frequency standards is verified by a traveling clock comparison. Using a novel, code ignorant Global Positioning System (GPS) receiver developed at JPL, the SERIES geodetic baseline measurement system is applied to establish the offset between the 1 Hz. outputs of the remote standards. Results of the two intercomparison experiments to date are presented as well as experimental details.

Buennagel, A. A.↗

NASA NTRS1980

Critique of the Hughes Aircraft shuttle Ku band leading edge bit synchronizer

A bit synchronizer is analyzed via timing diagrams in a noise-free environment. It is believed that this new bit synchronizer will track the rising edge of the data bits with 25% asymmetry and up to a 90 deg phase shift between the received clock and data bit timing. In addition, the data bits will be demodulated correctly. It is not true that phase shifts larger than 90 deg will necessarily be corrected by this bit synchronizer. However, the specifications currently require the loop to operate over only a + or - 75 deg phase shift between the received data stream leading edges and the bit synchronizer leading edges; consequently, there should be no problem.

Holmes, J. K.↗

DOE OSTI2016

Three-phase Four-leg Inverter LabVIEW FPGA Control Code [SWR-16-26]

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The use of cRIO and sbRIO for power electronics control has developed over the last few years to include control of three-phase inverters. Most three-phase inverter topologies include three switching legs. The addition of a fourth-leg to natively generate the neutral connection allows the inverter to serve single-phase loads in a microgrid or stand-alone power system and to balance the three-phase voltages in the presence of significant load imbalance. However, the control of a four-leg inverter is much more complex. In particular, instead of standard two-dimensional space vector modulation (SVM), the inverter requires three-dimensional space vector modulation (3D-SVM). The candidate software implements complete control algorithms in LabVIEW FPGA for a three-phase four-leg inverter. The software includes feedback control loops, three-dimensional space vector modulation gate-drive algorithms, advanced alarm handling capabilities, contactor control, power measurements, and debugging and tuning tools. The feedback control loops allow inverter operation in AC voltage control, AC current control, or DC bus voltage control modes based on external mode selection by a user or supervisory controller. The software includes the ability to synchronize its AC output to the grid or other voltage-source before connection. The software also includes provisions to allow inverter operation in parallel with other voltage regulating devices on the AC or DC buses. This flexibility allows the Inverter to operate as a stand-alone voltage source, connected to the grid, or in parallel with other controllable voltage sources as part of a microgrid or remote power system. In addition, as the inverter is expected to operate under severe unbalanced conditions, the software includes algorithms to accurately compute real and reactive power for each phase based on definitions provided in the IEEE Standard 1459: IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or Unbalanced Conditions. Finally, the software includes code to output analog signals for debugging and for tuning of control loops. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, user-settable switching frequencies and synchronized control loop update rates of tens of kHz, and reference waveform generation, including Phase Lock Loop (PLL), update rate of 100 kHz.

Martin, Gregory↗

DOE OSTI2025

OpenSAMPL

OpenSAMPL (Open Synchronization Analytics and Monitoring PLatform) is a Python framework for processing, loading, and managing clock probe time series data and metadata from different vendors.

Grant, Josh [Oak Ridge National Laboratory (ORNL),↗

NASA NTRS1973

Synchronous ten-megabit biphase detector

Synchronous phase-lock-loop detector accepts distorted input and generates jitter-free clock. Data-detection circuitry takes advantage of this clock and employs integrate-and-dump decision circuit to provide near-theoretically ideal data decoding.

Balliet, L.↗

NASA NTRS1990

Word timing recovery in direct detection optical PPM communication systems with avalanche photodiodes using a phase lock loop

A technique for word timing recovery in a direct-detection optical PPM communication system is described. It tracks on back-to-back pulse pairs in the received random PPM data sequences with the use of a phase locked loop. The experimental system consisted of an 833-nm AlGaAs laser diode transmitter and a silicon avalanche photodiode photodetector, and it used Q = 4 PPM signaling at source data rate 25 Mb/s. The mathematical model developed to describe system performance is shown to be in good agreement with the experimental measurements. Use of this recovered PPM word clock with a slot clock recovery system caused no measurable penalty in receiver sensitivity. The completely self-synchronized receiver was capable of acquiring and maintaining both slot and word synchronizations for input optical signal levels as low as 20 average detected photons per information bit. The receiver achieved a bit error probability of 10 to the -6th at less than 60 average detected photons per information bit.

Sun, Xiaoli↗

NASA NTRS2000

First-Generation Jet Propulsion Laboratory "Hockey-Puck" Free-Flying Magnetometers for Distributed In-Situ Multiprobe Measurement of Current Density Filamentation in the Northern Auroral Zone: Enstrophy Mission

The sub-orbital rocket mission was a collaborative project between the University of New Hampshire, Cornell University, and the Jet Propulsion Laboratory (JPL) to study filamentation phenomena in the northern Auroral zone. The Enstrophy mission test flies the JPL Free-Flying Magnetometer (FFM) concept. The FFM technology development task has been funded by NASA develop miniaturized, low-power, integrated "sensorcrafts". JPL's role was to design, integrate, test, and deliver four FFMs for deployment from the sounding rocket, allowing a unique determination of curl-B. This provides a direct measurement of magnetic-field-aligned current density along the rocket trajectory. A miniaturized three-axis fluxgate magnetometer was integrated with a 4-channel 22-bit sigma-delta Analog to Digital Converter (ADC), four temperature sensors, digital control electronics, seven (Li-SOCl2) batteries, two (4 deg x 170 deg field of view) sun-sensors, a fan-shaped-beam laser diode beacon, a (16 MHz) stable Temperature Compensated Crystal Oscillator (TCXO) clock, Radio Frequency (RF) communication subsystem, and an antenna for approximately 15 minutes of operation where data was collected continuously and transmitted in three (3) bursts (approximately 26 seconds each) to ground station antennas at Poker Flat, Alaska. FFMs were stowed within two trays onboard the rocket during the rocket launch and were released simultaneously using the spinning action of the rocket at approximately 300 km altitude (approximately 100 sec. into the flight). FFMs were deployed with spin rate of approximately 17 Hz and approximately 3 m/sec linear velocity with respect to the rocket. For testing purposes while the rocket was in the launch pad and during flight prior to release of FFMs from the rocket, commands (such as "power on", "test", "flight", "power off', and clock "Reset" signal) were transmitted via a infrared Light Emitting Diode to an infrared detector in the FFM. Special attention was paid to low magnetic signature electronic design and choice of materials in packaging. The miniaturized fluxgate magnetometers had a range of 1-60000 nT with 0.1% full-scale linearity. The frequency range of interest for magnetic measurement was 10 mHz - 50 Hz. Digital data from the magnetometer's three axes were placed in a 4MB Static Random Access Memory (SRAM) in data packages (frames) formatted together with time tags and frame ID. After a specified time was elapsed, the data were Viterbi encoded and transmitted at a rate of 100 kbps (BPSK). Each of the four FFMs transmitted at different frequency. These carrier frequencies were in the range of 2200-2300 MHz. The antenna was a single patch on a high dielectric constant substrate covering one end-plate of the hockey-puck-sized unit. The local clocks aboard the FFMs were reset at the start of the mission and stayed synchronized within 3 msec during the mission. Position of each FFM with respect to the rocket is calculated by the knowledge of its release velocity (measured at exit point of the FFM launcher tract) providing an accuracy of 1 m over the maximum range of 3 km. Spatial and temporal nature of observants can be separated to within 3 m in space or 3 msec time interval.

Javadi, H.↗

NASA NTRS1996

Dose-response relationships for resetting of human circadian clock by light

Since the first report in unicells, studies across diverse species have demonstrated that light is a powerful synchronizer which resets, in an intensity-dependent manner, endogenous circadian pacemakers. Although it is recognized that bright light (approximately 7,000 to 13,000 lux) is an effective circadian synchronizer in humans, it is widely believed that the human circadian pacemaker is insensitive to ordinary indoor illumination (approximately 50-300 lux). It has been proposed that the relationship between the resetting effect of light and its intensity follows a compressive nonlinear function, such that exposure to lower illuminances still exerts a robust effect. We therefore undertook a series of experiments which support this hypothesis and report here that light of even relatively low intensity (approximately 180 lux) significantly phase-shifts the human circadian pacemaker. Our results clearly demonstrate that humans are much more sensitive to light than initially suspected and support the conclusion that they are not qualitatively different from other mammals in their mechanism of circadian entrainment.

NASA Discipline Regulatory Physiology↗

NASA NTRS1985

Fast Clock Recovery for Digital Communications

Circuit extracts clock signal from random non-return-to-zero data stream, locking onto clock within one bit period at 1-gigabitper-second data rate. Circuit used for synchronization in opticalfiber communications. Derives speed from very short response time of gallium arsenide metal/semiconductor field-effect transistors (MESFET's).

Tell, R. G.↗

NASA NTRS1995

High accuracy time transfer synchronization

In July 1994, the U.S. Naval Observatory (USNO) Time Service System Engineering Division conducted a field test to establish a baseline accuracy for two-way satellite time transfer synchronization. Three Hewlett-Packard model 5071 high performance cesium frequency standards were transported from the USNO in Washington, DC to Los Angeles, California in the USNO's mobile earth station. Two-Way Satellite Time Transfer links between the mobile earth station and the USNO were conducted each day of the trip, using the Naval Research Laboratory(NRL) designed spread spectrum modem, built by Allen Osborne Associates(AOA). A Motorola six channel GPS receiver was used to track the location and altitude of the mobile earth station and to provide coordinates for calculating Sagnac corrections for the two-way measurements, and relativistic corrections for the cesium clocks. This paper will discuss the trip, the measurement systems used and the results from the data collected. We will show the accuracy of using two-way satellite time transfer for synchronization and the performance of the three HP 5071 cesium clocks in an operational environment.

Wheeler, Paul J.↗

NASA NTRS1976

Charge coupled device integration-time coding for detection of images moving with unknown velocities

Existing techniques for the detection of a moving low light level image by a CCD array have required velocity synchronism between the image and the photogenerated charges. This was necessary to prevent blurring during the long duration of charge integration. A new detection scheme is described which causes the image to be convolved with a clock modulation signal as the photocharges are collected. The charge accumulating from each image point will now be spread over many photoelements due to the absence of velocity synchronism, but the output is not blurred in the usual sense. Instead the charge is distributed through the array in a controlled way so that the image can be reconstructed.

White, J. M.↗

DOE OSTI2016

Dual Active Bridge based DC Transformer LabVIEW FPGA Control Code [SWR-16-25]

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The candidate software implements complete control algorithms in LabVIEW FPGA for a DC Transformer (DCX) based on a dual active bridge (DAB). A DCX is an isolated bi-directional DC-DC converter designed to operate at unity conversion ratio, M, defined by where Vin is the primary-side DC bus voltage, Vout is the secondary-side DC bus voltage, and n is the turns ratio of the embedded high frequency transformer (HFX). The DCX based on a DAB incorporates two H-bridges, a resonant inductor, and an HFX to provide this functionality. The candidate software employs phase-shift modulation of the two H-bridges and a feedback loop to regulate the conversion ratio at unity. The software also includes alarm-handling capabilities as well as debugging and tuning tools. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, and user-settable switching frequencies and synchronized control loop update rates of tens of kHz.

Source record↗