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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Implementation of a Loosely-Coupled Lockstep Approach in the Xilinx Zynq-7000 All Programmable SoC? for High Consequence Applications.
Abstract not provided.
Digitization of Analog Signals using a Field Programmable Gate Array (FPGA)
The idea of this research is consolidating the electrical components used for capturing data in the Mu2e Tracker. Ideally, an FPGA will serve as the Time-Division Converters (TDC) and Analog-to-Digital Converters (ADC). The TDC is already being carried out by the FPGA, but we are still using off the shelf ADCs. This poster proposes using Low Voltage Differential Signaling as the basis for analog-to-digital conversion using and FPGA.
Design of a FASTBUS Programmable Sequencer Module and Memory Module
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Universal File Processing Program for Field Programmable Integrated Circuits
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PROGRAMMABLE SYNCHRONIZATION UNIT
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Programmable Synchronous Communications Module
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A PROGRAMMABLE DELAY UNIT INCORPORATING A SEMICUSTOM INTEGRATED CIRCUIT
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Programmable DSP-Based Multi-Bunch Feedback - Operating Experience from Six Installations
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Apparatus and method for fusion of compute and switching functions of exascale system into a single component by using configurable network-on-chip fabric with distributed dual mode input-output ports and programmable network interfaces
Described is an apparatus which comprises: a Network-On-Chip fabric using crossbar switches, having distributed ingress and egress ports; and a dual-mode network interface coupled to at least one crossbar switch, the dual-mode network interface is to include: a dual-mode circuitry; a controller operable to: configure the dual-mode circuitry to transmit and receive differential signals via the egress and ingress ports, respectively, and configure the dual-mode circuitry to transmit and receive signal-ended signals via the egress and ingress ports, respectively.
Responsive Programmable Assembly of Active Colloids for Functional Materials.
Abstract not provided.
Commercial Field-Programmable Gate Arrays for Space Processing Applications.
Abstract not provided.
Microbial consortia for programmable output via photoautotroph-heterotroph interactions
Self-sustained, safe, stable and scalable microbial consortia (S 5 MicroCon) are described. The microbial consortia are regulated by photoautotroph-heterotroph interactions and RNA aptamer-based gene circuits. A rapid, high-throughput method for engineering RNA aptamer-based gene circuits (e.g. riboswitches) is also described.
Configuration of the Xilinx Zynq-7000 All Programmable SoC Memory Resources for Loosely-Coupled Lockstep Applications.
Abstract not provided.
Configuration of the Xilinx Zynq-7000 All Programmable SoC Memory Resources for Loosely-Coupled Multiprocessor Lockstep Applications.
Abstract not provided.
Field programmable gate array bitstream verification
Described herein are various technologies pertaining to confirming an integrity of a FPGA. A verifier circuit is placed into an FPGA bitstream to enable external verification of the FPGA configuration in real time without requiring readout of the FPGA configuration itself. Number generators are utilized to generate a key which is shared between the FPGA and an external verification component (VC). The key is utilized to configure an initial state of sequence registers respectively located on both the FPGA and the VC. When the FPGA is operating with an approved configuration, output from the sequence registers at the FPGA and the VC are the same.