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At least 397 records · Page 22

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

Technology Evaluation↗

The NASA Electronic Parts and Packaging (NEPP) Program: An Overview

This presentation provides an overview of the NEPP Program. The NEPP Mission is to provide guidance to NASA for the selection and application of microelectronics technologies; Improve understanding of the risks related to the use of these technologies in the space environment; Ensure that appropriate research is performed to meet NASA mission assurance needs. NEPP's Goals are to provide customers with appropriate and cost-effective risk knowledge to aid in: Selection and application of microelectronics technologies; Improved understanding of risks related to the use of these technologies in the space environment; Appropriate evaluations to meet NASA mission assurance needs; Guidelines for test and application of parts technologies in space; Assurance infrastructure and support for technologies in use by NASA space systems.

NASA Electronic Parts and Packaging (NEPP) Program↗

Clementine Engineering Experiments Program.

Spacecraft must survive and operate reliably in the space environment for long periods of time. Radiation, temperature variations, spacecraft charging, surface contamination, and micrometeoroids/space debris all present environmental challenges to spacecraft missions. The environmental issues associated with these effects require in-situ space experiments to properly quantify the environment and its effects. To obtain data on specific microelectronic and sensor systems in the space environment, several engineering experiments were developed for the Clementine spacecraft and the Clementine lunar transfer booster or Interstage Adapter Satellite (ISAS). These platforms allowed testing of advanced spacecraft microelectronic and sensor devices in a lunar transfer orbit that intersects Earth's radiation belts and debris environment and in interplanetary space where direct exposure to solar flares, Galactic Cosmic Rays, and micrometeoroids was possible. A suite of experiments was developed by the Naval Research Laboratory (NRL), the Jet Propulsion Laboratory (JPL), NASA Langley Research Center (LaRC), the Aerospace Corporation, and NASA Goddard Space Flight Center (GSFC) to investigate in detail specific radiation and environmental reliability issues. This paper presents an introduction to the issues being investigated, the instruments provided for the mission, and the rationale for the engineering program.

Spacecraft↗

Recent Radiation Effects Activities at JPL: Coping with COTS

The rediation effects and testing programs in place at the Jet Propulsion Laboratory support the insertion of traditional, advanced, and emerging microelectronic and photonic technologies in NASA systems through research and testing that enhances the radiation hardness assurance (RHA) of these technologies. With the decreasing availability of radiation hardened electronics and the new NASA paradigm of faster, more aggressive and less expensive space missions, there has been an increasing emphasis on using high performance commercial microelectronic parts and circuits in NASA spacecraft.

radiation↗

Learning From Failure: Boosting Cycling Endurance of Optical Phase Change Materials

Chalcogenide phase change materials (PCMs) are a unique class of compounds whose switchable optical and electronic properties have fueled an explosion of emerging applications in microelectronics and microphotonics. Key to any application is the ability of PCMs to reliably switch between crystalline and amorphous states over a large number of cycles. While this issue has been extensively studied in the case of microelectronic memories, current PCM-based optical devices suffer from much inferior endurance. To understand the failure mechanisms limiting endurance of PCMs specifically in microphotonic devices, we have developed an on-chip resistive micro-heater platform and an automatic multi-modal characterization system to analyze cycling performance of optical PCMs. Reversible switching of large-area PCM devices over 50,000 cycles was demonstrated.

Optical phase change material↗

Experimental Determination of the Sn-Cu-Ni Phase Diagram for Pb-Free Solder Applications

The rapid increase of scrapped electrical products disposed in landfill sites is significantly influencing the environment because of the composition of the associated components. This situation has been the stimulus for the international community to issue a directive to prohibit the use of Pb-containing solders in electronic devices and effectively ban such products on the market. The Sn-Cu-Ni has become increasingly significant as it is used in several solder alloys and more generally both Cu and Ni are common substrates that interact with Sn-based solders in microelectronic applications. However, there is currently an insufficient understanding of the phase equilibria and the associated phase diagrams of many Sn alloys. The present work implemented an experimental methodology to obtain high accuracy results for the phase equilibria between one liquid and one or two intermetallic compounds. The Sn-Cu-Ni and the associated Sn-Cu and Sn-Ni binary systems have been re-evaluated and compared with the literature. The liquidus and the invariant lines were determined for the Sn-Cu-Ni ternary at the temperatures ranges of between 240 °C and 270 °C. The result will contribute to filling phase equilibria data gaps in the Sn-rich corner of the Sn-Cu-Ni alloy system.

36 MATERIALS SCIENCE↗

Thermal stability of antiferroelectric-like Al:HfO 2 thin films with TiN or Pt electrodes

HfO 2 -based antiferroelectric-like thin films are increasingly being considered for commercial devices. However, even with initial promise, the temperature sensitivity of electrical properties such as loss tangent and leakage current remains unreported. 50 nm thick, 4 at. % Al-doped HfO 2 thin films were synthesized via atomic layer deposition with both top and bottom electrodes being TiN or Pt. A study of their capacitance vs temperature showed that the Pt/Al:HfO 2 /Pt had a relative dielectric permittivity of 23.30 ± 0.06 at room temperature with a temperature coefficient of capacitance (TCC) of 78 ± 86 ppm/°C, while the TiN/Al:HfO 2 /TiN had a relative dielectric permittivity of 32.28 ± 0.14 at room temperature with a TCC of 322 ± 41 ppm/°C. The capacitance of both devices varied less than 6% over 1 to 1000 kHz from –125 to 125 °C. Both capacitors maintained loss tangents under 0.03 and leakage current densities of 10 –9 –10 –7 A/cm 2 between –125 and 125 °C. The TiN/Al:HfO 2 /TiN capacitor maintained an energy storage density (ESD) of 18.17 ± 0.79 J/cm 3 at an efficiency of 51.79% ± 2.75% over the –125 to 125 °C range. The Pt/Al:HfO 2 /Pt capacitor also maintained a stable ESD of 9.83 ± 0.26 J/cm 3 with an efficiency of 62.87% ± 3.00% over the same temperature range. Finally, such low losses in both capacitors along with their thermal stability make antiferroelectric-like, Al-doped HfO 2 thin films a promising material for temperature-stable microelectronics.

36 MATERIALS SCIENCE↗

Thermoelectric coolers for high-power-density 3D electronics heat management

Future advancements in three-dimensional (3D) electronics require robust thermal management methodology. Thermoelectric coolers (TECs) are reliable and solid-state heat pumping devices with high cooling capacity that can meet the requirements of emerging 3D microelectronic devices. In this work, we first provide the design of TECs for electronics cooling using a computational model and then experimentally validate the main predictions. Key device parameters such as device thickness, leg density, and contact resistance were studied to understand their influence on the performance of TECs. Our results show that it is possible to achieve high cooling power density through optimization of TE leg height and packing density. Scaling of TECs is shown to provide ultra-high cooling power density.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

A Perspective on ferroelectricity in hafnium oxide: Mechanisms and considerations regarding its stability and performance

Ferroelectric hafnium oxides are poised to impact a wide range of microelectronic applications owing to their superior thickness scaling of ferroelectric stability and compatibility with mainstream semiconductors and fabrication processes. For broad-scale impact, long-term performance and reliability of devices using hafnia will require knowledge of the phases present and how they vary with time and use. In this Perspective article, the importance of phases present on device performance is discussed, including the extent to which specific classes of devices can tolerate phase impurities. Following, the factors and mechanisms that are known to influence phase stability, including substituents, crystallite size, oxygen point defects, electrode chemistry, biaxial stress, and electrode capping layers, are highlighted. Herein, discussions will focus on the importance of considering both neutral and charged oxygen vacancies as stabilizing agents, the limited biaxial strain imparted to a hafnia layer by adjacent electrodes, and the strong correlation of biaxial stress with resulting polarization response. Areas needing additional research, such as the necessity for a more quantitative means to distinguish the metastable tetragonal and orthorhombic phases, quantification of oxygen vacancies, and calculation of band structures, including defect energy levels for pure hafnia and stabilized with substituents, are emphasized.

36 MATERIALS SCIENCE↗

Voltage waveform tailoring for high aspect ratio plasma etching of SiO 2 using Ar/CF 4 /O 2 mixtures: Consequences of low fundamental frequency biases

The use of non-sinusoidal waveforms in low pressure capacitively coupled plasmas intended for microelectronics fabrication has the goal of customizing ion and electron energy and angular distributions to the wafer. One such non-sinusoidal waveform uses the sum of consecutive harmonics of a fundamental sinusoidal frequency, f 0 , having a variable phase offset between the fundamental and even harmonics. In this paper, we discuss results from a computational investigation of the relation between ion energy and DC self-bias when varying the fundamental frequency f 0 for capacitively coupled plasmas sustained in Ar/CF 4 /O 2 and how those trends translate to a high aspect ratio etching of trenches in SiO 2 . The fundamental frequency, f 0 , was varied from 1 to 10 MHz and the relative phase from 0° to 180°. Two distinct regimes were identified. Average ion energy onto the wafer is strongly correlated with the DC self-bias at high f 0 , with there being a maximum at φ = 0° and minimum at φ = 180°. In the low frequency regime, this correlation is weak. Average ion energy onto the wafer is instead dominated by dynamic transients in the applied voltage waveforms, with a maximum at φ = 180° and minimum at φ = 0°. The trends in ion energy translate to etch properties. In both, the high and low frequency regimes, higher ion energies translate to higher etch rates and generally preferable final features, though behaving differently with phase angle.

36 MATERIALS SCIENCE↗

Effect of fabrication processes on BaTiO 3 capacitor properties

There is an increasing desire to utilize complex functional electronic materials such as ferroelectrics in next-generation microelectronics. As new materials are considered or introduced in this capacity, an understanding of how we can process these materials into those devices must be developed. Here, the effect of different fabrication processes on the ferroelectric and related properties of prototypical metal oxide (SrRuO 3 )/ferroelectric (BaTiO 3 )/metal oxide (SrRuO 3 ) heterostructures is explored. Two different types of etching processes are studied, namely, wet etching of the top SrRuO 3 using a NaIO 4 solution and dry etching using an Ar + -ion beam (i.e., ion milling). Polarization-electric-field hysteresis loops for capacitors produced using both methods are compared. For the ion-milling process, it is found that the Ar + beam can introduce defects into the SrRuO 3 /BaTiO 3 /SrRuO 3 devices and that the milling depth strongly influences the defect level and can induce a voltage imprint on the function. Realizing that such processing approaches may be necessary, work is performed to ameliorate the imprint of the hysteresis loops via ex situ “healing” of the process-induced defects by annealing the ferroelectric material in a barium-and-oxygen-rich environment via a chemical-vapor-deposition-style process. This work provides a pathway for the nanoscale fabrication of these candidate materials for next-generation memory and logic applications.

36 MATERIALS SCIENCE↗

Embracing disorder in quantum materials design

Many of the most exciting materials discoveries in fundamental condensed matter physics are made in systems hosting some degree of intrinsic disorder. While disorder has historically been regarded as something to be avoided in materials design, it is often of central importance to correlated and quantum materials. This is largely driven by the conceptual and theoretical ease to handle, predict, and understand highly uniform systems that exhibit complex interactions, symmetries, and band structures. In this Perspective, we highlight how flipping this paradigm has enabled exciting possibilities in the emerging field of high entropy materials, focusing primarily on high entropy oxide and chalcogenide quantum materials. These materials host high levels of cation or anion compositional disorder while maintaining unexpectedly uniform single crystal lattices. The diversity of atomic scale interactions of spin, charge, orbital, and lattice degrees of freedom are found to emerge into coherent properties on much larger length scales. Thus, altering the variance and magnitudes of the atomic scale properties through elemental selection can open new routes to tune global correlated phases, such as magnetism, metal–insulator transitions, ferroelectricity, and even emergent topological responses. The strategy of embracing disorder in this way provides a much broader pallet from which functional states can be designed for next-generation microelectronic and quantum information systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS↗

Surrogate models to optimize plasma-assisted atomic layer deposition in high aspect ratio features

In this work, we explore surrogate models to optimize plasma enhanced atomic layer deposition (PEALD) in high aspect ratio features. In plasma-based processes such as PEALD and atomic layer etching (ALE), surface recombination can dominate the reactivity of plasma species with the surface, which can lead to unfeasibly long exposure times to achieve full conformality inside nanostructures like high aspect ratio vias. Using a synthetic dataset based on simulations of PEALD, we train artificial neural networks to predict saturation times based on cross section thickness data obtained for partially coated conditions. The results obtained show that just two experiments in undersaturated conditions contain enough information to predict saturation times within 10% of the ground truth. A surrogate model trained to determine whether surface recombination dominates the plasma–surface interactions in a PEALD process achieves 99% accuracy. This demonstrates that machine learning can provide a new pathway to accelerate the optimization of PEALD processes in areas such as microelectronics. Our approach can be easily extended to ALE and more complex structures.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Accelerating kinetic plasma simulations with machine-learning-generated initial conditions

Computational models of plasma technologies often solve for the system operating conditions by time-stepping an initial value problem to a quasi-steady solution. However, the strongly nonlinear and multi-timescale nature of plasma dynamics often necessitate millions, or even hundreds of millions, of steps to reach convergence, reducing the effectiveness of these simulations for computer-aided engineering. We consider acceleration of kinetic plasma simulations via data-driven machine-learning-generated initial conditions, which initialize the simulations close to their final quasi-steady-state, thereby reducing the number of steps to reach convergence. Three machine-learning models are developed to predict the density and ion kinetic profiles of capacitively coupled plasma discharges relevant to the microelectronics industry. The models are trained on kinetic simulations over a range of device operating frequencies and pressures. Best performance was observed when simulations were initialized with ion kinetic profiles generated by a convolutional neural network, reducing the mean number of steps to reach convergence by 17.1× when compared to initialization with a zero-dimensional global model. We also outline a workflow for continuous data-driven model improvement and simulation speedup, with the aim of generating sufficient data for full device digital twins.

Artificial neural networks↗

Mathematics of Gas Ingress of Hermetic Packages

Herein, we have derived a gas ingress and egress equation from the first principles of ideal gases. This work is intended to benefit the hermetic microelectronics packaging community, but it may be applied to other fields that require a deep understanding of gas ingress and egress dynamics. The equation outlined herein encompasses package material properties, package characteristics, hermetic testing conditions, and service conditions. It serves as a practical utility for calculating package pressure changes due to gas ingress and egress and, therefore, a power tool for component and system service life predictions.

42 ENGINEERING↗

Voltage waveform tailoring for high aspect ratio plasma etching of SiO 2 using Ar/CF 4 /O 2 mixtures: Consequences of ion and electron distributions on etch profiles

The quality of high aspect ratio (HAR) features etched into dielectrics for microelectronics fabrication using halogen containing low temperature plasmas strongly depends on the energy and angular distribution of the incident ions (IEAD) onto the wafer, as well as potentially that of the electrons (EEAD). Positive ions, accelerated to high energies by the sheath electric field, have narrow angular spreads and can penetrate deeply into HAR features. Electrons typically arrive at the wafer with nearly thermal energy and isotropic angular distributions and so do not directly penetrate deeply into features. These differences can lead to positive charging of the insides of the features that can slow etching rates and produce geometric defects such as twisting. In this work, we computationally investigated the plasma etching of HAR features into SiO 2 using tailored voltage waveforms in a geometrically asymmetric capacitively coupled plasma sustained in an Ar/CF 4 /O 2 mixture at 40 mTorr. The tailored waveform consisted of a sinusoidal wave and its higher harmonics with a fundamental frequency of 1 MHz. We found that some degree of control of the IEADs and EEADs is possible by adjusting the phase of higher harmonics φ through the resulting generation of electrical asymmetry and electric field reversal. However, the IEADs and EEADs cannot easily be separately controlled. The control of IEADs and EEADs is inherently linked. The highest quality feature was obtained with a phase angle φ = 0° as this value generated the largest (most negative) DC self-bias and largest electric field reversal for accelerating electrons into the feature. That said, the consequences of voltage waveform tailoring (VWT) on etched features are dominated by the change in the IEADs. Although VWT does produce EEADs with higher energy and narrower angular spread, the effect of these electrons on the feature compared to thermal electrons is not large. Finally, this smaller impact of VWT produced EEADs is attributed to thermal electrons being accelerated into the feature by electric fields produced by the positive in-feature charging.

47 OTHER INSTRUMENTATION↗

Alternative Technology for Creating Nanostructures Using Dip Pen Nanolithography

For modern microelectronics, at the present time, the technologies of consciousness smart structures play an important role, which can provide accuracy, stability and high quality of the structures. Submicron lithography methods are quite expensive and have natural size limitations, not allowing the production of structures with an extremely small lateral limitation. Therefore, an intensive search was conducted for alternative methods for creating submicron resolution structures. Especially attractive one is the possibility of self-organization effects utilization, where the nanostructure of a certain size is formed under the influence of internal forces. The dip pen nanolithography method based on a scanning probe microscope uses a directwrite technology and allows one to carry out a playback of small size structures with high accuracy. In the experiment, a substrate coated with Au (15 nm) using a DPN technique is applied to the polymer to form a desired pattern nano-sized channel. The experiment was conducted using a pointed probe SiN, coated MHA-Acetonitrile, on the Si(111)/Fe{sub 3}Si/Au structure.

36 MATERIALS SCIENCE↗