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At least 397 records · Page 22
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

The NT digital micro tape recorder

The description of an audio recorder may at first glance seem out of place in a conference which has been dedicated to the discussion of the technology and requirements of mass data storage. However, there are several advanced features of the NT system which will be of interest to the mass storage technologist. Moreover, there are a sufficient number of data storage formats in current use which have evolved from their audio counterparts to recommend a close attention to major innovative introductions of audio storage formats. While the existing analog micro-cassette recorder has been (and will continue to be) adequate for various uses, there are significant benefits to be gained through the application of digital technology. The elimination of background tape hiss and the availability of two relatively wide band channels (for stereo recording), for example, would greatly enhance listenability and speech intelligibility. And with the use of advanced high-density recording and LSI circuit technologies, a digital micro recorder can realize unprecedented compactness with excellent energy efficiency. This is what was accomplished with the NT-1 Digital Micro Recorder. Its remarkably compact size contributes to its portability. The high-density NT format enables up to two hours of low-noise digital stereo recording on a cassette the size of a postage stamp. Its highly energy-efficient mechanical and electrical design results in low power consumption; the unit can be operated up to 7 hours (for continuous recording) on a single AA alkaline battery. Advanced user conveniences include a multifunction LCD readout. The unit's compactness and energy-efficiency, in particular, are attributes that cannot be matched by existing analog and digital audio formats. The size, performance, and features of the NT format are of benefit primarily to those who desire improved portability and audio quality in a personal memo product. The NT Recorder is the result of over ten years of intensive, multi-disciplinary research and development. What follows is a discussion of the technologies that have made the NT possible: (1) NT format mechanics, (2) NT media, (3) NT circuitry and board.

Sasaki, Toshikazu↗
NASA NTRS1993

The modern high rate digital cassette recorder

The magnetic tape recorder has played an essential role in the capture and storage of instrumentation data for more than thirty years. During this time, data recording technology has steadily progressed to meet user demands for more channels, wider bandwidths, and longer recording durations. When acquisition and processing moved from analog to digital techniques, so recorder design followed suit. Milestones marking the evolution of the data recorder through these various stages - multi-track analog, high density longitudinal digital, and more recently rotary digital - have often represented important breakthroughs in the handling of ever-greater quantities of data. Throughout this period there has been a very clear line of demarcation between data storage methods in the 'instrumentation world' on the one hand and the 'computer peripheral world' on the other. This is despite the fact that instrumentation data, whether analog or digital at the point of acquisition, is now likely to be processed on a digital computer at some stage. Regardless of whether the processing device is a small personal computer, a workstation, or the largest supercomputer, system integrators have traditionally been faced with the same basic problem - how to interface what is essentially a manually controlled, continuously running device (the tape recorder) into the fast start/stop computer environment without resorting to an excessive amount of complex custom interfacing and performance compromise. The increasing availability of affordable high power processing equipment throughout the scientific world is forcing recorder manufacturers to make their latest and perhaps most important breakthrough - the computer-friendly data recorder. The operating characteristics of such recorders are discussed and the resultant impact on both data acquisition and data analysis elements of system configuration are considered.

Clemow, Martin↗
NASA NTRS1991

Optimal digital redesign of cascaded analogue controllers

This paper presents a new, optimal digital redesign technique for finding an optimal cascaded digital controller from the given continuous-time counterpart by minimizing a quadratic performance index. The control gains can be obtained by solving a set of Liapunov equations. The developed optimal cascaded digital controller enables the state and/or outputs of the digitally controlled closed-loop sampled-data system to optimally match those of the original continuous-time closed-loop system at any instant between sampling periods. The developed control law can be implemented using inexpensive and reliable digital electronics with a relatively long sampling period.

Shieh, L. S.↗
NASA NTRS1992

A new approach to the digital redesign of continuous-time controllers

This paper presents a new method for digital redesign of both a continuous-time state-feedback control law and a cascaded analog controller. The concept of the Law of Mean from the integral calculus is utilized for the development of the equivalent digital controllers from the available analog controllers. A tuning parameter has been introduced into the digitally redesigned control gains so that the digitally controlled states will closely match the original continuous-time states. The proposed digital controllers give excellent performance.

Shieh, Leang-San↗
NASA NTRS1989

Locally optimal-digital redesign of continuous-time systems

This paper presents a new optimal digital redesign technique for finding a dynamic digital control law from the given continuous-time counterpart by minimizing a local quadratic performance index. The quadratic performance index is chosen as the integral of the weighted squared difference between the states of the original closed-loop system and those of the digitally controlled closed-loop system at any instant between each sampling period. The developed optimal digital redesign control law enables the states of the digitally controlled closed-loop system 10 closely match those of the original closed-loop system at any instant between each sampling period, and it can easily be implemented using microcomputers with a relatively large sampling period.

Shieh, Leang-San↗
NASA NTRS1994

Evaluating Multi-Input/Multi-Output Digital Control Systems

Controller-performance-evaluation (CPE) methodology for multi-input/multi-output (MIMO) digital control systems developed. Procedures identify potentially destabilizing controllers and confirm satisfactory performance of stabilizing ones. Methodology generic and used in many types of multi-loop digital-controller applications, including digital flight-control systems, digitally controlled spacecraft structures, and actively controlled wind-tunnel models. Also applicable to other complex, highly dynamic digital controllers, such as those in high-performance robot systems.

Pototzky, Anthony S.↗
NASA NTRS1993

Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders

The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

Nguyen, T. M.↗
NASA NTRS1993

Adaptive digital beamforming for a CDMA mobile communications payload

In recent years, Spread-Spectrum Code Division Multiple Access (CDMA) has become a very popular access scheme for mobile communications due to a variety of reasons: excellent performance in multipath environments, high scope for frequency reuse, graceful degradation near saturation, etc. In this way, a CDMA system can support simultaneous digital communication among a large community of relatively uncoordinated users sharing a given frequency band. Nevertheless, there are also important problems associated with the use of CDMA. First, in a conventional CDMA scheme, the signature sequences of asynchronous users are not orthogonal and, as the number of active users increases, the self-noise generated by the mutual interference between users considerably degrades the performance, particularly in the return link. Furthermore, when there is a large disparity in received powers - due to differences in slant range or atmospheric attenuation - the non-zero cross-correlation between the signals gives rise to the so-called near-far problem. This leads to an inefficient utilization of the satellite resources and, consequently, to a drastic reduction in capacity. Several techniques were proposed to overcome this problem, such as Synchronized CDMA - in which the signature sequences of the different users are quasi-orthogonal - and power control. At the expense of increased network complexity and user coordination, these techniques enable the system capacity to be restored by equitably sharing the satellite resources among the users. An alternative solution is presented based upon the use of time-reference adaptive digital beamforming on board the satellite. This technique enables a high number of independently steered beams to be generated from a single phased array antenna, which automatically track the desired user signal and null the unwanted interference source. In order to use a time-reference adaptive antenna in a communications system, the main challenge is to obtain a reference signal highly correlated with the desired user signal and uncorrelated with the interferences. CDMA lends itself very easily to the generation of such a reference signal, thanks to the a priori knowledge of the user's signature sequence. First, the integration of an adaptive antenna in an asynchronous CDMA system is analyzed. The adaptive antenna system can provide increased interference rejection - much higher than that afforded by the code alone - and, since CDMA is mainly interference limited, any reduction in interference converts directly and linearly into an increase in capacity. Analyses and computer simulations are presented that show how an asynchronous CDMA system incorporating adaptive beamforming can provide at least as much capacity as a synchronous system. More importantly, the proposed concept allows the near-far effect to be mitigated without requiring a tight coordination of the users in terms of transmitted power control or network synchronization. The system is extremely robust to the near-far effect because the signals reaching the satellite from directions other than that of the desired user - which are likely to have different power levels - are adaptively canceled by the antenna. Finally, a payload architecture is presented that illustrates the practical implementation of this concept. This digital payload architecture demonstrates that with the advent of high performance CMOS digital processing, the on-board implementation of complex DSP techniques - in particular Digital Beamforming - has become possible, being most attractive for Mobile Satellite Communications.

Munoz-Garcia, Samuel G.↗
NASA NTRS1994

Design and implementation of a hybrid digital phase-locked loop with a TMS320C25: An application to a transponder receiver breadboard

Design, modeling, analysis, and simulation of a phase-locked loop (PLL) with a digital loop filter are presented in this article. A TMS320C25 digital signal processor (DSP) is used to implement this digital loop filter. In order to keep the compatibility, the main design goal was to replace the analog PLL (APLL) of the Deep-Space Transponder (DST) receiver breadboard's loop filter with a digital loop filter without changing anything else. This replacement results in a hybrid digital PLL (HDPLL). Both the original APLL and the designed HDPLL are Type I second-order systems. The real-time performance of the HDPLL and the receiver is provided and evaluated.

Yeh, H.-G.↗
NASA NTRS1994

Common modeling system for digital simulation

The Joint Modeling and Simulation System is a tri-service investigation into a common modeling framework for the development digital models. The basis for the success of this framework is an X-window-based, open systems architecture, object-based/oriented methodology, standard interface approach to digital model construction, configuration, execution, and post processing. For years Department of Defense (DOD) agencies have produced various weapon systems/technologies and typically digital representations of the systems/technologies. These digital representations (models) have also been developed for other reasons such as studies and analysis, Cost Effectiveness Analysis (COEA) tradeoffs, etc. Unfortunately, there have been no Modeling and Simulation (M&S) standards, guidelines, or efforts towards commonality in DOD M&S. The typical scenario is an organization hires a contractor to build hardware and in doing so an digital model may be constructed. Until recently, this model was not even obtained by the organization. Even if it was procured, it was on a unique platform, in a unique language, with unique interfaces, and, with the result being UNIQUE maintenance required. Additionally, the constructors of the model expended more effort in writing the 'infrastructure' of the model/simulation (e.g. user interface, database/database management system, data journalizing/archiving, graphical presentations, environment characteristics, other components in the simulation, etc.) than in producing the model of the desired system. Other side effects include: duplication of efforts; varying assumptions; lack of credibility/validation; and decentralization in policy and execution. J-MASS provides the infrastructure, standards, toolset, and architecture to permit M&S developers and analysts to concentrate on the their area of interest.

Painter, Rick↗
NASA NTRS1994

Performance evaluation of digital phase-locked loops for advanced deep space transponders

The performances of the digital phase-locked loops (DPLL's) for the advanced deep-space transponders (ADT's) are investigated. DPLL's considered in this article are derived from the analog phase-locked loop, which is currently employed by the NASA standard deep space transponder, using S-domain to Z-domain mapping techniques. Three mappings are used to develop digital approximations of the standard deep space analog phase-locked loop, namely the bilinear transformation (BT), impulse invariant transformation (IIT), and step invariant transformation (SIT) techniques. The performance in terms of the closed loop phase and magnitude responses, carrier tracking jitter, and response of the loop to the phase offset (the difference between in incoming phase and reference phase) is evaluated for each digital approximation. Theoretical results of the carrier tracking jitter for command-on and command-off cases are then validated by computer simulation. Both theoretical and computer simulation results show that at high sampling frequency, the DPLL's approximated by all three transformations have the same tracking jitter. However, at low sampling frequency, the digital approximation using BT outperforms the others. The minimum sampling frequency for adequate tracking performance is determined for each digital approximation of the analog loop. In addition, computer simulation shows that the DPLL developed by BT provides faster response to the phase offset than IIT and SIT.

Nguyen, T. M.↗
NASA NTRS1998

Characterization of a 16-bit Digitizer System for Lidar Data Acquisition

A new 16-bit 6-MHz compact, lightweight waveform digitizer module has been tested using actual 300-nm lidar atmospheric returns. The noise level of this digitizer was tested and found to be substantially below the ozone number density to be measured. The digitizer is inexpensive and compact enough to be deployed in UAV aircraft and spacecraft environments. With 16-bit digitizers a resolution of 0.046 mV/step can be achieved, substantially improving resolution over 12-bit systems. This digitizer will find widespread use in future DIAL receiver systems.

Williamson, Cynthia K.↗
NASA NTRS2000

Characterization of a 16-Bit Digitizer for Lidar Data Acquisition

A 6-MHz 16-bit waveform digitizer was evaluated for use in atmospheric differential absorption lidar (DIAL) measurements of ozone. The digitizer noise characteristics were evaluated, and actual ozone DIAL atmospheric returns were digitized. This digitizer could replace computer-automated measurement and control (CAMAC)-based commercial digitizers and improve voltage accuracy.

Williamson, Cynthia K.↗
NASA NTRS2002

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing (DSP) functions. Such capability also makes and FPGA a suitable platform for the digital implementation of closed loop controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance in a compact form-factor. Other researchers have presented the notion that a second order digital filter with proportional-integral-derivative (PID) control functionality can be implemented in an FPGA. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSF) devices. Our goal is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. Meeting our goals requires alternative compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching these goals.

Gwaltney, David A.↗
NASA NTRS2001

The ASPRS Digital Imagery Product Guideline Project

The American Society for Photogrammetry and Remote Sensing (ASPRS) Primary Data Acquisition Division is developing a Digital Imagery Product Guideline in conjunction with NASA, the U.S. Geological Survey (USGS), the National Imagery and Mapping Agency (NIMA), academia, and industry. The goal of the guideline is to offer providers and users of digital imagery a set of recommendatons analogous those defined by the ASPRS Aerial Photography 1995 Draft Standard for film-based imagery. This article offers a general outline and description of the Digital Imagery Product Guideline and Digital Imagery Tutorial/Reference documents for defining digital imagery requirements.

Ryan, Robert↗
NASA NTRS2002

Digital echocardiography 2002: now is the time

The ability to acquire echocardiographic images digitally, store and transfer these data using the DICOM standard, and routinely analyze examinations exists today and allows the implementation of a digital echocardiography laboratory. The purpose of this review article is to outline the critical components of a digital echocardiography laboratory, discuss general strategies for implementation, and put forth some of the pitfalls that we have encountered in our own implementation. The major components of the digital laboratory include (1) digital echocardiography machines with network output, (2) a switched high-speed network, (3) a high throughput server with abundant local storage, (4) a reliable low-cost archive, (5) software to manage information, and (6) support mechanisms for software and hardware. Implementation strategies can vary from a complete vendor solution providing all components (hardware, software, support), to a strategy similar to our own where standard computer and networking hardware are used with specialized software for management of image and measurement information.

Review↗
NASA NTRS1999

Effect of optical digitizer selection on the application accuracy of a surgical localization system-a quantitative comparison between the OPTOTRAK and flashpoint tracking systems

Application accuracy is a crucial factor for stereotactic surgical localization systems, in which space digitization camera systems are one of the most critical components. In this study we compared the effect of the OPTOTRAK 3020 space digitization system and the FlashPoint Model 3000 and 5000 3D digitizer systems on the application accuracy for interactive localization of intracranial lesions. A phantom was mounted with several implantable frameless markers which were randomly distributed on its surface. The target point was digitized and the coordinates were recorded and compared with reference points. The differences from the reference points represented the deviation from the "true point." The root mean square (RMS) was calculated to show the differences, and a paired t-test was used to analyze the results. The results with the phantom showed that, for 1-mm sections of CT scans, the RMS was 0.76 +/- 0. 54 mm for the OPTOTRAK system, 1.23 +/- 0.53 mm for the FlashPoint Model 3000 3D digitizer system, and 1.00 +/- 0.42 mm for the FlashPoint Model 5000 system. These preliminary results showed that there is no significant difference between the three tracking systems, and, from the quality point of view, they can all be used for image-guided surgery procedures. Copyright 1999 Wiley-Liss, Inc.

Non-NASA Center↗
NASA NTRS1992

Matrix error correction for digital data

A technique for digital data error detection and correction is disclosed which adds alignment and checksum bytes to three sides of a matrix (24) of digital data to be protected. This technique is particularly used for the recording and storage (16,18) of digital data on video tape medium (14). The digital data is treated as a matrix block (24). Checksum and alignment bytes are added (20) to the digital data before tape storage and stripped (22) therefrom after successful alignment checks and data validation. In particular, the first column may be used to provide alignment bytes of a predetermined value for each row. The last column provides row checksum bytes for the data in each row. The last row provides column check sum bytes for each column, excluding the column of alignment bytes. The data location at the intersection of the row of column checksum bytes and the column of row checksum bytes may be used as a checksum byte for either the row or column checksum bytes.

Dotson, Ronald S.↗