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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 379 records · Page 21
All sourcesNASA NTRSDOE OSTI
NASA NTRS2012

Dynamically Reconfigurable Systolic Array Accelerator

A polymorphic systolic array framework has been developed that works in conjunction with an embedded microprocessor on a field-programmable gate array (FPGA), which allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and a hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms, and is extendable to more complex applications in the area of aerospace embedded systems. FPGA chips can be responsive to realtime demands for changing applications needs, but only if the electronic fabric can respond fast enough. This systolic array framework allows for rapid partial and dynamic reconfiguration of the chip in response to the real-time needs of scalability, and adaptability of executables.

Dasu, Aravind↗
NASA NTRS2014

Dynamically Reconfigurable Systolic Array Accelorators

A polymorphic systolic array framework that works in conjunction with an embedded microprocessor on an FPGA, that allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms and extendable to more complex applications in the area of aerospace embedded systems.

Dasu, Aravind↗
NASA NTRS1996

Re-Engineering JPL's Mission Planning Ground System Architecture for Cost Efficient Operations in the 21st Century

Over the last several decades, engineers at JPL have developed a vast array of analytical tools to design missions to Earth orbit, the Moon, Sun, planets, and various bodies and beyond. In recent years, advances in computer hardware, modern programming languages, and the need for faster and more efficient operations for small missions have highlighted the need to streamline, consolidate, and generalize JPL's mission planning software. This paper summerizes ongoing efforts at JPL to re-engineer the mission analysis segment of the mission planning ground system architecture.The status and goals of new developments are discussed and specific examples of cost savings and improved productivity are provided.

software↗
NASA NTRS2019

Radio Frequency and Optical Communication Link Trade Studies Between Earth, Deep Space Gateway and Lunar Surface

Efficient and accurate communication are two of the most important aspects in a communications system. Hence, it was pertinent that radio frequency (RF) and optical link budget analyses were understood inside and out by the two young careerists when performing this study. This report covers RF and optical trade studies performed between Earth, Deep Space Gateway (DSG), Orion, and the Moon’s lunar surface. Using criteria provided by NASA Headquarters, the links were statically driven allowing review of the systems without bandwidth limitations, spectrum allocations, and hardware implementations. This provided the chance to review the efficiency of the links as technology improves throughout the decades. A few select RF links were analyzed using repeaters while select optical links were compared with coded and uncoded modulation schemes. The results from these analyses again prove the tradeoff theories in communications systems.

Booth, Stephanie L.↗
NASA NTRS2005

Ka-Band Wide-Bandgap Solid-State Power Amplifier: Hardware Validation

Motivated by recent advances in wide-bandgap (WBG) gallium nitride (GaN) semiconductor technology, there is considerable interest in developing efficient solid-state power amplifiers (SSPAs) as an alternative to the traveling-wave tube amplifier (TWTA) for space applications. This article documents proof-of-concept hardware used to validate power-combining technologies that may enable a 120-W, 40 percent power-added efficiency (PAE) SSPA. Results in previous articles [1-3] indicate that architectures based on at least three power combiner designs are likely to enable the target SSPA. Previous architecture performance analyses and estimates indicate that the proposed architectures can power combine 16 to 32 individual monolithic microwave integrated circuits (MMICs) with >80 percent combining efficiency. This combining efficiency would correspond to MMIC requirements of 5- to 10-W output power and >48 percent PAE. In order to validate the performance estimates of the three proposed architectures, measurements of proof-of-concept hardware are reported here.

Epp, L.↗
NASA NTRS1987

JPL multipolarization workstation - Hardware, software and examples of data analysis

A low-cost stand-alone interactive image processing workstation has been developed for operations on multipolarization JPL aircraft SAR data, as well as data from future spaceborne imaging radars. A recently developed data compression technique is used to reduce the data volume to 10 Mbytes, for a typical data set, so that interactive analysis may be accomplished in a timely and efficient manner on a supermicrocomputer. In addition to presenting a hardware description of the work station, attention is given to the software that has been developed. Three illustrative examples of data analysis are presented.

Burnette, Fred↗
NASA NTRS1990

A nonrecursive order N preconditioned conjugate gradient: Range space formulation of MDOF dynamics

While excellent progress has been made in deriving algorithms that are efficient for certain combinations of system topologies and concurrent multiprocessing hardware, several issues must be resolved to incorporate transient simulation in the control design process for large space structures. Specifically, strategies must be developed that are applicable to systems with numerous degrees of freedom. In addition, the algorithms must have a growth potential in that they must also be amenable to implementation on forthcoming parallel system architectures. For mechanical system simulation, this fact implies that algorithms are required that induce parallelism on a fine scale, suitable for the emerging class of highly parallel processors; and transient simulation methods must be automatically load balancing for a wider collection of system topologies and hardware configurations. These problems are addressed by employing a combination range space/preconditioned conjugate gradient formulation of multi-degree-of-freedom dynamics. The method described has several advantages. In a sequential computing environment, the method has the features that: by employing regular ordering of the system connectivity graph, an extremely efficient preconditioner can be derived from the 'range space metric', as opposed to the system coefficient matrix; because of the effectiveness of the preconditioner, preliminary studies indicate that the method can achieve performance rates that depend linearly upon the number of substructures, hence the title 'Order N'; and the method is non-assembling. Furthermore, the approach is promising as a potential parallel processing algorithm in that the method exhibits a fine parallel granularity suitable for a wide collection of combinations of physical system topologies/computer architectures; and the method is easily load balanced among processors, and does not rely upon system topology to induce parallelism.

Kurdila, Andrew J.↗
NASA NTRS1995

Telescience operations with the solar array module plasma interaction experiment

The Solar Array Module Plasma Interactions Experiment (SAMPIE) is a flight experiment that flew on the Space Shuttle Columbia (STS-62) in March 1994, as part of the OAST-2 mission. The overall objective of SAMPIE was to determine the adverse environmental interactions within the space plasma of low earth orbit (LEO) on modern solar cells and space power system materials which are artificially biased to high positive and negative direct current (DC) voltages. The two environmental interactions of interest included high voltage arcing from the samples to the space plasma and parasitic current losses. High voltage arcing can cause physical damage to power system materials and shorten expected hardware life. parasitic current losses can reduce power system efficiency because electric currents generated in a power system drain into the surrounding plasma via parasitic resistance. The flight electronics included two programmable high voltage DC power supplies to bias the experiment samples, instruments to measure the surrounding plasma environment in the STS cargo bay, and the on-board data acquisition system (DAS). The DAS provided in-flight experiment control, data storage, and communications through the Goddard Space Flight Center (GSFC) Hitchhiker flight avionics to the GSFC Payload Operations Control Center (POCC). The DAS and the SAMPIE POCC computer systems were designed for telescience operations; this paper will focus on the experiences of the SAMPIE team regarding telescience development and operations from the GSFC POCC during STS-62. The SAMPIE conceptual development, hardware design, and system verification testing were accomplished at the NASA Lewis Research Center (LeRC). SAMPIE was developed under the In-Space Technology Experiment Program (IN-STEP), which sponsors NASA, industry, and university flight experiments designed to enable and enhance space flight technology. The IN-STEP Program is sponsored by the Office of Space Access and Technology (OSAT).

Wald, Lawrence W.↗
DOE OSTI2021

AEDAM: Whole Program Adaptive Error Detection and Mitigation (Final Report)

The overall goals of the AEDAM project were to fundamentally transform software transient-error detection through the design of configurable specialized detectors, quantitative characterization of hardware resilience and software vulnerabilities, and composition of the specialized detectors to most efficiently protect the whole program. Within this scope, UT Austin's research contribution related to enabling and studying the composition of detectors and possible different hardware errors, specifically: (1) developed the Hamartia open-source error injection framework that is designed to make composition studies simple, and (2) develop the methodology and demonstrate the potential benefits of error detector composition.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Keeping LAMMPS cutting edge

Since its inception 30 years ago, LAMMPS has grown to be a world-class molecular dynamics code and a cornerstone of computational materials science research. This project aimed to keep LAMMPS at the forefront of molecular dynamics simulations by adapting LAMMPS to the latest developments in machine learning technology and hardware. Initially, the project set out to provide a unified implementation of active learning for efficient training data generation in LAMMPS, but the research trajectory pivoted to address more immediate and impactful opportunities. On the hardware side, recent record-breaking molecular dynamics simulations were developed on the Cerebras wafer-scale AI chip, and this project has developed an interface between LAMMPS and the hardware-specific molecular dynamics code to accelerate and simplify development and user adoption. On the software side, PyTorch’s Ahead-of-Time (AOT) compilation features promised increased performance for state-of-the-art equivariant neural network potentials, and this project laid the groundwork for their adoption in LAMMPS, resulting in a nearly 20x acceleration in extreme cases. Combined with a comprehensive benchmark study of LAMMPS across all current exascale systems, this project has reinforced LAMMPS’s role as a versatile, high-performance tool for current and future materials science applications.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Programmable simulations of molecules and materials with reconfigurable quantum processors

Simulations of quantum chemistry and quantum materials are believed to be among the most important applications of quantum information processors. However, realizing practical quantum advantage for such problems is challenging because of the prohibitive computational cost of programming typical problems into quantum hardware. Here we introduce a simulation framework for strongly correlated quantum systems represented by model spin Hamiltonians that uses reconfigurable qubit architectures to simulate real-time dynamics in a programmable way. Our approach also introduces an algorithm for extracting chemically relevant spectral properties via classical co-processing of quantum measurement results. We develop a digital–analogue simulation toolbox for efficient Hamiltonian time evolution using digital Floquet engineering and hardware-optimized multi-qubit operations to accurately realize complex spin–spin interactions. As an example, we propose an implementation based on Rydberg atom arrays. In addition, we show how detailed spectral information can be extracted from the dynamics through snapshot measurements and single-ancilla control, enabling the evaluation of excitation energies and finite-temperature susceptibilities from a single dataset. To illustrate the approach, we show how to use the method to compute key properties of a polynuclear transition-metal catalyst and two-dimensional magnetic materials.

74 ATOMIC AND MOLECULAR PHYSICS↗
DOE OSTI2025

DS-TIDE: Harnessing Dynamical Systems for Efficient Time-Independent Differential Equation Solving

Time-Independent Differential Equations (TIDEs) are central to modeling equilibrium behavior across a wide range of scientific and engineering domains, from electrostatics to porous media flow. Conventional numerical solvers offer reliable solutions but incur significant computational costs due to fine-grained discretization and iterative procedures. Machine learning-based approaches address this by replacing iterative solving processes with one-time inference; however, their sophisticated models require extensive training resources that often exceed those of traditional solvers. Consequently, designing a TIDE solver that achieves high accuracy, broad applicability, and exceptional computational efficiency remains a fundamental challenge. In this paper, we propose DS-TIDE, a novel hardware solver that is inspired by, and subsequently leverages, the intrinsic connection between Dynamical Systems (DS) and Differential Equations (DEs) to efficiently and accurately solve TIDEs. DS-TIDE employs a CMOS-compatible DS-based processor, whose physical states evolve under carefully designed DE-driven dynamics and naturally converge to equilibrium -- the solution of the target TIDE -- within ~1µs on a ~1-watt DS-TIDE processor. To enhance expressivity, DS-TIDE incorporates Heterogeneous Dynamics with Temporal Layering (HDTL), which solves TIDEs through a three-stage DS evolution -- conditioning, solving, and decoding -- each governed by specialized dynamics. The entire evolution process is analogous to an infinitely deep neural network temporally unrolled, offering the system the capability of representing complex equations. Furthermore, DS-TIDE is equipped with an on-device DS-DE Auto-Alignment mechanism that dynamically adapts intrinsic hardware dynamics within milliseconds, effectively aligning the system’s dynamics to diverse target DEs. Experimental results across TIDEs from a wide range of scientific and engineering domains demonstrate that DS-TIDE achieves ~10^3× speedup, ~10^5× energy savings, and competitive or superior accuracy compared to state-of-the-art numerical and ML-based solvers.

Liu, Chuan↗
DOE OSTI2025

Fast jet tagging with MLP-Mixers on FPGAs

We explore the innovative use of MLP-Mixer models for real-time jet tagging and establish their feasibility on resource-constrained hardware like FPGAs. MLP-Mixers excel in processing sequences of jet constituents, achieving state-of-the-art performance on datasets mimicking Large Hadron Collider conditions. By using advanced optimization techniques such as High-Granularity Quantization and Distributed Arithmetic, we achieve unprecedented efficiency. These models match or surpass the accuracy of previous architectures, reduce hardware resource usage by up to 97%, double the throughput, and half the latency. Additionally, non-permutation-invariant architectures enable smart feature prioritization and efficient FPGA deployment, setting a new benchmark for machine learning in real-time data processing at particle colliders.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Power Layout Design of a GaN HEMTs-Based High-Power High-Efficiency Three-Level ANPC Inverter for 800 V DC Bus System

Multiple commutation paths exist for switching devices in a three-level active neutral point clamped (3L-ANPC) inverter operation based on the selected switching state and current direction. In addition, the capacitive coupling path of the nonswitching device is a key design aspect for enabling high voltage and high current operation of gallium nitride (GaN) switches in 3L-ANPC topology. A comprehensive study of the switching transient events of inner, outer, and clamping devices of 3L-ANPC is presented in this article. The commutation mechanisms for worst-case transient voltage overshoots (TVOs) are identified. A simplified equivalent circuit model is presented to determine the design criteria for the power layout structure's parasitic inductances. A power layout strategy satisfying the design criteria is then proposed using an insulated metal substrate power printed circuit board (PCB) to enable efficient high-power operation. The proposed design minimizes the commutation and capacitive coupling path inductances to 6 nH and 11.5 nH, respectively. This enables the fast switching operation of GaN HEMTs at 800 V dc, 36 A with a low TVO of 31% verified through experimental three-level double pulse test results. Experimental evaluation of a three-phase 3L-ANPC hardware prototype based on the proposed power layout shows 99% efficiency at 800 V, 9.5 kVA and 50 kHz switching frequency. The proposed design achieves a low case-to-ambient thermal resistance of 2.3 °C/W.

42 ENGINEERING↗
DOE OSTI2025

Evaluating Thermostats' Deadbands Using HVAC Hardware-In-the-Loop Experiment for Advanced Control Strategies

Smart thermostats have gained significant popularity due to their potential for optimizing energy consumption and enhanced user control while ensuring occupants' comfort. The deadband, also referred to as temperature differential, is defined as the temperature difference between the desired setpoint and upper threshold or lower threshold for the HVAC equipment to turn on. It is a key factor influencing energy efficiency and user satisfaction. This paper presents a comparative analysis of the deadbands of five different smart thermostats, tested with a heat pump, aiming to identify variations in their deadband settings and implications for energy management. The experimental study was conducted using a HVAC hardware-in-theloop (HIL) system that integrates smart thermostats with physical HVAC equipment in a simulated house environment. The study explores the trade-offs between energy efficiency and occupant comfort and highlights how different thermostats participating in demand response event cycle differently based on their deadband settings. The findings offer valuable insights into how selecting the right thermostat or configuring smart thermostat with appropriate deadband settings can be leveraged to enhance demand response capabilities, shift loads effectively and improve operational flexibility in HVAC systems.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2025

Evaluating Thermostats' Deadbands Using HVAC Hardware-In-the-Loop Experiment for Advanced Control Strategies: Preprint

Smart thermostats have gained significant popularity due to their potential for optimizing energy consumption and enhanced user control while ensuring occupants' comfort. The deadband, also referred to as temperature differential, is defined as the temperature difference between the desired setpoint and upper threshold or lower threshold for the HVAC equipment to turn on. It is a key factor influencing energy efficiency and user satisfaction. This paper presents a comparative analysis of the deadbands of five different smart thermostats, tested with a heat pump, aiming to identify variations in their deadband settings and implications for energy management. The experimental study was conducted using a HVAC hardware-in-theloop (HIL) system that integrates smart thermostats with physical HVAC equipment in a simulated house environment. The study explores the trade-offs between energy efficiency and occupant comfort and highlights how different thermostats participating in demand response event cycle differently based on their deadband settings. The findings offer valuable insights into how selecting the right thermostat or configuring smart thermostat with appropriate deadband settings can be leveraged to enhance demand response capabilities, shift loads effectively and improve operational flexibility in HVAC systems.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2024

Milestone 49 Report: Batched Sparse LA Phase 5 Implementation

Batched sparse linear algebra operations in general, and solvers in particular, have become the major algorithmic development activity and foremost performance engineering effort in the numerical software libraries work on modern hardware with accelerators such as GPUs. Many applications, ECP and non-ECP alike, require simultaneous solutions of many small linear systems of equations that are structurally sparse in one form or another. In order to move towards high hardware utilization levels, it is important to provide these applications with appropriate interface designs to be both functionally efficient and performance portable and give full access to the appropriate batched sparse solvers running on modern hardware accelerators prevalent across DOE supercomputing sites since the inception of ECP. To this end, we present here a summary of recent advances on the interface designs in use by HPC software libraries supporting batched sparse linear algebra and the development of sparse batched kernel codes for solvers and preconditioners. We also address the potential interoperability opportunities to keep the corresponding software portable between the major hardware accelerators from AMD, Intel, and NVIDIA, while maintaining the appropriate disclosure levels conforming to the active NDA agreements. The presented interface specifications include a mix of batched band, sparse iterative, and sparse direct solvers with their accompanying functionality that is already required by the application codes or we anticipated to be needed in the near future. This report summarizes progress in Kokkos Kernels and the xSDK libraries MAGMA, Ginkgo, hypre, PETSc, and SuperLU.

97 MATHEMATICS AND COMPUTING↗