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At least 379 records · Page 21

Bypass diode integration

Protective bypass diodes and mounting configurations which are applicable for use with photovoltaic modules having power dissipation requirements in the 5 to 50 watt range were investigated. Using PN silicon and Schottky diode characterization data on packaged diodes and diode chips, typical diodes were selected as representative for each range of current carrying capacity, an appropriate heat dissipating mounting concept along with its environmental enclosure was defined, and a thermal analysis relating junction temperature as a function of power dissipation was performed. In addition, the heat dissipating mounting device dimensions were varied to determine the effect on junction temperature. The results of the analysis are presented as a set of curves indicating junction temperature as a function of power dissipation for each diode package.

Shepard, N. F., Jr.↗

Hardware additions to microprocessor architecture aid software development

An address trap (breakpoint) mechanism and last-in-first-out (LIFO) address stack are suggested as two additions to the basic microprocessor architecture whose functions are solely to aid the programmer. These devices provide the programmer with the ability to specify address breakpoints and to trace program execution back through N instructions, where N is the depth of the stack. Both devices, plus interface logic and buffering, have been designed for an INTEL 8080-based system using approximately 25 integrated-circuit packages.

Sievers, M. W.↗

Development of a Power Electronics Unit for the Space Station Plasma Contactor

A hollow cathode plasma contactor has been baselined as a charge control device for the Space Station (SS) to prevent deleterious interactions of coated structural components with the ambient plasma. NASA LeRC Work Package 4 initiated the development of a plasma contactor system comprised of a Power Electronics Unit (PEU), an Expellant Management Unit (EMU), a command and data interface, and a Plasma Contactor Unit (PCU). A breadboard PEU was designed and fabricated. The breadboard PEU contains a cathode heater and discharge power supply, which were required to operate the PCU, a control and auxiliary power converter, an EMU interface, a command and telemetry interface, and a controller. The cathode heater and discharge supplies utilized a push-pull topology with a switching frequency of 20 kHz and pulse-width-modulated (PWM) control. A pulse ignition circuit derived from that used in arcjet power processors was incorporated in the discharge supply for discharge ignition. An 8088 based microcontroller was utilized in the breadboard model to provide a flexible platform for controller development with a simple command/data interface incorporating a direct connection to SS Mulitplexer/Demultiplexer (MDM) analog and digital I/O cards. Incorporating this in the flight model would eliminate the hardware and software overhead associated with a 1553 serial interface. The PEU autonomously operated the plasma contactor based on command inputs and was successfully integrated with a prototype plasma contactor unit demonstrating reliable ignition of the discharge and steady-state operation.

Hamley, John A.↗

Quick and Dirty WFPC2 Stellar Photometry

The latest release of the IRAF (Image Reduction and Analysis Facility) MXTOOLS package includes the new tasks QDWFPC2 (Quick and Dirty Wide Field and Planetary Camera, which does quick CCD (charge-coupled device) stellar photometry on two Hubble Space Telescope (HST) WFPC2 (Wide Field and Planetary Camera) observations: WFPC2COLOR, which converts HST WFPC2 instrumental magnitudes to standard colors using the Holtzman et al. color equations, and QDCMD (Quick and Dirty Color Magnitude Diagram), which reads the output of WFPC2COLOR and displays a color-magnitude diagram on a user-chosen graphics device.

Mighell, Kenneth J.↗

Neuro-Prosthetic Implants With Adjustable Electrode Arrays

Brushlike arrays of electrodes packaged with application-specific integrated circuits (ASICs) are undergoing development for use as electronic implants especially as neuro-prosthetic devices that might be implanted in brains to detect weak electrical signals generated by neurons. These implants partly resemble the ones reported in Integrated Electrode Arrays for Neuro-Prosthetic Implants (NPO-21198), NASA Tech Briefs, Vol. 27, No. 2 (February 2003), page 48. The basic idea underlying both the present and previously reported implants is that the electrodes would pick up signals from neurons and the ASICs would amplify and otherwise preprocess the signals for monitoring by external equipment. The figure presents a simplified and partly schematic view of an implant according to the present concept. Whereas the electrodes in an implant according to the previously reported concept would be microscopic wires, the electrodes according to the present concept are in the form of microscopic needles. An even more important difference would be that, unlike the previously reported concept, the present concept calls for the inclusion of microelectromechanical actuators for adjusting the depth of penetration of the electrodes into brain tissue. The prototype implant now under construction includes an array of 100 electrodes and corresponding array of electrode contact pads formed on opposite faces of a plate fabricated by techniques that are established in the art of microelectromechanical systems (MEMS). A mixed-signal ASIC under construction at the time of reporting the information for this article will include 100 analog amplifier channels (one amplifier per electrode). On one face of the mixed-signal ASIC there will be a solder-bump/micro-pad array that will have the same pitch as that of the electrode array, and that will be used to make the electrical and mechanical connections between the electrode array and the ASIC. Once the electrode array and the ASIC are soldered together, the remaining empty space between them will be filled with a biocompatible epoxy, the remaining exposed portions of the ASIC will be covered with micromachined plates for protection against corrosive bodily fluids, and then the ASIC and its covering micromachined plates will be coated with parylene

Whitacre, Jay↗

Evaluation of COTS SiGe, SOI, and Mixed Signal Electronic Parts for Extreme Temperature Use in NASA Missions

The NASA Electronic Parts and Packaging (NEPP) Program sponsors a task at the NASA Glenn Research Center titled "Reliability of SiGe, SOI, and Advanced Mixed Signal Devices for Cryogenic Space Missions." In this task COTS parts and flight-like are evaluated by determining their performance under extreme temperatures and thermal cycling. The results from the evaluations are published on the NEPP website and at professional conferences in order to disseminate information to mission planners and system designers. This presentation discusses the task and the 2010 highlights and technical results. Topics include extreme temperature operation of SiGe and SOI devices, all-silicon oscillators, a floating gate voltage reference, a MEMS oscillator, extreme temperature resistors and capacitors, and a high temperature silicon operational amplifier.

Patterson, Richard L.↗

Lightweight IMM PV Flexible Blanket Assembly

Deployable Space Systems (DSS) has developed an inverted metamorphic multijunction (IMM) photovoltaic (PV) integrated modular blanket assembly (IMBA) that can be rolled or z-folded. This IMM PV IMBA technology enables a revolutionary flexible PV blanket assembly that provides high specific power, exceptional stowed packaging efficiency, and high-voltage operation capability. DSS's technology also accommodates standard third-generation triple junction (ZTJ) PV device technologies to provide significantly improved performance over the current state of the art. This SBIR project demonstrated prototype, flight-like IMM PV IMBA panel assemblies specifically developed, designed, and optimized for NASA's high-voltage solar array missions.

Spence, Brian↗

Proton Irradiation of the 16GB Intel Optane SSD

The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).

Single-Event Effects (SEE)↗

NASA Electronic Parts and Packaging Field Programmable Gate Array Single Event Effects Test Guideline Update

The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic versus mission specific device evaluation, single event latch-up (SEL) test and analysis, SEE response visibility enhancement during radiation testing, mitigation evaluation (embedded and user-implemented), unreliable design and its affects to SEE Data, testing flushable architectures versus non-flushable architectures, intellectual property core (IP Core) test and evaluation (addresses embedded and user-inserted), heavy-ion energy and linear energy transfer (LET) selection, proton versus heavy-ion testing, fault injection, mean fluence to failure analysis, and mission specific system-level single event upset (SEU) response prediction. Most sections within the guidelines manual provide information regarding best practices for test structure and test system development. The scope of this manual addresses academic versus mission specific device evaluation and visibility enhancement in IP Core testing.

Field Programmable Gate Array (FPGA)↗

FPGA NEPP : FY09 summary report

This report documents the activities and results of the fiscal year 2009 (FY09) funding for the NASA Electronic Parts and Packaging (NEPP) program for re-programmable field programmable gate arrays (FPGAs). The FY09 task was divided into three efforts: 1. Device physics-based design modifications 2. Contention study of Xilinx Virtex-4 3. IDDQ study of Actel A54SX The FY09 NEPP FPGA study was organized into these three sections in recognition of the continued and increasing importance of FPGAs to NASA. FPGAs represent the state of the art in electronic components with millions and millions of transistors integrated into a single device. Modern NASA spacecraft design has dozens and dozens of FPGAs implemented onboard. FPGAs are used in critical command and data handling, instrument control and monitoring, and communications protocols, to name just a few. The reliability of FPGAs is fundamental to mission success for NASA.

Sheldon, Douglas↗

Hard X-ray and gamma-ray imaging spectroscopy for the next solar maximum

The objectives and principles are described of a single spectroscopic imaging package that can provide effective imaging in the hard X- and gamma-ray ranges. Called the High-Energy Solar Physics (HESP) mission instrument for solar investigation, the device is based on rotating modulation collimators with germanium semiconductor spectrometers. The instrument is planned to incorporate thick modulation plates, and the range of coverage is discussed. The optics permit the coverage of high-contrast hard X-ray images from small- and medium-sized flares with large signal-to-noise ratios. The detectors allow angular resolution of less than 1 arcsec, time resolution of less than 1 arcsec, and spectral resolution of about 1 keV. The HESP package is considered an effective and important instrument for investigating the high-energy solar events of the near-term future efficiently.

Hudson, H. S.↗

Piezoelectric transducer

Transducer consists of a hybrid thin film and a piezoelectric transistor that acts as a stress-sensitive device with built-in gain. It provides a stress/strain transducer that incorporates a signal amplification stage and sensor in a single package.

Conragan, J.↗

Polarizer mechanism for the space telescope faint object spectrograph

The polarizer mechanism for the Space Telescope Faint Object Spectrograph is described. This device will allow spectropolarimetric measurements of faint astronomical objects. The mechanism employs a unique arrangement to meet functional requirements in a compact package and with only one actuator. Detailed tolerance analysis and a variety of tests indicate that the polarizer is capable of accurate and reliable performance.

Thulson, M. D.↗

Wide field imaging of solar system objects with an 8192 x 8192 CCD mosaic

As part of this program, we successfully completed the construction of the world's largest CCD camera, an 8192 x 8192 CCD mosaic. The system employs 8 2K x 4K 3-edge buttable CCDs arranged in a 2 x 4 chip mosaic. The focal plane has small gaps (less than 1 mm) between mosaic elements and measures over 120 mm x 120 mm. The initial set of frontside illuminated CCDs were developed with Loral-Fairchild in a custom foundry run. The initial lots yielded of order 20 to 25 functional devices, of which we selected the best eight for inclusion for the camera. We have designed a custom 3-edge-buttable package that ensures the CCD dies are mounted flat to plus or minus 10 microns over the entire area of the mosaic. The mosaic camera system consists of eight separate readout signal chains controlled by two independent DSP microcontrollers. These are in turn interfaced to a Sun Sparc-10 workstation through two high speed fiber optic interfaces. The system saw first-light on the Canada-France-Hawaii Telescope on Mauna Kea in March 1995. First-light on the University of Hawaii 2.2-M Telescope on Mauna Kea was in July 1995. Both runs were quite successful. A sample of some of the early science from the first light run is reported in the publication, 'Observations of Weak Lensing in Clusters with an 8192 x 8192 CCD Mosaic Camera'.

Hall, Donald N. B.↗

Data Reduction and Control Software for Meteor Observing Stations Based on CCD Video Systems

The SPanish Meteor Network (SPMN) is performing a continuous monitoring of meteor activity over Spain and neighbouring countries. The huge amount of data obtained by the 25 video observing stations that this network is currently operating made it necessary to develop new software packages to accomplish some tasks, such as data reduction and remote operation of autonomous systems based on high-sensitivity CCD video devices. The main characteristics of this software are described here.

Madiedo, J. M.↗

FY12 End of Year Report for NEPP DDR2 Reliability

This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate 2 (DDR2) Reliability effort for FY2012. The task expanded the focus of evaluating reliability effects targeted for device examination. FY11 work highlighted the need to test many more parts and to examine more operating conditions, in order to provide useful recommendations for NASA users of these devices. This year's efforts focused on development of test capabilities, particularly focusing on those that can be used to determine overall lot quality and identify outlier devices, and test methods that can be employed on components for flight use. Flight acceptance of components potentially includes considerable time for up-screening (though this time may not currently be used for much reliability testing). Manufacturers are much more knowledgeable about the relevant reliability mechanisms for each of their devices. We are not in a position to know what the appropriate reliability tests are for any given device, so although reliability testing could be focused for a given device, we are forced to perform a large campaign of reliability tests to identify devices with degraded reliability. With the available up-screening time for NASA parts, it is possible to run many device performance studies. This includes verification of basic datasheet characteristics. Furthermore, it is possible to perform significant pattern sensitivity studies. By doing these studies we can establish higher reliability of flight components. In order to develop these approaches, it is necessary to develop test capability that can identify reliability outliers. To do this we must test many devices to ensure outliers are in the sample, and we must develop characterization capability to measure many different parameters. For FY12 we increased capability for reliability characterization and sample size. We increased sample size this year by moving from loose devices to dual inline memory modules (DIMMs) with an approximate reduction of 20 to 50 times in terms of per device under test (DUT) cost. By increasing sample size we have improved our ability to characterize devices that may be considered reliability outliers. This report provides an update on the effort to improve DDR2 testing capability. Although focused on DDR2, the methods being used can be extended to DDR and DDR3 with relative ease.

Guertin, Steven M.↗

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

JFET↗

Vibration-based health characterization of multiple IMUs in UAV applications

Inertial measurement units (IMUs) are vital in UAV navigation for vehicle attitude and position estimation, especially in the frequently-occurring case of temporary loss of GPS capabilities. Degradation in these units could yield inaccurate position estimates, resulting in incorrect input for vehicle control systems. A wide variety of these units exist to meet the needs of UAV operators, general aviation, and military vehicles. In recent decades, lightweight and inexpensive MEMS sensors have grown in popularity with respect to UAVs. Studies into the failure modes of MEMS devices suggest that vibration is one of the leading causes of MEMS degradation. MEMS sensors are generally encased in their own hermetic packaging, as their small size and sensitivity cause them to be particularly vulnerable to air damping and particulate contamination when exposed. Exposure to excessive vibration can cause cracking in this packaging as well as damage to connecting electronics, with recorded results that cause sensors to act outside of their specifications, potentially providing unreliable input to controllers. A prior study from the Politecnico di Torino looked into the degradation of MEMS IMUs, specifically the AXIS-AIS402, for aerospace and vibrating environments. In the study, the authors found that after exposing MEMS IMUs to simulated vibrations from working conditions of aerospace applications, the sensors showed increased noise and increased bias instability. At NASA Ames, several widely-used MEMS IMUs were selected for a new IMU degradation study, comparing accelerometer performance before and after exposure to similar levels of vibration simulating aerospace conditions. The IMUs were selected from the Pixhawk autopilot systems, hobby sUAS, or prior experimental studies at NASA. Additionally, the industrial grade VectorNav-100 IMU was selected as a ground truth reference point to which the performance of the test sensors can be compared. In the study, each sensor is exposed to functional levels of UAV vibration as replicated on a single-frequency vibratory table in the NASA Ames SHARP Laboratory, and each accelerometer is characterized for bias, drift, and noise characteristics both before and after vibratory exposure. The focus of this study is to monitor the health of the IMU sensors and determine if sensor degradation can be detected from output error and frequency spectrum analysis, rather than from microscopic examination of the sensors. In this case, sensor degradation and faulty data can be more easily detectable by non-experts hoping to use these sensors as an important piece of an integrated package. In addition, specific sensor degradation modes potentially leading to in-flight hazards could be identified, such as accelerated levels of drift and altered temperature response. The overall goal of this work is to increase levels of safety for future users of these sensors and to provide a clear analysis of sensor limitations currently lacking in most sensor specification documentation.

IMUs↗