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At least 379 records · Page 21
All sourcesNASA NTRSDOE OSTI
NASA NTRS1974

A membrane page composer - Further developments

Membrane page composers were made and were evaluated in a simulated holographic optical memory system. Calculated and experimentally determined electromechanical and optical characteristics of the circular membrane light valves used on the arrays are shown to be in close agreement. Several operating prototypes of 8 x 8 and 16 x 16 elements were produced. Measurements were made of switching time, optical contrast, and dynamic storage time of many cells on the devices. Digital patterns were stored in the arrays. The performance required of the page composer as a component of an optical memory system is considered. The fabrication techniques used can be easily extended to larger arrays.

Cosentino, L. S.↗
NASA NTRS2006

Pattern-Recognition Processor Using Holographic Photopolymer

proposed joint-transform optical correlator (JTOC) would be capable of operating as a real-time pattern-recognition processor. The key correlation-filter reading/writing medium of this JTOC would be an updateable holographic photopolymer. The high-resolution, high-speed characteristics of this photopolymer would enable pattern-recognition processing to occur at a speed three orders of magnitude greater than that of state-of-the-art digital pattern-recognition processors. There are many potential applications in biometric personal identification (e.g., using images of fingerprints and faces) and nondestructive industrial inspection. In order to appreciate the advantages of the proposed JTOC, it is necessary to understand the principle of operation of a conventional JTOC. In a conventional JTOC (shown in the upper part of the figure), a collimated laser beam passes through two side-by-side spatial light modulators (SLMs). One SLM displays a real-time input image to be recognized. The other SLM displays a reference image from a digital memory. A Fourier-transform lens is placed at its focal distance from the SLM plane, and a charge-coupled device (CCD) image detector is placed at the back focal plane of the lens for use as a square-law recorder. Processing takes place in two stages. In the first stage, the CCD records the interference pattern between the Fourier transforms of the input and reference images, and the pattern is then digitized and saved in a buffer memory. In the second stage, the reference SLM is turned off and the interference pattern is fed back to the input SLM. The interference pattern thus becomes Fourier-transformed, yielding at the CCD an image representing the joint-transform correlation between the input and reference images. This image contains a sharp correlation peak when the input and reference images are matched. The drawbacks of a conventional JTOC are the following: The CCD has low spatial resolution and is not an ideal square-law detector for the purpose of holographic recording of interference fringes. A typical state-of-the-art CCD has a pixel-pitch limited resolution of about 100 lines/mm. In contrast, the holographic photopolymer to be used in the proposed JTOC offers a resolution > 2,000 lines/mm. In addition to being disadvantageous in itself, the low resolution of the CCD causes overlap of a DC term and the desired correlation term in the output image. This overlap severely limits the correlation signal-to-noise ratio. The two-stage nature of the process limits the achievable throughput rate. A further limit is imposed by the low frame rate (typical video rates) of low- and medium-cost commercial CCDs.

Chao, Tien-Hsin↗
NASA NTRS2000

Flight Control Using Distributed Shape-Change Effector Arrays

Recent discoveries in material science and fluidics have been used to create a variety of novel effector devices that offer great potential to enable new approaches to aerospace vehicle flight control. Examples include small inflatable blisters, shape-memory alloy diaphragms, and piezoelectric patches that may be used to produce distortions or bumps on the surface of an airfoil to generate control moments. Small jets have also been used to produce a virtual shape-change through fluidic means by creating a recirculation bubble on the surface of an airfoil. An advanced aerospace vehicle might use distributed arrays of hundreds of such devices to generate moments for stabilization and maneuver control, either augmenting or replacing conventional ailerons, flaps or rudders. This research demonstrates the design and use of shape-change device arrays for a tailless aircraft in a low-rate maneuvering application. A methodology for assessing the control authority of the device arrays is described, and a suite of arrays is used in a dynamic simulation to illustrate allocation and deployment methodologies. Although the authority of the preliminary shape-change array designs studied in this paper appeared quite low, the simulation results indicate that the effector suite possessed sufficient authority to stabilize and maneuver the vehicle in mild turbulence.

Raney, David L.↗
NASA NTRS1997

Single-Event Upset in Flash Memories

This paper discusses single-event upset effets in flash memories, using heavy ions at the Texas A&M cyclotron. Initial results are presented for one manufacturer that compare uspet in the individual memory elemts with the more complex funtion failure modes that occur in the internal state machine and its control registers. This device is designed to function with either 5-V or 3.3-V power supply levels for read operations, but requires an additional 5 or 12-V power supply for write and erase operations.

Flash↗
NASA NTRS1992

Spacecraft optical disk recorder memory buffer control

The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

Hodson, Robert F.↗
NASA NTRS2017

Micron MT29F128G08AJAAA 128GB Asynchronous Flash Memory Total Ionizing Dose Characterization Test Report

The purpose of this test was to characterize the Micron MT29F128G08AJAAAs parameter degradation for total dose response and to evaluate and compare lot date codes for sensitivity. In the test, the device was exposed to both low dose and high dose rate (HDR) irradiations using gamma radiation. Device parameters such as leakage currents, quantity of upset bits and overall chip and die health were investigated to determine which lot is more robust.

Flash Memory↗
NASA NTRS1978

Suggested architecture for a specialized fluid dynamics computer

Future flow simulations in 3-D will require computers with extremely large main memories and an advantageous ratio between computer cost and arithmetic speed. Since random access memories are very expensive, a pipeline design is proposed which allows the use of much cheaper sequential devices without any sacrifice in speed for vector references (even with arbitrary spacing between successive elements). Also scalar arithmetic can be performed efficiently. The comparatively low speed of the proposed machine (about 10 to the 7th power operations per second) would be offset by a very low price per unit, making mass production possible.

Fornberg, B.↗
NASA NTRS1998

The mass storage testing laboratory at GSFC

Industry-wide benchmarks exist for measuring the performance of processors (SPECmarks), and of database systems (Transaction Processing Council). Despite storage having become the dominant item in computing and IT (Information Technology) budgets, no such common benchmark is available in the mass storage field. Vendors and consultants provide services and tools for capacity planning and sizing, but these do not account for the complete set of metrics needed in today's archives. The availability of automated tape libraries, high-capacity RAID systems, and high- bandwidth interconnectivity between processor and peripherals has led to demands for services which traditional file systems cannot provide. File Storage and Management Systems (FSMS), which began to be marketed in the late 80's, have helped to some extent with large tape libraries, but their use has introduced additional parameters affecting performance. The aim of the Mass Storage Test Laboratory (MSTL) at Goddard Space Flight Center is to develop a test suite that includes not only a comprehensive check list to document a mass storage environment but also benchmark code. Benchmark code is being tested which will provide measurements for both baseline systems, i.e. applications interacting with peripherals through the operating system services, and for combinations involving an FSMS. The benchmarks are written in C, and are easily portable. They are initially being aimed at the UNIX Open Systems world. Measurements are being made using a Sun Ultra 170 Sparc with 256MB memory running Solaris 2.5.1 with the following configuration: 4mm tape stacker on SCSI 2 Fast/Wide; 4GB disk device on SCSI 2 Fast/Wide; and Sony Petaserve on Fast/Wide differential SCSI 2.

Venkataraman, Ravi↗
NASA NTRS2004

Long distance quantum communication using quantum error correction

We describe a quantum error correction scheme that can increase the effective absorption length of the communication channel. This device can play the role of a quantum transponder when placed in series, or a cyclic quantum memory when inserted in an optical loop.

quantum memory quantum repeater↗
NASA NTRS1988

Arranging computer architectures to create higher-performance controllers

Techniques for integrating microprocessors, array processors, and other intelligent devices in control systems are reviewed, with an emphasis on the (re)arrangement of components to form distributed or parallel processing systems. Consideration is given to the selection of the host microprocessor, increasing the power and/or memory capacity of the host, multitasking software for the host, array processors to reduce computation time, the allocation of real-time and non-real-time events to different computer subsystems, intelligent devices to share the computational burden for real-time events, and intelligent interfaces to increase communication speeds. The case of a helicopter vibration-suppression and stabilization controller is analyzed as an example, and significant improvements in computation and throughput rates are demonstrated.

Jacklin, Stephen A.↗
NASA NTRS1989

Electronic shift register memory based on molecular electron-transfer reactions

The design of a shift register memory at the molecular level is described in detail. The memory elements are based on a chain of electron-transfer molecules incorporated on a very large scale integrated (VLSI) substrate, and the information is shifted by photoinduced electron-transfer reactions. The design requirements for such a system are discussed, and several realistic strategies for synthesizing these systems are presented. The immediate advantage of such a hybrid molecular/VLSI device would arise from the possible information storage density. The prospect of considerable savings of energy per bit processed also exists. This molecular shift register memory element design solves the conceptual problems associated with integrating molecular size components with larger (micron) size features on a chip.

Hopfield, J. J.↗
NASA NTRS1976

Computer-aided analysis of CCD linear image sensors

Special test equipment and techniques to collect and process image information from charge coupled devices (CCDs) by digital computer were reviewed. The video channel was traced from the CCD to the direct memory access bus of the Interdata Computer. Software was developed to evaluate and characterize a CCD for (1) dark signal versus temperature relationship, (2) calculation of temporal noise magnitude and noise shape for each pixel, (3) spatial noise into the video chain due to dark signal, (4) response versus illumination relationship (gamma), (5) response versus wavelength of illumination (spectral), (6) optimization of forcing functions, and (7) evaluation of an image viewed by a CCD. The basic software differences and specific examples of each program operating on real data are presented.

Prince, S. S.↗
NASA NTRS1981

Video image processor on the Spacelab 2 Solar Optical Universal Polarimeter /SL2 SOUP/

The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.

Lindgren, R. W.↗
NASA NTRS1984

Flight critical system design guidelines and validation methods

Efforts being expended at NASA-Langley to define a validation methodology, techniques for comparing advanced systems concepts, and design guidelines for characterizing fault tolerant digital avionics are described with an emphasis on the capabilities of AIRLAB, an environmentally controlled laboratory. AIRLAB has VAX 11/750 and 11/780 computers with an aggregate of 22 Mb memory and over 650 Mb storage, interconnected at 256 kbaud. An additional computer is programmed to emulate digital devices. Ongoing work is easily accessed at user stations by either chronological or key word indexing. The CARE III program aids in analyzing the capabilities of test systems to recover from faults. An additional code, the semi-Markov unreliability program (SURE) generates upper and lower reliability bounds. The AIRLAB facility is mainly dedicated to research on designs of digital flight-critical systems which must have acceptable reliability before incorporation into aircraft control systems. The digital systems would be too costly to submit to a full battery of flight tests and must be initially examined with the AIRLAB simulation capabilities.

Holt, H. M.↗
NASA NTRS1993

SRAM As An Array Of Energetic-Ion Detectors

Static random-access memory (SRAM) designed for use as array of energetic-ion detectors. Exploits well-known tendency of incident energetic ions to cause bit flips in cells of electronic memories. Design of ion-detector SRAM involves modifications of standard SRAM design to increase sensitivity to ions. Device fabricated by use of conventional complementary metal oxide/semiconductor (CMOS) processes. Potential uses include gas densimetry, position sensing, and measurement of cosmic-ray spectrum.

Buehler, Martin G.↗
NASA NTRS1996

Smart Material Demonstrators Based on Shape Memory Alloys and Electroceramics

This paper describes the development and characterization of two technology demonstrators that were produced under the auspices of an ARPA sponsored smart materials synthesis and processing effort. The ARPA Smart Materials and Synthesis (SMS) Program was a 2 year, $10M partnership led by Martin Marietta Laboratories - Baltimore and included Lockheed Missiles & Space Co., NRL, AVX Corp., Martin Marietta Astronautics Groups, BDM Federal, Inc., Virginia Tech, Clemson, University of Maryland, Denver University, and The Johns Hopkins University. In order to demonstrate the usefulness of magnetron sputtered shape memory foil and the manufacturability of reliable, reproducible electrostrictive actuators, the team designed a broadband active vibration cancellation device for suppressing the vibration load on delicate instruments and precision pointing devices mounted on orbiting satellites and spacecraft. The results of extensive device characterization and bench testing are discussed. Initial simulation results show excellent control authority and amplitude attenuation over the range of anticipated disturbance frequencies. The SMS Team has also developed an active 1-3 composite comprising micro-electrostrictive actuators embedded in a polymeric matrix suitable for underwater applications such as sonar quieting and listening arrays, and for medical imaging. Follow-on programs employing these technologies are also described.

Cooke, Arther V.↗