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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 379 records · Page 21
All sourcesNASA NTRSDOE OSTI
NASA NTRS2016

James Webb Space Telescope Core 2 Test - Cryogenic Thermal Balance Test of the Observatorys Core Area Thermal Control Hardware

The James Webb Space Telescope (JWST), successor to the Hubble Space Telescope, will be the largest astronomical telescope ever sent into space. To observe the very first light of the early universe, JWST requires a large deployed 6.5-meter primary mirror cryogenically cooled to less than 50 Kelvin. Three scientific instruments are further cooled via a large radiator system to less than 40 Kelvin. A fourth scientific instrument is cooled to less than 7 Kelvin using a combination pulse-tube Joule-Thomson mechanical cooler. Passive cryogenic cooling enables the large scale of the telescope which must be highly folded for launch on an Ariane 5 launch vehicle and deployed once on orbit during its journey to the second Earth-Sun Lagrange point. Passive cooling of the observatory is enabled by the deployment of a large tennis court sized five layer Sunshield combined with the use of a network of high efficiency radiators. A high purity aluminum heat strap system connects the three instrument's detector systems to the radiator systems to dissipate less than a single watt of parasitic and instrument dissipated heat. JWST's large scale features, while enabling passive cooling, also prevent the typical flight configuration fully-deployed thermal balance test that is the keystone of most space missions' thermal verification plans. This paper describes the JWST Core 2 Test, which is a cryogenic thermal balance test of a full size, high fidelity engineering model of the Observatory's 'Core' area thermal control hardware. The 'Core' area is the key mechanical and cryogenic interface area between all Observatory elements. The 'Core' area thermal control hardware allows for temperature transition of 300K to approximately 50 K by attenuating heat from the room temperature IEC (instrument electronics) and the Spacecraft Bus. Since the flight hardware is not available for test, the Core 2 test uses high fidelity and flight-like reproductions.

JWST Thermal Core 2 Test↗
NASA NTRS2015

Veggie and the VEG-01 Hardware Validation Test

This presentation presents a brief overview of KSC plant science hardware for space and then details the Veggie hardware and the VEG-01 hardware validation test. The test results and future plans are discussed.

Massa, Gioia↗
NASA NTRS2017

Hardware Interface Description for the Integrated Power, Avionics, and Software (iPAS) Space Telecommunications Radio Ssystem (STRS) Radio

The Space Telecommunications Radio System (STRS) provides a common, consistent framework for software defined radios (SDRs) to abstract the application software from the radio platform hardware. The STRS standard aims to reduce the cost and risk of using complex, configurable and reprogrammable radio systems across NASA missions. To promote the use of the STRS architecture for future NASA advanced exploration missions, NASA Glenn Research Center (GRC) developed an STRS-compliant SDR on a radio platform used by the Advance Exploration System program at the Johnson Space Center (JSC) in their Integrated Power, Avionics, and Software (iPAS) laboratory. The iPAS STRS Radio was implemented on the Reconfigurable, Intelligently-Adaptive Communication System (RIACS) platform, currently being used for radio development at JSC. The platform consists of a Xilinx ML605 Virtex-6 FPGA board, an Analog Devices FMCOMMS1-EBZ RF transceiver board, and an Embedded PC (Axiomtek eBox 620-110-FL) running the Ubuntu 12.4 operating system. Figure 1 shows the RIACS platform hardware. The result of this development is a very low cost STRS compliant platform that can be used for waveform developments for multiple applications.The purpose of this document is to describe how to develop a new waveform using the RIACS platform and the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) FPGA wrapper code and the STRS implementation on the Axiomtek processor.

Flight Computer↗
NASA NTRS2017

Parameter Validation for Evaluation of Spaceflight Hardware Reusability

Within recent years, there has been an influx of companies around the world pursuing reusable systems for space flight. Much like NASA, many of these new entrants are learning that reusable systems are complex and difficult to acheive. For instance, in its first attempts to retrieve spaceflight hardware for future reuse, SpaceX unsuccessfully tried to land on a barge at sea, resulting in a crash-landing. As this new generation of launch developers continues to develop concepts for reusable systems, having a systematic approach for determining the most effective systems for reuse is paramount. Three factors that influence the effective implementation of reusability are cost, operability and reliability. Therefore, a method that integrates these factors into the decision-making process must be utilized to adequately determine whether hardware used in space flight should be reused or discarded. Previous research has identified seven features that contribute to the successful implementation of reusability for space flight applications, defined reusability for space flight applications, highlighted the importance of reusability, and presented areas that hinder successful implementation of reusability. The next step is to ensure that the list of reusability parameters previously identified is comprehensive, and any duplication is either removed or consolidated. The characteristics to judge the seven features as good indicators for successful reuse are identified and then assessed using multiattribute decision making. Next, discriminators in the form of metrics or descriptors are assigned to each parameter. This paper explains the approach used to evaluate these parameters, define the Measures of Effectiveness (MOE) for reusability, and quantify these parameters. Using the MOEs, each parameter is assessed for its contribution to the reusability of the hardware. Potential data sources needed to validate the approach will be identified.

Childress-Thompson, Rhonda↗
NASA NTRS2017

Parameter Validation for Evaluation of Spaceflight Hardware Reusability

Within recent years, there has been an influx of companies around the world pursuing reusable systems for space flight. Much like NASA, many of these new entrants are learning that reusable systems are complex and difficult to acheive. For instance, in its first attempts to retrieve spaceflight hardware for future reuse, SpaceX unsuccessfully tried to land on a barge at sea, resulting in a crash-landing. As this new generation of launch developers continues to develop concepts for reusable systems, having a systematic approach for determining the most effective systems for reuse is paramount. Three factors that influence the effective implementation of reusability are cost, operability and reliability. Therefore, a method that integrates these factors into the decision-making process must be utilized to adequately determine whether hardware used in space flight should be reused or discarded. Previous research has identified seven features that contribute to the successful implementation of reusability for space flight applications, defined reusability for space flight applications, highlighted the importance of reusability, and presented areas that hinder successful implementation of reusability. The next step is to ensure that the list of reusability parameters previously identified is comprehensive, and any duplication is either removed or consolidated. The characteristics to judge the seven features as good indicators for successful reuse are identified and then assessed using multiattribute decision making. Next, discriminators in the form of metrics or descriptors are assigned to each parameter. This paper explains the approach used to evaluate these parameters, define the Measures of Effectiveness (MOE) for reusability, and quantify these parameters. Using the MOEs, each parameter is assessed for its contribution to the reusability of the hardware. Potential data sources needed to validate the approach will be identified.

Childress-Thompson, Rhonda↗
NASA NTRS2018

Use of Shuttle Heritage Hardware in Space Launch System (SLS) Application-Structural Assessment

NASA is moving forward with the development of the next generation system of human spaceflight to meet the Nation's goals of human space exploration. To meet these goals, NASA is aggressively pursuing the development of an integrated architecture and capabilities for safe crewed and cargo missions beyond low-Earth orbit. Two important tenets critical to the achievement of NASA's strategic objectives are Affordability and Safety. The Space Launch System (SLS) is a heavy-lift launch vehicle being designed/developed to meet these goals. The SLS Block 1 configuration (Figure 1) will be used for the first Exploration Mission (EM-1). It utilizes existing hardware from the Space Shuttle inventory, as much as possible, to save cost and expedite the schedule. SLS Block 1 Elements include the Core Stage, "Heritage" Boosters, Heritage Engines, and the Integrated Spacecraft and Payload Element (ISPE) consisting of the Launch Vehicle Stage Adapter (LVSA), the Multi-Purpose Crew Vehicle (MPCV) Stage Adapter (MSA), and an Interim Cryogenic Propulsion Stage (ICPS) for Earth orbit escape and beyond-Earth orbit in-space propulsive maneuvers. When heritage hardware is used in a new application, it requires a systematic evaluation of its qualification. In addition, there are previously-documented Lessons Learned (Table -1) in this area cautioning the need of a rigorous evaluation in any new application. This paper will exemplify the systematic qualification/assessment efforts made to qualify the application of Heritage Solid Rocket Booster (SRB) hardware in SLS. This paper describes the testing and structural assessment performed to ensure the application is acceptable for intended use without having any adverse impact to Safety. It will further address elements such as Loads, Material Properties and Manufacturing, Testing, Analysis, Failure Criterion and Factor of Safety (FS) considerations made to reach the conclusion and recommendation.

Aggarwal, Pravin↗
NASA NTRS2016

NASA HUNCH Hardware

High School students United with NASA to Create Hardware (HUNCH) partners NASA centers with high schools and middle schools in states across the nation. The HUNCH program is a school-based innovative program that promotes student interest in science, technology, engineering, and mathematics. While students are building hardware, softgoods, prototypes, or experiments for NASA, they are also building their interest as researchers, as well as their self-confidence. The 2015-2016 school year marks the 13th year of the HUNCH program while this is the second year of the HUNCH program at NASA Glenn Research Center (GRC). This year GRC partnered with 6 schools where students built various components needed to assemble International Space Station Single Stowage Locker flight hardware. In addition, Glenn worked with a new school on the Softgoods program and hosted all 7 schools along with 4 Design and Prototype schools with a recognition ceremony and tours at NASA Glenns Plum Brook Station in Sandusky, OH. Highlights from the work that the GRC schools did throughout the school year will be presented.

ISS↗
NASA NTRS2019

NASA's Approach to Additive Manufacturing Certification: Methodologies for Qualification of Additively Manufactured Aerospace Hardware

NASA's Approach to Additive Manufacturing Certification: Methodologies for Qualification of Additively Manufactured Aerospace Hardware. This course is intended to provide guidance and practical methodologies on how to establish a qualified process and deliver certifiable hardware per the requirements in MSFC-STD-3716 and MSFC-SPEC-3717. Course Objectives: Reinforce a basic understanding of AM processes; Become familiar with MSFC-STD-3716 and MSFC-SPEC-3717 requirements for metallic spaceflight hardware; Appreciate integrated path to Qualification and Certification; Understand products necessary to get you to Qualification and Certification.

West, Brian↗
NASA NTRS2015

Flight-Tested Hardware Options Currently Available to Support Fruit Fly Science Missions on ISS

The Fruit Fly Lab team at Ames Research Center has developed and flown several versions of hardware to ISS that have been utilized to conduct research using the model organism, Drosophila melanogaster. These sets of hardware vary in complexity and capabilities and can be matched to experiments based on specific aims objectives and considerations for cost, updownmass, and crew time requirements. The team has multiple investigators slated to utilize this hardware on near-term missions to ISS, and is expecting more from future calls for proposals.

Fruit Fly↗
NASA NTRSDate not supplied

Psyche Hardware Abstraction Simulation Environment (PHASE): Development of High-Fidelity Downlink Model for Flight Software Performance Testing

NASA’s Katherine Johnson Independent Verification and Validation (IV&V) Independent Test Capability (ITC) Team develops high fidelity software-only simulations (or “digital-twins”) of NASA’s most critical missions that are then used for software verification and validation (V&V). One such digital-twin simulator nearing maturity is the Psyche Hardware Abstraction Simulation Environment (PHASE). PHASE utilizes an instruction set simulator along with ITC-developed avionics models. PHASE includes a newly-developed model of the telecom hardware with a high-fidelity downlink interface, capable of supporting reconfigurable downlink data rates and transmission modes. The different downlink transmission modes allow more processing to be ceded from software onto the telecom hardware. Thus, we are able to monitor the performance of the downlink software module in the time-partitioned OS and perform more realistic dynamic testing based on software’s resource utilization. This presentation will cover PHASE, avionics modeling, the downlink model, and its usage for flight software performance testing.

modeling↗
NASA NTRS2021

Europa Environmental Testing of Thermal Hardware for the Mapping Imaging Spectrometer for Europa (MISE) Instrument

The Europa Clipper spacecraft, scheduled for launch in June 2022, hosts a suite of instruments including the Mapping Imaging Spectrometer for Europa (MISE). MISE is a high-optical through-put pushbroom infrared imaging spectrometer that can collect measurements within Europa’s challenging radiation environment. It is externally mounted to the spacecraft and as a result is exposed to high radiation levels and cold temperatures. The instrument consists of a scan mirror assembly, an optical bench including a Dyson spectrometer and a telescope, and a structure that supports a cryocooler and a radiator. The cryocooler is used to actively cool the focal plane array and the spectrometer. The heat from the cryocooler is rejected through pyrolytic graphite sheet thermal straps to a honeycomb radiator. MISE will implement thermal hardware that will either not be used on other parts of the spacecraft or have a more extreme environment than the spacecraft. As a result, the MISE instrument performed numerous environmental tests on its thermal hardware. This paper discusses the results of the thermal cycling and radiation tests performed on the MISE thermal hardware including a Lockheed Martin Micro1-2 cryocooler, Pyrolytic graphite sheet thermal straps, Annealed pyrolytic graphite K-Core, Rosemount Platinum Resistance Thermometers, Tayco Kapton Thermofoil heaters, Dale Ohm resistors, and aluminum honeycomb and facesheets.

Strong, Patrick↗
NASA NTRSDate not supplied

Having a Come-Apart: Lessons Learned from Additively Manufactured Hardware Failures

NASA has been engaged with additively manufactured (AM) process and component development since the 2000’s. AM offers various technical advantages, such as enhanced hardware design complexity, part consolidation, and processing of novel alloys in addition to programmatic advantages for reduction in processing time and cost. The focus of much of the AM development at NASA has been to mature the various processes, characterize material properties, develop standards, produce demonstrator parts, and integrate AM hardware in liquid rocket engines. These aspects have been demonstrated through process and design iterations using a methodical characterization, test-fail-fix cycles, as well as application and dissemination of lessons learned. In addition to these fundamental demonstrations of the AM process and hardware development, alloys that provide performance advantages in the high temperature and high-pressure environments have been matured for use in rocket engines. These environments are challenging for any alloy and any design, and the AM process is required to fully meet the intended design requirements. The importance of proper AM process was made evident in the failure of a Laser Powder Bed Fusion (L-PBF) copper-alloy combustion chamber during a hot-fire test due to a degraded material quality resulted from an AM process issue. The hot-fire test aimed to demonstrate high duty cycle under a risk-tolerant development project, where consequences of component failure would be minimal. However, the unintentional component failure emphasized the necessity of robust material characterization and rigorous process control procedures for the safe use of AM components in critical applications. In part, such concerns motivate the AM certification approach that NASA has recently adopted in NASA-STD-6030 “Additive Manufacturing Requirements for Spaceflight Systems”. This presentation provides an overview of the previously mentioned failure, a discussion on the evaluation of the failed chamber and supplemental chambers produced at the same time, a representative material samples that included intentional build witness lines, and a summary of the key results and recommendations from the evaluations. NASA continues to approach AM processes and designs with a level of risk and acceptance of failures that is appropriate for the project objectives, with the overall goal of safe implementation of AM technology and transferring AM technology into commercial space applications. The objective of this presentation is to provide awareness to the community working critical and non-critical AM components and the lessons learned on proper implementation of AM.

Additive Manufacturing↗
NASA NTRS2023

Real-Time Hardware-in-the-Loop Evaluation of A Partially Turboelectric Propulsion Control Design

In support of aviation fuel burn and emission reduction goals, NASA is pursuing high-payoff research investments that promise to transform aviation. This includes investments in Electrified Aircraft Propulsion (EAP). Multiple technology challenges must be addressed to unlock the full potential of EAP. This includes addressing challenges related to propulsion controls, which will be vital for ensuring efficient coordinated operation of EAP subsystems. This paper presents results from real-time hardware-in-theloop (HIL) testing of a control design for a single aisle partially-turboelectric aircraft propulsion concept conducted at the NASA Electric Aircraft Testbed (NEAT) facility. The control system under test is designed for a propulsion concept consisting of two wing-mounted turbofan engines that produce thrust and generate electrical power to drive a boundary layer ingesting tailfan propulsor via an electrical motor. An integrated control strategy is applied to ensure coordinated operation of the turbofan and tailfan subsystems during steady-state and transient operation throughout the flight envelope. The NEAT test of this integrated control design consists of a partially HIL, partially simulated configuration. A subscale representation of the electrical system design is implemented in hardware and mechanically coupled to electric machines that emulate turbomachinery and propulsor shaft dynamics. The hardware configuration is then operated under the control of a real-time computer application that runs a simulation of the propulsion system and the developed control logic. The NEAT facility test campaign includes a series of experiments that subject the control design to throttle transients conducted throughout the flight envelope and full-flight mission profiles. Testing under simulated performance degradation is also conducted to evaluate control design robustness. This includes constant and abrupt changes in degradation levels. Results from the HIL test are presented and shown to be in good agreement with pretest simulation predictions demonstrating the efficacy of the integrated control design approach.

Electrified Aircraft Propulsion↗
NASA NTRS2024

Loads and Structural Dynamics Requirements for Spaceflight Hardware

The NASA Exploration Systems Development Mission Directorate requires Crewed Space Systems (CSS) to meet the intent of a set of Engineering Technical Authority (TA) documents called out in HEOMD-003, Crewed Deep Space Systems Human Rating Certification Requirements and Standards for NASA Missions. For the Loads and Dynamics technical discipline, the document invoked by the HEOMD-003 is JSC 65829, Loads and Structural Dynamics Requirements for Spaceflight Hardware. JSC 65829 was originally developed for the NASA Commercial Crew Program as an implementation of NASA STD-5002, Load Analyses of Spacecraft and Payloads, for that Program. Since that time, tailored alternatives to JSC 65829 have been produced for the Gateway, Human Landing System, and Extravehicular Activity and Human Surface Mobility Programs. Experience with those Programs has shown that the reduced set of less-prescriptive requirements in those tailored documents offers an advantage over the set of requirements in JSC 65829 Rev A and is a better fit for the paradigm of NASA procurement of commercially developed systems for crewed spaceflight. Revision B of JSC 65829 has been constructed to align with those tailored documents. The reduction in the number and specificity of requirements is balanced by a new requirement for hardware developers to create and provide a Loads Control Plan which describes how the approaches used to generate design-to loads and dynamic environments and substantiate dynamic model validity satisfy the requirements herein. The Plan will establish an agreement between the hardware developer and the TA for the loads and dynamics discipline and offer an opportunity for reengagement if the Plan changes during development.

Kenneth Schultz↗
DOE OSTI2011

BlackjackBench: Portable Hardware Characterization

DARPA's AACE project aimed to develop Architecture Aware Compiler Environments that automatically characterize the hardware and optimize the application codes accordingly. We present the BlackjackBench suite, a collection of portable micro-benchmarks that automate system characterization, plus statistical analysis techniques for interpreting the results. BlackjackBench discovers the effective sizes and speeds of the hardware environment rather than the often unattainable peak values. We aim at hardware features that can be observed by running executables generated by existing compilers from standard C codes. We characterize the memory hierarchy, including cache sharing and NUMA characteristics of the system, properties of the processing cores affecting execution speed, and the length of the OS scheduler time slot. We show how these features of modern multicores can be discovered programmatically. We also show how the features could interfere with each other resulting in incorrect interpretation of the results, and how established classification and statistical analysis techniques reduce experimental noise and aid automatic interpretation of results.

99 GENERAL AND MISCELLANEOUS↗
DOE OSTI2012

Hardware support for collecting performance counters directly to memory

Hardware support for collecting performance counters directly to memory, in one aspect, may include a plurality of performance counters operable to collect one or more counts of one or more selected activities. A first storage element may be operable to store an address of a memory location. A second storage element may be operable to store a value indicating whether the hardware should begin copying. A state machine may be operable to detect the value in the second storage element and trigger hardware copying of data in selected one or more of the plurality of performance counters to the memory location whose address is stored in the first storage element.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2015

Hardware based redundant multi-threading inside a GPU for improved reliability

A system and method for verifying computation output using computer hardware are provided. Instances of computation are generated and processed on hardware-based processors. As instances of computation are processed, each instance of computation receives a load accessible to other instances of computation. Instances of output are generated by processing the instances of computation. The instances of output are verified against each other in a hardware based processor to ensure accuracy of the output.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2014

Apparatus for electrical isolation of metallic hardware

An apparatus for electrical isolation of metallic hardware is provided and includes an item of hardware and an isolation sheet disposed in contact with the item of hardware. The isolation sheet includes first and second opposing sides at least one of which is anodized.

36 MATERIALS SCIENCE↗