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At least 379 records · Page 21

Voltage regulator for battery power source

A bipolar transistor in series with the battery as the control element also in series with a zener diode and a resistor is used to maintain a predetermined voltage until the battery voltage decays to very nearly the predetermined voltage. A field effect transistor between the base of the bipolar transistor and a junction between the zener diode and resistor regulates base current of the bipolar transistor, thereby regulating the conductivity of the bipolar transistor for control of the output voltage.

Black, J. M.↗

Particle-Hole Symmetry and the Fractional Quantum Hall Effect in the Lowest Landau Level

Here, we report on detailed experimental studies of a high-quality heterojunction insulated-gate field-effect transistor (HIGFET) to probe the particle-hole symmetry of the fractional quantum Hall effect (FQHE) states about half-filling in the lowest Landau level. The HIGFET is specially designed to vary the density of a two-dimensional electronic system under constant magnetic fields. We find in our constant magnetic field, variable density measurements that the sequence of FQHE states at filling factors ν = 1/3, 2/5, 3/7… and its particle-hole conjugate states at filling factors 1-ν = 2/3, 3/5, 4/7… have a very similar energy gap. Moreover, a reflection symmetry can be established in the magnetoconductivities between the ν and 1-ν states about half-filling. Our results demonstrate that the FQHE states in the lowest Landau level are manifestly particle-hole symmetric.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

Neudeck, Philip G.↗

Preamplifier Noise in VLF Receivers

Noise specifications for junction field-effect transistors are presented in different ways depending on the particular semiconductor manufacturer. Arithmetic involved in converting these specifications to equivalent RMS noise in microvolts developed at the preamplifier input terminal is reviewed. These methods were useful for estimating the noise performance of high input impedance preamplifiers used with E-field antennas operating in the range of 1 KHz to 10 MHz. Both the JFET MPF-102 transistor and the COS/MOS CA3600 transistor array provided amplification for VLF receivers where the internally generated noise was well below the atmospheric noise level. The CA3600 transistor array provided better performance because of the more symmetrical complementary MOS transistor transfer characteristics than a single N-type biased JFET transistor. The CMOS amplifier resulted in self-compensating gain characteristics over a very wide temperature range from -55 to +125 C.

Burhans, R. W.↗

Characterization of multilayer GaAs/AlGaAs transistor structures by variable angle spectroscopic ellipsometry

Variable angle of incidence spectroscopic ellipsometry (VASE) has been implemented as a means of determining layer thickness, alloy composition, and growth quality of GaAs/AlGaAs samples composed of relatively thick layers as well as superlattices. The structures studied in this work contained GaAs/AlGaAs multilayers with a superlattice 'barrier' and were grown for later formation of modulation-doped field effect transistors (MODFETs). Sample modeling was performed by treating the superlattice as a bulk AlGaAs layer of unknown composition. Extremely good data fits were realized when five layer thicknesses and two alloy ratios were allowed to vary in a regression analysis. Room temperature excitonic effects associated with the e-hh(1), e-lh(1) and e-hh(2) transitions were observed in the VASE data.

Merkel, Kenneth G.↗

High Electron Mobility Transistor Structures on Sapphire Substrates Using CMOS Compatible Processing Techniques

System-on-a-chip (SOC) processes are under intense development for high-speed, high frequency transceiver circuitry. As frequencies, data rates, and circuit complexity increases, the need for substrates that enable high-speed analog operation, low-power digital circuitry, and excellent isolation between devices becomes increasingly critical. SiGe/Si modulation doped field effect transistors (MODFETs) with high carrier mobilities are currently under development to meet the active RF device needs. However, as the substrate normally used is Si, the low-to-modest substrate resistivity causes large losses in the passive elements required for a complete high frequency circuit. These losses are projected to become increasingly troublesome as device frequencies progress to the Ku-band (12 - 18 GHz) and beyond. Sapphire is an excellent substrate for high frequency SOC designs because it supports excellent both active and passive RF device performance, as well as low-power digital operations. We are developing high electron mobility SiGe/Si transistor structures on r-plane sapphire, using either in-situ grown n-MODFET structures or ion-implanted high electron mobility transistor (HEMT) structures. Advantages of the MODFET structures include high electron mobilities at all temperatures (relative to ion-implanted HEMT structures), with mobility continuously improving to cryogenic temperatures. We have measured electron mobilities over 1,200 and 13,000 sq cm/V-sec at room temperature and 0.25 K, respectively in MODFET structures. The electron carrier densities were 1.6 and 1.33 x 10(exp 12)/sq cm at room and liquid helium temperature, respectively, denoting excellent carrier confinement. Using this technique, we have observed electron mobilities as high as 900 sq cm/V-sec at room temperature at a carrier density of 1.3 x 10(exp 12)/sq cm. The temperature dependence of mobility for both the MODFET and HEMT structures provides insights into the mechanisms that allow for enhanced electron mobility as well as the processes that limit mobility, and will be presented.

Mueller, Carl↗

Characterizing Defects Inside Hexagonal Boron Nitride Using Random Telegraph Signals in van der Waals 2D Transistors

Single-crystal hexagonal boron nitride (hBN) is used extensively in many two-dimensional electronic and quantum devices, where defects significantly impact performance. Therefore, characterizing and engineering hBN defects are crucial for advancing these technologies. Here, we examine the capture and emission dynamics of defects in hBN by utilizing low-frequency noise (LFN) spectroscopy in hBN-encapsulated and graphene-contacted MoS 2 field-effect transistors (FETs). The low disorder of this heterostructure allows the detection of random telegraph signals (RTS) in large device dimensions of 100 μm 2 at cryogenic temperatures. Analysis of gate bias- and temperature-dependent LFN data indicate that RTS originates from a single trap species within hBN. By performing multi-space density functional theory (MS-DFT) calculations on a gated defective hBN/MoS 2 heterostructure model, we assign substitutional carbon atoms in boron sites as the atomistic origin of RTS. This study demonstrates the utility of LFN spectroscopy combined with MS-DFT analysis on a low-disorder all-vdW FET as a powerful means for characterizing the atomistic defects in single-crystal hBN.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Light sources with bias tunable spectrum based on van der Waals interface transistors

Light-emitting electronic devices are ubiquitous in key areas of current technology, such as data communications, solid-state lighting, displays, and optical interconnects. Controlling the spectrum of the emitted light electrically, by simply acting on the device bias conditions, is an important goal with potential technological repercussions. However, identifying a material platform enabling broad electrical tuning of the spectrum of electroluminescent devices remains challenging. Here, we propose light-emitting field-effect transistors based on van der Waals interfaces of atomically thin semiconductors as a promising class of devices to achieve this goal. We demonstrate that large spectral changes in room-temperature electroluminescence can be controlled both at the device assembly stage –by suitably selecting the material forming the interfaces– and on-chip, by changing the bias to modify the device operation point. Even though the precise relation between device bias and kinetics of the radiative transitions remains to be understood, our experiments show that the physical mechanism responsible for light emission is robust, making these devices compatible with simple large areas device production methods.

36 MATERIALS SCIENCE↗

Solid State Ephemeral Electric Potential and Electric Field Sensor

Systems, methods, and devices of the various embodiments provide a field effect transistor (FET) that controls equilibrium by reversing the effects of leakage currents affecting the gate response of the FET by using an equilibrium pump electrode. The equilibrium reversing gate FETs (ergFETs) of the various embodiments, may include an equilibrium pump electrode located within a non-conducting gap. The ergFETs of the various embodiments may provide solid state ephemeral electric potential and electric field sensor systems and methods for measuring ephemeral electric potentials and electric fields.

Generazio, Edward R.↗

Single-Chip T/R Module for 1.2 GHz

A single-chip CMOS-based (complementary-metal-oxide-semiconductorbased) transmit/receive (T/R) module is being developed for L-band radar systems. Previous T/R module implementations required multiple chips employing different technologies (GaAs, Si, and others) combined with off-chip transmission lines and discrete components including circulators. The new design eliminates the bulky circulator, significantly reducing the size and mass of the T/R module. Compared to multi-chip designs, the single-chip CMOS can be implemented with lower cost. These innovations enable cost-effective realization of advanced phased array and synthetic aperture radar systems that require integration of thousands of T/R modules. The circulator is a ferromagnetic device that directs the flow of the RF (radio frequency) power during transmission and reception. During transmission, the circulator delivers the transmitted power from the amplifier to the antenna, while preventing it from damaging the sensitive receiver circuitry. During reception, the circulator directs the energy from the antenna to the low-noise amplifier (LNA) while isolating the output of the power amplifier (PA). In principle, a circulator could be replaced by series transistors acting as electronic switches. However, in practice, the integration of conventional series transistors into a T/R chip introduces significant losses and noise. The prototype single-chip T/R module contains integrated transistor switches, but not connected in series; instead, they are connected in a shunt configuration with resonant circuits (see figure). The shunt/resonant circuit topology not only reduces the losses associated with conventional semiconductor switches but also provides beneficial transformation of impedances for the PA and the LNA. It provides full singlepole/ double-throw switching for the antenna, isolating the LNA from the transmitted signal and isolating the PA from the received signal. During reception, the voltage on control line RX/TX (raised bar) is high, causing the field-effect transistor (FET) switch S1 to be closed, forming a parallel resonant tank circuit L1||C1. This circuit presents high impedance to the left of the antenna, so that the received signal is coupled to the LNA. At the same time, FET switches S2 and S3 are open, so that C2 is removed from the circuit (except for a small parasitic capacitance). The combination of L2 and C3 forms a matching network that transforms the antenna impedance of 50 ohms to a higher value from the perspective of the LNA input terminal. This transformation of impedance improves LNA noise figure by increasing the received voltage delivered to the input transistor. This allows lower transconductance and therefore a smaller transistor, which makes it possible to design the CMOS LNA for low power consumption. During transmission, the voltage on control line RX/TX (raised bar) is low, causing switch S1 to be open. In this configuration, the combination of L1 and C1 transforms the antenna impedance to a lower value from the perspective of the PA. This low impedance is helpful in producing a relatively high output power compatible with the low CMOS operating potential. At the same time, switches S2 and S3 are closed, forming the parallel resonant tank circuit L2||C2. This circuit presents high impedance to the right of the antenna, directing the PA output signal to the antenna and away from the LNA. During this time, S3 presents a short circuit across the LNA input terminals to guarantee that the voltage seen by the LNA is small enough to prevent damage.

Moussessian, Alina↗

Design and Optimization of High-frequency Transformer for Isolated Single-Stage Three-Phase AC/DC Converter using Bidirectional Switches

This paper presents the design and optimization of the high-frequency transformer for an isolated single-stage threephase AC/DC converter enabled by the 4H-SiC BiDirectional Field Effect Transistor (BiDFET). Non-dominated Sorting Genetic Algorithm II (NSGA-II) is used to perform a multiobjective optimization to minimize loss, weight, and volume. A 20 kW, 50 kHz hardware prototype based on the selected optimal point is characterized by a power amplifier. The finite element analysis simulation results are also presented to validate the core magnetic flux density and winding electric field strength. The experimental prototype was tested at 800 Vdc/480 Vrms at 10 kW rated power.

BiDFET, High-frequency transformer, Multiobjective↗

Charge transport in mixed metal halide perovskite semiconductors

Investigation of the inherent field-driven charge transport behaviour of three-dimensional lead halide perovskites has largely remained challenging, owing to undesirable ionic migration effects near room temperature and dipolar disorder instabilities prevalent specifically in methylammonium-and-lead-based high-performing three-dimensional perovskite compositions. Here, in this paper, we address both these challenges and demonstrate that field-effect transistors based on methylammonium-free, mixed metal (Pb/Sn) perovskite compositions do not suffer from ion migration effects as notably as their pure-Pb counterparts and reliably exhibit hysteresis-free p-type transport with a mobility reaching 5.4 cm 2 V –1 s -1 . The reduced ion migration is visualized through photoluminescence microscopy under bias and is manifested as an activated temperature dependence of the field-effect mobility with a low activation energy (~48 meV) consistent with the presence of the shallow defects present in these materials. An understanding of the long-range electronic charge transport in these inherently doped mixed metal halide perovskites will contribute immensely towards high-performance optoelectronic devices.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Noise parameters and light sensitivity of low-noise high-electron-mobility transistors at 300 and 12.5 K

The four noise parameters of cryogenically cooled HEMTs have been investigated. Two different HEMT structures, with and without a spacer layer, were tested. The noise parameters of both structures were similar at room temperature, while they were dramatically different at cryogenic temperatures. The minimum noise temperatures measured at 8.4 GHz were 75 + or 5 K at room temperature and 8.5 + or - 1.5 K at the temperature of 12.5 K. The cryogenic performance is the best ever observed for field-effect transistors.

Pospieszalski, Marian W.↗

A gallium phosphide high-temperature bipolar junction transistor

Preliminary results are reported on the development of a high temperature (350 C) gallium phosphide bipolar junction transistor (BJT) for geothermal and other energy applications. This four-layer p(+)n(-)pp(+) structure was formed by liquid phase epitaxy using a supercooling technique to insure uniform nucleation of the thin layers. Magnesium was used as the p-type dopant to avoid excessive out-diffusion into the lightly doped base. By appropriate choice of electrodes, the device may also be driven as an n-channel junction field-effect transistor. The initial design suffers from a series resistance problem which limits the transistor's usefulness at high temperatures.

Zipperian, T. E.↗

Persistent and reversible electrostatic control of doping in graphene/hexagonal boron nitride heterostructures

Since its first application as a substrate for graphene field effect transistors (FETs), hexagonal boron nitride (hBN) has become a prominent component in two-dimensional (2D) material devices. In addition, hBN has been shown to host defects that can be manipulated to change the electronic properties of adjacent 2D materials. Despite the wide use of such defect manipulations, no focused efforts have been made to further the understanding of defect excitations and their influence in graphene/hBN FETs. In this study, we explore the effect of high electric fields (~10 V/nm) on graphene/hBN FETs and find that persistent and reversible shifts in graphene's charge neutrality point (CNP) occur. By increasing the applied electric field and temperature of our device, we find that this CNP shift is enhanced. With this insight, we propose a mechanism that explains these observations based on Poole–Frenkel emissions from defects in hBN. Finally, we show that such an effect may be suppressed by using graphite as a backgate, thus preventing unintended changes in the electrical properties of graphene/hBN FETs.

36 MATERIALS SCIENCE↗

Study of graphene p-n junctions formed by the electrostatic modification of the SiO2 substrate

Abstract We study the transport properties of mm-scale CVD graphene p-n junctions, which are formed in a single gated graphene field effect transistor configuration. Here, an electrical-stressing-voltage technique served to modify the electrostatic potential in the SiO 2 /Si substrate and create the p-n junction. We examine the transport characteristics about the Dirac points that are localized in the perturbed and unperturbed regions in the graphene channel and note the quantitative differences in the Hall effect between the perturbed and unperturbed regions. The results also show that the longitudinal resistance is highly sensitive to the external magnetic field when the Hall bar device operates as a p-n junction.

Science & Technology - Other Topics↗

Noise-optimal control of HEMT LNA's for compensation of temperature deviations

Noise-optimal control of high-electron mobility transistor low noise amplifier (HEMT LNA) bias voltage and current values was achieved at room temperature. The performance metric maximized was the amplifier gain divided by the amplifier input noise temperature, G/T(sub e). Additionally, the feasibility of automating the initial determination of bias settings was demonstrated in the laboratory. Simulation models of an HEMT were developed from available measurement data, installed on a Sun SPARC 1 workstation, and used in investigating several optimization algorithms. Simple tracking-type algorithms, which follow changes in optimum settings if started at or near the global optimum point, produced the best performance. Implementation of the optimization algorithms was performed using a three-stage Field Effect Transistor (FET) LNA and an existing test apparatus. Software was written to control the bias settings of the first stage of the LNA and to perform noise and gain measurements by using the test apparatus. The optimization control was then integrated with existing test software to create a master test and optimization program for test apparatus use.

Maccarley, C.↗

High-Efficiency Microwave Power Amplifier

A high-efficiency power amplifier that operates in the S band (frequencies of the order of a few gigahertz) utilizes transistors operating under class-D bias and excitation conditions. Class-D operation has been utilized at lower frequencies, but, until now, has not been exploited in the S band. Nominally, in class D operation, a transistor is switched rapidly between "on" and "off" states so that at any given instant, it sustains either high current or high voltage, but not both at the same time. In the ideal case of zero "on" resistance, infinite "off" resistance, zero inductance and capacitance, and perfect switching, the output signal would be a perfect square wave. Relative to the traditional classes A, B, and C of amplifier operation, class D offers the potential to achieve greater power efficiency. In addition, relative to class-A amplifiers, class-D amplifiers are less likely to go into oscillation. In order to design this amplifier, it was necessary to derive mathematical models of microwave power transistors for incorporation into a larger mathematical model for computational simulation of the operation of a class-D microwave amplifier. The design incorporates state-of-the-art switching techniques applicable only in the microwave frequency range. Another major novel feature is a transmission-line power splitter/combiner designed with the help of phasing techniques to enable an approximation of a square-wave signal (which is inherently a wideband signal) to propagate through what would, if designed in a more traditional manner, behave as a more severely band-limited device (see figure). The amplifier includes an input, a driver, and a final stage. Each stage contains a pair of GaAs-based field-effect transistors biased in class D. The input signal can range from -10 to +10 dBm into a 50-ohm load. The table summarizes the performances of the three stages

Sims, Williams H.↗