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At least 379 records · Page 21

Trends in reliability modeling technology for fault tolerant systems

Reliability modeling for fault tolerant avionic computing systems was developed. The modeling of large systems involving issues of state size and complexity, fault coverage, and practical computation was discussed. A novel technique which provides the tool for studying the reliability of systems with nonconstant failure rates is presented. The fault latency which may provide a method of obtaining vital latent fault data is measured.

Bavuso, S. J.↗

Fault tolerance using self-checking building-block computers

The paper attempts to define and characterize a set of VLSI (very large scale integration) building-block circuits which can be used to combine existing microprocessors and memories into a wide variety of fault-tolerant computing systems. Such VLSI circuits would transform fault-tolerant computing into an off-the-shelf technology and enable its routine use for new applications. The self-checking computer module (SCCM) is the basic component out of which fault-tolerant computer systems are constructed. Several fault-tolerant configurations of SCCM are discussed, including the standby redundant uniprocessor, the voted/hybrid uniprocessor, and the distributed computer network.

Rennels, D. A.↗

SIFT - Design and analysis of a fault-tolerant computer for aircraft control

SIFT (Software Implemented Fault Tolerance) is an ultrareliable computer for critical aircraft control applications that achieves fault tolerance by the replication of tasks among processing units. The main processing units are off-the-shelf minicomputers, with standard microcomputers serving as the interface to the I/O system. Fault isolation is achieved by using a specially designed redundant bus system to interconnect the processing units. Error detection and analysis and system reconfiguration are performed by software. Iterative tasks are redundantly executed, and the results of each iteration are voted upon before being used. Thus, any single failure in a processing unit or bus can be tolerated with triplication of tasks, and subsequent failures can be tolerated after reconfiguration. Independent execution by separate processors means that the processors need only be loosely synchronized, and a novel fault-tolerant synchronization method is described.

Wensley, J. H.↗

Architectures for fault-tolerant spacecraft computers

This paper summarizes the results of a long-term research program in fault-tolerant computing for spacecraft on-board processing. In response to changing device technology this program has progressed from the design of a fault-tolerant uniprocessor to the development of fault-tolerant distributed computer systems. The unusual requirements of spacecraft computing are described along with the resulting real-time computer architectures. The following aspects of these designs are discussed: (1) architectural features to minimize complexity in the distributed computer system, (2) fault-detection and recovery, (3) techniques to enhance reliability and testability, and (4) design approaches for LSI implementation.

Rennels, D. A.↗

Intermittent/transient faults in computer systems: Executive summary

An overview of an approach for diagnosing intermittent/transient (I/T) faults is presented. The development of an interrelated theory and experimental methodology to be used in a laboratory situation to measure the capability of a fault tolerant computing system to diagnose I/T faults, is discussed. To the extent that such diagnosing capability is important to reliability in fault tolerant computing systems, this theory and supporting methodology serves as a foundation for validation efforts.

Masson, G. M.↗

Fault-tolerant system optimization

The paper describes the decisions to be made in the design of fault-tolerant systems and provides details of a comprehensive model developed to cost optimize such systems. Economical use of replication is making fault-tolerant systems possible and more applications for safety crucial systems such as active flight controls can be expected. In turn, the use of massive redundancy, fault-tolerance, and reconfigurable systems in stimulating the development of new analytical tools for establishing the cost and effectiveness of the safety and cost effectiveness of the levels of replication will increase. Closed-form analytical solutions for the reliability and maintainability analysis of fault-tolerant systems are complex, and Monte-Carlo simulation appears to be a more desirable method of establishing the reliability and maintainability of such systems.

Rose, J.↗

The accommodation of relative motion at depth on the San Andreas fault system in California

Plate motion below the seismogenic layer along the San Andreas fault system in California is assumed to form by aseismic slip along a deeper extension of the fault or may result from lateral distribution of deformation below the seismogenic layer. The shallow depth of California earthquakes, the depth of the coseismic slip during the 1906 San Francisco earthquake, and the presence of widely separated parallel faults indicate that relative motion is distributed below the seismogenic zone, occurring by inelastic flow rather than by aseismic slip on discrete fault planes.

Prescott, W. H.↗

Software fault tolerance for real-time avionics systems

Avionics systems have very high reliability requirements and are therefore prime candidates for the inclusion of fault tolerance techniques. In order to provide tolerance to software faults, some form of state restoration is usually advocated as a means of recovery. State restoration can be very expensive for systems which utilize concurrent processes. The concurrency present in most avionics systems and the further difficulties introduced by timing constraints imply that providing tolerance for software faults may be inordinately expensive or complex. A straightforward pragmatic approach to software fault tolerance which is believed to be applicable to many real-time avionics systems is proposed. A classification system for software errors is presented together with approaches to recovery and continued service for each error type.

Anderson, T.↗

A program plan for the development of fault tolerant large space systems

The need for fault tolerance in Large Space systems is discussed. The unique characteristics of LSS which affect fault tolerance are described. The status of fault tolerant research for LSS is described. A program plan to validate and demonstrate the concept of fault tolerance for LSS is developed.

Motyka, P.↗

Focal depths and fault plane solutions of earthquakes under the Tibetan plateau

Seismic data are used to place constraints on the focal depths and fault plane solutions of 16 crustal earthquakes beneath the highest parts of the Tibetan plateau. Synthetic seismograms were computed for large events from 1962 to 1976, and compared with the observed waveforms. All of the events studied are found to have occurred at depths less than 15 km and probably between 5 and 10 km, suggesting that the crust below 10-15 km is essentially aseismic, as in most of the Western United States. Fault-plane solutions show combinations of normal and strike slip faulting with T axes consistently oriented approximately east-west, supporting the inference that the upper crust of Tibet is actively extending in an east-west direction. In addition, solutions for two intermediate-depth events at depths of 90 and 85 km show primarily normal faulting with east-west T axes. Results show that brittle deformation occurs at shallow depths in the crust and in the uppermost mantle, but the lower crust seems to be aseismic.

Molnar, P.↗

Galileo spacecraft power distribution and autonomous fault recovery

There is a trend in current spacecraft design to achieve greater fault tolerance through the implemenation of on-board software dedicated to detecting and isolating failures. A combination of hardware and software is utilized in the Galileo power system for autonomous fault recovery. Galileo is a dual-spun spacecraft designed to carry a number of scientific instruments into a series of orbits around the planet Jupiter. In addition to its self-contained scientific payload, it will also carry a probe system which will be separated from the spacecraft some 150 days prior to Jupiter encounter. The Galileo spacecraft is scheduled to be launched in 1985. Attention is given to the power system, the fault protection requirements, and the power fault recovery implementation.

Detwiler, R. C.↗

Development and analysis of the Software Implemented Fault-Tolerance (SIFT) computer

SIFT (Software Implemented Fault Tolerance) is an experimental, fault-tolerant computer system designed to meet the extreme reliability requirements for safety-critical functions in advanced aircraft. Errors are masked by performing a majority voting operation over the results of identical computations, and faulty processors are removed from service by reassigning computations to the nonfaulty processors. This scheme has been implemented in a special architecture using a set of standard Bendix BDX930 processors, augmented by a special asynchronous-broadcast communication interface that provides direct, processor to processor communication among all processors. Fault isolation is accomplished in hardware; all other fault-tolerance functions, together with scheduling and synchronization are implemented exclusively by executive system software. The system reliability is predicted by a Markov model. Mathematical consistency of the system software with respect to the reliability model has been partially verified, using recently developed tools for machine-aided proof of program correctness.

Goldberg, J.↗

Development and evaluation of a fault-tolerant multiprocessor (FTMP) computer. Volume 4: FTMP executive summary

The FTMP architecture is a high reliability computer concept modeled after a homogeneous multiprocessor architecture. Elements of the FTMP are operated in tight synchronism with one another and hardware fault-detection and fault-masking is provided which is transparent to the software. Operating system design and user software design is thus greatly simplified. Performance of the FTMP is also comparable to that of a simplex equivalent due to the efficiency of fault handling hardware. The FTMP project constructed an engineering module of the FTMP, programmed the machine and extensively tested the architecture through fault injection and other stress testing. This testing confirmed the soundness of the FTMP concepts.

Smith, T. B., III↗

Fault-tolerant system considerations for a redundant strapdown inertial measurement unit

The development and evaluation of a fault-tolerant system for the Redundant Strapdown Inertial Measurement Unit (RSDIMU) being developed and evaluated by the NASA Langley Research Center was continued. The RSDIMU consists of four two-degree-of-freedom gyros and accelerometers mounted on the faces of a semi-octahedron which can be separated into two halves for damage protection. Compensated and uncompensated fault-tolerant system failure decision algorithms were compared. An algorithm to compensate for sensor noise effects in the fault-tolerant system thresholds was evaluated via simulation. The effects of sensor location and magnitude of the vehicle structural modes on system performance were assessed. A threshold generation algorithm, which incorporates noise compensation and filtered parity equation residuals for structural mode compensation, was evaluated. The effects of the fault-tolerant system on navigational accuracy were also considered. A sensor error parametric study was performed in an attempt to improve the soft failure detection capability without obtaining false alarms. Also examined was an FDI system strategy based on the pairwise comparison of sensor measurements. This strategy has the specific advantage of, in many instances, successfully detecting and isolating up to two simultaneously occurring failures.

Motyka, P.↗

Distributed asynchronous microprocessor architectures in fault tolerant integrated flight systems

The paper discusses the implementation of fault tolerant digital flight control and navigation systems for rotorcraft application. It is shown that in implementing fault tolerance at the systems level using advanced LSI/VLSI technology, aircraft physical layout and flight systems requirements tend to define a system architecture of distributed, asynchronous microprocessors in which fault tolerance can be achieved locally through hardware redundancy and/or globally through application of analytical redundancy. The effects of asynchronism on the execution of dynamic flight software is discussed. It is shown that if the asynchronous microprocessors have knowledge of time, these errors can be significantly reduced through appropiate modifications of the flight software. Finally, the papear extends previous work to show that through the combined use of time referencing and stable flight algorithms, individual microprocessors can be configured to autonomously tolerate intermittent faults.

Dunn, W. R.↗

An extensive region of off-ridge normal-faulting earthquakes in the southern Indian Ocean

A verified prediction of the theory of plate tectonics is that the focal mechanisms of earthquakes on the mid-ocean ridge system indicate either normal faulting on ridge segments or strike-slip faulting on transform faults. A broad region in the southern Indian Ocean which differs from typical ridge and intraplate regimes has been identified. In this region a number of large off-ridge earthquakes have occurred in the last 20 years. The mechanisms for these events, where known, all involve normal faulting. Nine of these earthquakes have been studied in detail using a formal inversion technique based on matching synthetic body waves to observed seismograms.

Bergman, E. A.↗

Fault detection and accommodation testing on an F100 engine in an F-15 airplane

The fault detection and accommodation (FDA) methodology for digital engine-control systems may range from simple comparisons of redundant parameters to the more complex and sophisticated observer models of the entire engine system. Evaluations of the various FDA schemes are done using analytical methods, simulation, and limited-altitude-facility testing. Flight testing of the FDA logic has been minimal because of the difficulty of inducing realistic faults in flight. A flight program was conducted to evaluate the fault detection and accommodation capability of a digital electronic engine control in an F-15 aircraft. The objective of the flight program was to induce selected faults and evaluate the resulting actions of the digital engine controller. Comparisons were made between the flight results and predictions. Several anomalies were found in flight and during the ground test. Simulation results showed that the inducement of dual pressure failures was not feasible since the FDA logic was not designed to accommodate these types of failures.

Myers, L. P.↗

Modeling and measurement of fault-tolerant multiprocessors

The workload effects on computer performance are addressed first for a highly reliable unibus multiprocessor used in real-time control. As an approach to studing these effects, a modified Stochastic Petri Net (SPN) is used to describe the synchronous operation of the multiprocessor system. From this model the vital components affecting performance can be determined. However, because of the complexity in solving the modified SPN, a simpler model, i.e., a closed priority queuing network, is constructed that represents the same critical aspects. The use of this model for a specific application requires the partitioning of the workload into job classes. It is shown that the steady state solution of the queuing model directly produces useful results. The use of this model in evaluating an existing system, the Fault Tolerant Multiprocessor (FTMP) at the NASA AIRLAB, is outlined with some experimental results. Also addressed is the technique of measuring fault latency, an important microscopic system parameter. Most related works have assumed no or a negligible fault latency and then performed approximate analyses. To eliminate this deficiency, a new methodology for indirectly measuring fault latency is presented.

Shin, K. G.↗