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At least 361 records · Page 20

Probing Phase Transformations and Microstructural Evolutions at the Small Scales: Synchrotron X-ray Microdiffraction for Advanced Applications in [Phase 3 Memory,] 3D IC (Integrated Circuits) and Solar PV (Photovoltaic) Devices

Synchrotron x-ray microdiffraction (μXRD) allows characterization of a crystalline material in small, localized volumes. Phase composition, crystal orientation and strain can all be probed in few-second time scales. Crystalline changes over a large areas can be also probed in a reasonable amount of time with submicron spatial resolution. However, despite all the listed capabilities, μXRD is mostly used to study pure materials but its application in actual device characterization is rather limited. This article will explore the recent developments of the μXRD technique illustrated with its advanced applications in microelectronic devices and solar photovoltaic systems. Application of μXRD in microelectronics will be illustrated by studying stress and microstructure evolution in Cu TSV (through silicon via) during and after annealing. Here, the approach allowing study of the microstructural evolution in the solder joint of crystalline Si solar cells due to thermal cycling will be also demonstrated.

36 MATERIALS SCIENCE↗

Silicon Qubits

There are two good reasons to attempt to build quantum bits (qubits) out of silicon. The first is the obvious foundation of classical microelectronics. Although silicon quantum computers would operate in a fundamentally different way from classical computers$-$for example, at cryogenic temperatures$-$still the level of development in material quality, crystal growth, and fabrication methodologies for silicon is unrivaled by any other material in the world. Leveraging even a small fraction of the worldwide investment in silicon for qubit development could potentially put silicon-based qubits far ahead of other solid-state alternatives. The second, less obvious reason for choosing silicon is the remarkably clean magnetic environment witnessed by spins in highly purified and isotopically enriched silicon material. Fortuitously, 95.3% of the naturally occurring isotopes of Si nuclei ( 28 Si and 30 Si) are spin-0. These nuclei therefore have a “closed shell” of nuclear moments, providing no external magnetic field whatsoever. Add to this the possibility of intrinsic silicon with part-per-billion chemical quality and the system is remarkably close to “vacuum” with respect to magnetic noise properties.

36 MATERIALS SCIENCE↗

A historical survey of algorithms and hardware architectures for neural-inspired and neuromorphic computing applications

In this study, biological neural networks continue to inspire new developments in algorithms and microelectronic hardware to solve challenging data processing and classification problems. Here in this research, we survey the history of neural-inspired and neuromorphic computing in order to examine the complex and intertwined trajectories of the mathematical theory and hardware developed in this field. Early research focused on adapting existing hardware to emulate the pattern recognition capabilities of living organisms. Contributions from psychologists, mathematicians, engineers, neuroscientists, and other professions were crucial to maturing the field from narrowly-tailored demonstrations to more generalizable systems capable of addressing difficult problem classes such as object detection and speech recognition. Algorithms that leverage fundamental principles found in neuroscience such as hierarchical structure, temporal integration, and robustness to error have been developed, and some of these approaches are achieving world-leading performance on particular data classification tasks. Additionally, novel microelectronic hardware is being developed to perform logic and to serve as memory in neuromorphic computing systems with optimized system integration and improved energy efficiency. Key to such advancements was the incorporation of new discoveries in neuroscience research, the transition away from strict structural replication and towards the functional replication of neural systems, and the use of mathematical theory frameworks to guide algorithm and hardware developments.

97 MATHEMATICS AND COMPUTING↗

The 88-Inch Cyclotron: A One-Stop Facility for Electronics Radiation and Detector Testing

In outer space down to the altitudes routinely flown by larger aircrafts, radiation can pose serious issues for microelectronics circuits. The 88-Inch Cyclotron at Lawrence Berkeley National Laboratory is a sector-focused cyclotron and home of the Berkeley Accelerator Space Effects Facility, where the effects of energetic particles on sensitive microelectronics are studied with the goal of designing electronic systems for the space community. This paper describes the flexibility of the facility and its capabilities for testing the bombardment of electronics by heavy ions, light ions, and neutrons. Experimental capabilities for the generation of neutron beams from deuteron breakups and radiation testing of carbon nanotube field effect transistor will be discussed.

43 PARTICLE ACCELERATORS↗

Fundamental understanding and rational design of high energy structural microbatteries

Microbatteries play a critical role in determining the lifetime of downsized sensors, wearable devices and medical applications, etc. More often, structural batteries are required from the perspective of aesthetics and space utilization, which is however rarely explored. Herein, we discuss the fundamental issues associated with the rational design of practically usable high energy microbatteries. The tubular shape of the cell further allows the flexible integration of microelectronics. A functioning acoustic micro-transmitter continuously powered by this tubular battery has been successfully demonstrated. Multiple design features adopted to accommodate large mechanical stress during the rolling process are discussed providing new insights in designing the structural microbatteries for emerging technologies.

25 ENERGY STORAGE↗

Butyltin Keggin Ion with a Rare Four-Coordinate Ca Center

Alkyltin clusters are exploited in nanolithography for the fabrication of microelectronics. The alkyltin Keggin family is unique among Keggin clusters across the periodic table; its members appear to favor the lower-symmetry β and γ isomers rather than the highly symmetrical α and ε isomers. Therefore, the alkyltin Keggin family may provide important fundamental information about the formation and isomerization of Keggin clusters. In this study, we have synthesized and structurally characterized a new butyltin Keggin cluster with a tetrahedral Ca 2+ center, fully formulated [(BuSn) 12 (CaO 4 )(OCH 3 ) 12 (O) 4 (OH) 8 ] 2+ (β-CaSn 12 ). The synthesis is a simple one-step process. Extensive solution characterization including electrospray ionization mass spectrometry, small-angle X-ray scattering, and multinuclear ( 1 H, 13 C, and 119 Sn) nuclear magnetic resonance shows β-CaSn 12 is essentially phase-pure and stable. This differs from the previously reported Na-centered analogues that always form a mixture of β and γ isomers, with facile interconversion. Therefore, this study has clarified prior confusion over complex spectroscopic and crystallographic characterization of the Na-centered analogues. Density functional theory calculations showed the following stability order: γ-CaSn 12 < γ-NaSn 12 < β-CaSn 12 < β-NaSn 12 . The β analogue is always more stable than the γ analogue, consistent with experiment. Notable outcomes of this study include a rare tetrahedral Ca coordination, a Na-free alkyltin cluster (important for microelectronics manufacturing), and a better understanding of Keggin families built of different metal cations.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Direct-Liquid-Evaporation Chemical Vapor Deposition of Nanocrystalline Cobalt Metal for Nanoscale Copper Interconnect Encapsulation

In advanced microelectronics, precise design of liner and capping layers become critical, especially when it comes to the fabrication of Cu interconnects with dimensions lower than its mean free path. Here in this paper, we demonstrate that direct-liquid-evaporation chemical vapor deposition (DLE-CVD) of Co is a promising method to make liner and capping layers for nanoscale Cu interconnects. DLE-CVD makes pure, smooth, nanocrystalline, and highly conformal Co films with highly controllable growth characteristics. This process allows full Co encapsulation of nanoscale Cu interconnects, thus stabilizing Cu against diffusion and electromigration. Electrical measurements and high-resolution elemental imaging studies show that the DLE-CVD Co encapsulation layer can improve the reliability and thermal stability of Cu interconnects. Also, with the high conductivity of Co, the DLE-CVD Co encapsulation layer have the potential to further decrease the power consumption of nanoscale Cu interconnects, paving the way for Cu interconnects with higher efficiency in future high-end microelectronics.

36 MATERIALS SCIENCE↗

Manipulating topological transformations of polar structures through real-time observation of the dynamic polarization evolution

Topological structures based on controllable ferroelectric or ferromagnetic domain configurations offer the opportunity to develop microelectronic devices such as high-density memories. Despite the increasing experimental and theoretical insights into various domain structures (such as polar spirals, polar wave, polar vortex) over the past decade, manipulating the topological transformations of polar structures and comprehensively understanding its underlying mechanism remains lacking. By conducting an in-situ non-contact bias technique, here we systematically investigate the real-time topological transformations of polar structures in PbTiO 3 /SrTiO 3 multilayers at an atomic level. The procedure of vortex pair splitting and the transformation from polar vortex to polar wave and out-of-plane polarization are observed step by step. Furthermore, the redistribution of charge in various topological structures has been demonstrated under an external bias. This provides new insights for the symbiosis of polar and charge and offers an opportunity for a new generation of microelectronic devices.

Science & Technology - Other Topics↗

High-speed mapping of surface charge dynamics using sparse scanning Kelvin probe force microscopy

Unraveling local dynamic charge processes is vital for progress in diverse fields, from microelectronics to energy storage. This relies on the ability to map charge carrier motion across multiple length- and timescales and understanding how these processes interact with the inherent material heterogeneities. Towards addressing this challenge, we introduce high-speed sparse scanning Kelvin probe force microscopy, which combines sparse scanning and image reconstruction. This approach is shown to enable sub-second imaging (>3 frames per second) of nanoscale charge dynamics, representing several orders of magnitude improvement over traditional Kelvin probe force microscopy imaging rates. Bridging this improved spatiotemporal resolution with macroscale device measurements, we successfully visualize electrochemically mediated diffusion of mobile surface ions on a LaAlO 3 /SrTiO 3 planar device. Such processes are known to impact band-alignment and charge-transfer dynamics at these heterointerfaces. Furthermore, we monitor the diffusion of oxygen vacancies at the single grain level in polycrystalline TiO 2 . Through temperature-dependent measurements, we identify a charge diffusion activation energy of 0.18 eV, in good agreement with previously reported values and confirmed by DFT calculations. Together, these findings highlight the effectiveness and versatility of our method in understanding ionic charge carrier motion in microelectronics or nanoscale material systems.

25 ENERGY STORAGE↗

Chemical-free n-type and p-type multilayer-graphene transistors

Here, a single-step doping method to fabricate n- and p-type multilayer graphene (MG) top-gate field effect transistors (GFETs) is demonstrated. The transistors are fabricated on soda-lime glass substrates, with the n-type doping of MG caused by the sodium in the substrate without the addition of external chemicals. Placing a hydrogen silsesquioxane (HSQ) barrier layer between the MG and the substrate blocks the n-doping, resulting in p-type doping of the MG above regions patterned with HSQ. The HSQ is deposited in a single fabrication step using electron beam lithography, allowing the patterning of arbitrary sub-micron spatial patterns of n- and p-type doping. When a MG channel is deposited partially on the barrier and partially on the glass substrate, a p-type and n-type doping profile is created, which is used for fabricating complementary transistors pairs. Unlike chemically doped GFETs in which the external dopants are typically introduced from the top, these substrate doped GFETs allow for a top gate which gives a stronger electrostatic coupling to the channel, reducing the operating gate bias. Overall, this method enables scalable fabrication of n- and p-type complementary top-gated GFETs with high spatial resolution for graphene microelectronic applications.

36 MATERIALS SCIENCE↗

Three-dimensional measurements of plasma parameters in an inductively coupled plasma processing chamber

Inductively coupled plasmas (ICPs) are extensively used for materials processing and microelectronics fabrication. However, their electromagnetic properties have not been fully characterized. In this regard, we have performed fully three dimensional (3D), time dependent measurements of the magnetic field, electron density, and electron temperature for an ICP sustained in argon in an industrial reactor designed for plasma etching in microelectronics fabrication. These measurements were compared to modeling results. The plasma was generated using pulsed power delivered at 2 MHz by a planar coil. The magnetic field was measured using a three axis magnetic probe at 15 366 locations throughout the plasma volume during the H-mode portion of the pulse at temporal intervals of 2 ns. A swept Langmuir probe was used to measure plasma parameters at the same locations. The plasma density measurement was calibrated with line-integrated densities obtained using a 96 GHz interferometer. During a single radio frequency (RF) cycle, the 3D current density [derived from B(r→,t)]is initially maximum just below the coil and moves downward toward the center of the chamber. Isosurfaces of current are nearly symmetric toroids. The total electric field, space charge field, and inductive electric field were derived and used to calculate the dissipated power, plasma current, and Poynting flux. Computer modeling of the experiment reproduces the phase dependent behavior. Animations showing the time dependent 3D measurements are presented in the supplementary material.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Thermal Management of Discretized Heaters Using CuW Microchannel Heat Sinks and FC3283

Single-phase cooling using microchannel heat sinks (MCHS) has become a popular approach for overcoming the thermal challenges associated with high-powered microelectronic devices. Thermal management is one of the largest barriers to higher power densities in electronics and frequently limits overall device performance. The implementation of forced convective cooling via single-phase liquid cooling in MCHS reduces the thermal resistance resulting in lower device temperatures at high-power conditions, which can decrease the package size and extend the lifespan of devices. The goal of the work described in this article was to investigate practical cooling solutions for laser diode bars. This study examined the effectiveness of a copper tungsten (CuW) microchannel heat sink paired with a dielectric coolant (FC3283) for dissipating both discrete and uniform heat fluxes up to 600 W/cm2 across a 0.25-cm2 surface area through a numerical and experimental study. CuW was chosen as the MCHS material because it is thermal expansion matched to GaAs, which is a common laser diode substrate. FC3283 serves as a dielectric coolant that is compatible with power electronics cooling. The microchannels utilized in this work were approximately $365$ $μ$ m deep and $100$ $μ$ m wide resulting in a hydraulic diameter of $160$ $μ$ m. The study investigated the cooling performance across a variety of applied power loads and flow rates to determine optimal effectiveness. The resulting thermal resistance ranged from 0.15 cm2 K/W at the highest flow rate to 0.26 cm2 K/W at the lowest flow rate. Further, the resulting thermal performance from this study demonstrates the importance of considering discrete heat sources separately from uniform heat sources and proved that the unique combination of CuW microchannels with FC3283 can be a promising cooling option toward future advancements of laser diode bars and other high-power microelectronics.

42 ENGINEERING↗

Probing Plasticity and Strain-Rate Effects of Indium Submicron Pillars Using Synchrotron Laue X-ray Microdiffraction

We present that mechanical behaviors and especially the strain-rate responses at the nanoscales of low melting temperature metals, such as indium have not been much studied. Indium is one of the key materials or alloy-components in advanced microelectronics and nanotechnology industry, and understanding their mechanical behaviors at nanoscales becomes increasingly important to ensure lifetime reliability of their applications in novel nanoscale devices or advanced systems (for packaging at the nanoscales, for instance). Synchrotron X-ray microdiffraction has been utilized to examine defect structures of nanoscale materials as well as their strain-rate responses. Nanoscale or advanced microelectronics packaging, for instance, require acceptable levels of drop test results. For these low melting temperature materials especially, this technique offers a unique advantage as conventional methods such as TEM and EBSD will expose the structure to high energy electron beams that may significantly alter the microstructure and defect structure during analysis. Using this approach, we found interesting differences in term of X-ray peak broadening after deformation with different strain rates, which could indicate differences in plasticity mechanisms in the submicron pillars of indium, which could be important for its applications in nanodevices. Finally, understanding these differences could lead to better control of mechanical properties of low melting temperature metals at the nanoscales and thus have important implications for nanodevice reliability.

36 MATERIALS SCIENCE↗

Communication—Electrodeposition of Indium Directly on Silicon

Direct electrodeposition of indium onto silicon paves the way for advances in microelectronics, photovoltaics, and optoelectronics. Indium is generally electrodeposited onto silicon utilizing a physically or thermally deposited metallic seed layer. Eliminating this layer poses benefits in microelectronics by reducing resistive interfaces and in vapor-liquid-solid conversion to III-V material by allowing direct contact to the single-crystal silicon substrate for epitaxial conversion. We investigated conditions to directly electrodeposit indium onto n-type Si(100). We illustrate that a two-step galvanostatic plating at low temperatures can consistently produce smooth, continuous films of indium over large areas, in bump morphologies, and conformally into inverted pyramids.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Thin Film Characterization on Cu/SnAg Solder Interface for 3D Packaging Technologies

Copper is a commonly used interconnect metal in microelectronic interconnects due to its exceptional electrical and thermal properties. Particularly in applications of the 2.5 and 3D integration, Cu is utilized in through-silicon-vias (TSVs) and flip chip interconnects between microelectronic chips for providing miniaturization, lower power and higher performance than current 2D packaging approaches. Furthermore, SnAg capped Cu pillars are a common high-density interconnect technology for flip chip bonding. For these interconnects, specific properties of the Cu surface, such as roughness and cleanliness, are an important factor in the process to ensure quality solder bumps. During electroplating, tight processing parameters must be met so that defects are avoided, and high bump uniformity is achieved. An understanding of the interactions at the solder and Cu pillar interface is needed, based on the electroplating parameters, to determine the best method for populating solder on the wafer surface. In this study, surface treatment techniques such as oxygen plasma cleaning were performed on the Cu surfaces and the SnAg plating chemistry for depositing the solder were evaluated through hull cell testing to qualitatively determine the range of current densities to investigate. It was observed that current density while plating played a large role in solder bump deposition morphology. At the higher current densities greater than 60 mA/cm 2 , bump height non-uniformity and dendritic growth are observed and at lower current densities, less than or equal to 60 mA/cm 2 , uniform, continuous bump height occurred.

36 MATERIALS SCIENCE↗

Hardware Acceleration of Adaptive Neural Algorithms.

As tradit ional numerical computing has faced challenges, researchers have turned towards alternative computing approaches to reduce power - per - computation metrics and improve algorithm performance. Here, we describe an approach towards non - conventional computing that strengthens the connection between machine learning and neuroscience concepts. The Hardware Acceleration of Adaptive Neural Algorithms (HAANA) project ha s develop ed neural machine learning algorithms and hardware for applications in image processing and cybersecurity. While machine learning methods are effective at extracting relevant features from many types of data, the effectiveness of these algorithms degrades when subjected to real - world conditions. Our team has generated novel neural - inspired approa ches to improve the resiliency and adaptability of machine learning algorithms. In addition, we have also designed and fabricated hardware architectures and microelectronic devices specifically tuned towards the training and inference operations of neural - inspired algorithms. Finally, our multi - scale simulation framework allows us to assess the impact of microelectronic device properties on algorithm performance.

97 MATHEMATICS AND COMPUTING↗

2015 Neuro-Inspired Computational Elements Workshop: Information Processing and Computation Systems beyond von Neumann/Turing Architecture and Moore’s Law Limits

The third Neuro-Inspired Computational Elements (NICE) Workshop was held February 23-25, 2015 in Albuquerque, New Mexico. The goal of the Workshop was to bring together researchers from different scientific disciplines and application areas to provide a common point from which to develop the next generation of information processing/computing architectures that go beyond stored program architecture and Moore’s Law limits. Conventional, stored program architecture systems are designed for algorithmic and exact calculations. Many high impact problems, however, involve large, noisy, incomplete, “natural” data sets that do not lend themselves to convenient solutions from current systems. This Workshop series has focused on addressing these problems by building upon the convergence among neuroscience, microelectronics, and computational systems to develop new architectures designed to handle these natural data sets. An international group of nearly 100 registered attendees with a wide range of expertise and experience (e.g., neuroscience, systems, microelectronics, applications, and potential funding agencies) participated in this year’s event by offering knowledgeable insight regarding: Applications that look for solutions beyond the capabilities of current computational systems; Technical approaches that are at the early to middle stages of development for new computational systems; Pathways and resources to accelerate the development of these new systems.

97 MATHEMATICS AND COMPUTING↗

Non-Equilibrium Processes, Stability, Design and Control of Pulsed Plasmas for Materials Processing

The energy and angle of impact of ions, interspersed with fluxes of neutral radicals, on the surface of wafers during plasma materials processing are critical parameters for the fabrication of microelectronic devices, nanostructure materials and biocompatible materials. This sensitivity extends to nearly all applications of plasmas to materials processing and surface modification. Low temperature plasmas for plasma materials processing have traditionally used continuously excited plasmas. However, pulsed plasma processing is an enabling technology for achieving finer resolution of microelectronics fabrication and for producing unique surface properties in a wide range of applications. This research project is addressing fundamental plasma physics issues in materials processing – the control of pulsed plasmas and the means for optimizing plasma produced reactant fluxes.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗