Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “integrated circuits”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 361 records · Page 20
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Modular Wide-bandgap String Inverters for Low-cost Medium-voltage Transformerless PV Systems

The proposed technology combines advances in wide-bandgap power electronics with breakthroughs in distributed and decentralized control to produce ultra-low-cost medium-voltage transformerless PV inverters that are composed of stackable lightweight blocks. Taken together, the proposed circuit designs and accompanying control strategies will yield integrated control+circuit (C2) blocks, each comprising a converter and local controller, that can be assembled in a modular fashion to obtain distributed conversion interfaces for next-generation commercial and utility-scale PV systems. We will utilize SiC devices to obtain C2 blocks that can individually operate at a voltage and power in excess of 1 kV and 100 kW, respectively, such that ensembles of series-connected blocks perform direct dc to three-phase ac conversion at medium voltages (e.g., 12 kV–35 kV) and at multi-MW power levels.

42 ENGINEERING↗
DOE OSTI2023

Modbus RTU for Embedded Cyber Secure Inverter Controller

The Modbus communication protocol is a widely adopted communication standard in industrial control systems. This communication protocol is known for being reliable and straightforward to implement while being versatile in terms of its operating parameters while supporting multiple formats over various hardware infrastructures and architectures. Many intelligent devices such as Programmable Logic Controllers (PLCs), Human-Machine Interfaces (HMIs), Internet-of-Things (IoT), and various Operational Technologies (OT) utilize Modbus for their communication systems. These types of systems must communicate with each other through a standardized and central communication process. To support the integration of these modular systems, a Field-Programmable Gate Array (FPGA) can act as an embedded central routing fabric for this communication to take place. Embedded systems are versatile enough to interface with various devices and systems to accomplish various goals. Additionally, embedded systems require relatively small physical designs to minimize the required resources to facilitate the intended application by providing low-level system access. This minimization of system resources goes hand in hand with reducing the financial cost of a proposed solution or system. As remotely collaborating researchers often use FPGAs to prototype designs that are required to have a method for data transmission among systems, it is imperative to provide a baseline standard for communications among devices and systems. A typical method of implementing the Modbus RTU communication protocol in an embedded environment is using integrated logic architectures within the FPGA called “Intellectual Property (IP) cores.” IP cores can be designed using integrated logic or circuit designs to function as an embedded processor. These IP cores can then perform the required computational actions to support the Modbus RTU communication protocol by utilizing high-level programming languages such as the C programming language. The hardware description language of Very High-Speed Integrated Circuit Hardware Description Language (VHDL) allows for the control of real hardware at the logic gate and signal level. These logic gates and signals can be designed and controlled to perform desired actions based on the system design. Programming an FPGA using VHDL allows an individual to access the lowest abstraction level of the system during FPGA development. This level of abstraction is referred to as the register-transfer level (RTL), which gives access to manipulating values and variables at the register level. This register-level manipulation provides precision over creating the logical circuit within the FPGA, thus minimizing the required code to perform desired operations. The Modbus RTU communication protocol can be implemented within an FPGA using VHDL programming to establish a standardized and embedded serial communication pathway. This implementation provides a standardized communication protocol to streamline research efforts among researchers, thus increasing the efficiency of research efforts. Additionally, this Modbus RTU implementation requires fewer resources when compared to typical communication protocol implementations that utilize an IP core, reducing the hardware requirement for effective research efforts.

communication↗
DOE OSTI2023

High-bandwidth density silicon photonic resonators for energy-efficient optical interconnects

The growth of artificial intelligence applications demands ever larger and more complex deep learning models, dominating today's—and tomorrow's—data center and high-performance computing systems. While traditional electronics are failing to keep pace with application demands, silicon photonic (SiPh) interconnects have emerged as a necessary technology to support these systems. SiPh-driven wavelength-division multiplexing (WDM) offers a particularly promising path toward supporting incredibly high-aggregate link bandwidth in a compact and efficient form factor. One of the basic building blocks of these integrated WDM interconnects is the SiPh resonator. Their inherent wavelength selectivity and compact footprint allow for efficient data transmission multiplexed across dozens of carrier wavelengths. Used as add-drop (AD) filters, SiPh resonators are critical to constructing integrated tunable wavelength-selective optical circuit switches as well as for demultiplexing the different carrier wavelengths toward independent wavelength-insensitive photodiodes in a dense wavelength-division multiplexing receiver. Resonators in the all-pass (AP) configuration are widespread as well, allowing for wavelength-selective modulation to drive aggregate link bandwidths far beyond the individual channel data rate. Unlike SiPh Mach–Zehnder modulators (MZM), resonant modulators can be driven using low, complementary metal-oxide-semiconductor drive voltages, allowing for tight co-integration between photonic integrated circuits, fabricated with larger process node technologies, and electronic integrated circuits, designed to exploit the advantages of the latest node. To push toward practical peta-scale interconnects, a comprehensive review of SiPh resonators is required, addressing bottlenecks and design constraints at both the architecture and device levels. We first describe the predominant integrated link architectures and identify their limits. We then discuss the device-level design considerations that can be made for both AD and AP configuration resonators to overcome the system level limits with novel resonator device designs. Analytical models and numerical simulation of resonators are validated by experimental measurement of devices fabricated in a commercial 300-mm foundry, showing a clear path toward volume manufacturing. The demonstrated resonant modulators and filters support the feasibility of increasing the aggregate bandwidth of resonator-driven SiPh interconnects into the peta-scale regime.

42 ENGINEERING↗
DOE OSTI2022

Analysis of Defect Irrelevancy in a Non-Insulated REBCO Pancake Coil Using an Electric Network Model

High-temperature superconducting REBCO coated conductor is one of the main candidates for next-generation high field magnets in fusion reactors and particle accelerators owing to their high current-carrying capability. Although these materials can operate at higher temperatures and generate higher magnetic fields than their counterparts with lower critical temperatures, protecting the REBCO magnet against quench is challenging. A variety of candidate technologies that may be able to enable self-protection, including no-insulation technology and insulative coatings with temperature-dependent resistance, are in development. Here, in order to understand current sharing and thermal processes during a quench, we model a REBCO pancake coil as an electrical circuit, considering power generation and heat transfer along conductor turns, and study the current distribution around a local defect with lower critical current. The magnetic field and coil terminal voltage predicted by the simulation was compared to published experimental results. Our results provide useful insights into how current sharing occurs around defects.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2025

Sensing Few Electrons Floating on Helium with High-Electron-Mobility Transistors

We report on low-frequency measurements of few electrons floating on superfluid helium using a bespoke cryogenic cascode amplifier circuit built with off-the-shelf GaAs high-electron-mobility transistors (HEMTs). We integrate this circuit with a charge-coupled device (CCD) to transport the electrons on helium and characterize its performance. Here, we show that this circuit has a signal-to-noise ratio (SNR) of ~ 2 $\frac{e}{√Hz}$ at 102 kHz, an order of magnitude improvement from previous implementations, and provides a compelling alternative to few electron sensing with high-frequency resonators.

Charge-Coupled Devices↗
DOE OSTI2024

Impacts of Non-Ideal Back Contact on Capacitance Measurements in CdTe Solar Cells

CdTe solar cells suffer from a non-ideal back contact which can strongly affect the equivalent circuit model and complicate capacitance measurements. Here, five different back contact materials are deposited on identical CdTe absorbers and their influence on capacitance measurements is characterized. A five-element equivalent circuit model is shown to represent a CdTe solar cell with a non-ideal back contact, and capacitance-frequency (C-f) measurements on each sample clearly show the influence of this contact. Capacitance-voltage (C-V) measurements on each sample show the influence of frequency on measured capacitance. In the AlGaOx/Au sample, temperature dependent C-fs show the back barrier height to be 240 meV, and ongoing measurements will give a comparison of back barrier heights for all samples. This study provides insight into the efficacy of various back contacts and highlights potential errors in the interpretation of capacitance measurements due to the presence of the back contact.

cadmium compounds↗
DOE OSTI2023

Detection of False Data Injection Attacks in Battery Stacks Using Input Noise-Aware Nonlinear State Estimation and Cumulative Sum Algorithms

Grid-scale battery energy storage systems (BESSs) are vulnerable to false data injection attacks (FDIAs), which could be used to disrupt state of charge (SoC) estimation. Inaccurate SoC estimation has negative impacts on system availability, reliability, safety, and the cost of operation. In this article a combination of a Cumulative Sum (CUSUM) algorithm and an improved input noise-aware extended Kalman filter (INAEKF) is proposed for the detection and identification of FDIAs in the voltage and current sensors of a battery stack. The series-connected stack is represented by equivalent circuit models, the SoC is modeled with a charge reservoir model and the states are estimated using the INAEKF. Further, the root mean squared error of the states’ estimation by the modified INAEKF was found to be superior to the traditional EKF. By employing the INAEKF, this article addresses the research gap that many state estimators make asymmetrical assumptions about the noise corrupting the system. Additionally, the INAEKF estimates the input allowing for the identification of FDIA, which many alternative methods are unable to achieve. The proposed algorithm was able to detect attacks in the voltage and current sensors in 99.16% of test cases, with no false positives. Utilizing the INAEKF compared to the standard EKF allowed for the identification of FDIA in the input of the system in 98.43% of test cases.

25 ENERGY STORAGE↗
DOE OSTI2021

Varistors: A Useful Tool for Superconducting Magnet Quench Protection

A perfect varistor is a constant voltage resistor as a function of current through the resistor. A perfect varistor can't exist, because its resistance would be infinite at zero current. In electronic devices, varistors are often used as surge protectors. A varistor can be used in place of an ordinary resistor as the discharge resistance across superconducting coil sections. When used this way, the integral of I 2 dt during the discharge can be reduced by almost one third. When a varistor is used for quench protection of coils that are coupled to shorted secondary circuits the integral of I 2 dt can be reduced much more. Furthermore, this can be a key factor when coil current densities and stored energies are high as in many potential HTS magnet systems. This paper discusses the types of varistors that are commercially available and their characteristics.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2025

Adaptive variational quantum dynamics simulations with compressed circuits and fewer measurements

The adaptive variational quantum dynamics simulation (AVQDS) method performs real-time evolution of quantum states using automatically generated parametrized quantum circuits that often contain substantially fewer gates than Trotter circuits. Here we report an improved version of the method, which we call AVQDS(T), by porting the tiling efficient trial circuits with rotations implemented simultaneously technique. The algorithm adaptively adds layers of disjoint unitary gates to the ansatz circuit so as to keep the McLachlan distance, a measure of the accuracy of the variational dynamics, below a fixed threshold. Here we perform benchmark noiseless AVQDS(T) simulations of quench dynamics in local spin models and compare with an alternative adaptive variational approach on quantum resource requirement. Quantum dynamical simulations implementing realistic noise channels are also reported. Finally, we propose a way to substantially alleviate the measurement overhead of AVQDS(T) while maintaining high accuracy by synergistically integrating quantum circuit calculations on quantum processing units with classical calculations using, e.g., tensor networks to evaluate the quantum geometric tensor. We showcase that this approach enables AVQDS(T) to deliver more accurate results than simulations using a fixed ansatz of comparable final depth for a significant time duration with fewer quantum resources.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2020

Solid-state laser refrigeration of a composite semiconductor Yb:YLiF 4 optomechanical resonator

Photothermal heating represents a major constraint that limits the performance of many nanoscale optoelectronic and optomechanical devices including nanolasers, quantum optomechanical resonators, and integrated photonic circuits. Here, we demonstrate the direct laser refrigeration of a semiconductor optomechanical resonator >20 K below room temperature based on the emission of upconverted, anti-Stokes photoluminescence of trivalent ytterbium ions doped within a yttrium-lithium-fluoride (YLF) host crystal. Optically-refrigerating the lattice of a dielectric resonator has the potential to impact several fields including scanning probe microscopy, the sensing of weak forces, the measurement of atomic masses, and the development of radiation-balanced solid-state lasers. In addition, optically refrigerated resonators may be used in the future as a promising starting point to perform motional cooling for exploration of quantum effects at mesoscopic length scales, temperature control within integrated photonic devices, and solid-state laser refrigeration of quantum materials.

42 ENGINEERING↗
DOE OSTI2024

A Generic and Multifunctional Electromagnetic Transient Model for Grid-Following Inverters

This paper presents a generic and multifunctional electromagnetic transient (EMT) dynamic model of grid-following (GFL) inverter-based resources (IBRs) using the PSCAD software platform. The features of the model include flexibility in selecting various types and combinations of DC sources covering photovoltaic modules, battery modules, and ideal DC-source modules as well as flexibility in selecting either switching or averaged models of the inverter. This model also covers exhaustive lists of controller algorithm, including open-loop/closed-loop PQ dispatch control, DC voltage and AC terminal voltage control, and conventional current control designed in the dq-domain, the ..alpha....beta.. -domain, and the positive-/negative-sequence domain. Moreover, this model is equipped with flexibility in selecting various types of current-limiting schemes, including saturation-based and latching-based current limiters, and anti-windup protection. Also, the EMT model is agnostic to the MVA rating and is suitable for interfacing transmission systems by complying with IEEE Std. 2800. The generality in the power circuits and the multifunctional options in the operation and control of the developed EMT model make it suitable for both academia and industry to study various power system aspects, including, but not limited to, the fault behavior of GFL IBRs, the impacts on the protection system, and the transient stability of a system interfaced with large numbers of GFL IBRs.

integrated circuit modeling↗
DOE OSTI2025

Low-Jitter Clock Receivers for Fast Timing Applications

Precision timing is a key requirement for emerging 4D particle tracking, Positron Emission Tomography (PET), beam and fusion plasma diagnostics, and other systems. Time-to-Digital Converters (TDCs) are commonly used to provide digital estimates of the relative timing between events, but the jitter performance of a TDC can be no better than the performance of the circuits that acquire the pulses and deliver them to the TDC. Several clock receiver and distribution circuits were evaluated, and a differential amplifier with resistive loads driving a pseudo-differential clock distribution network, developed using design guidelines for radiation tolerance and cryogenic compatibility, was fabricated as part of three prototypes: an analog front-end testbed chip for high-precision timing pixel readout, a dedicated TDC evaluation chip, and a Low-Gain Avalanche Detector (LGAD) readout circuit. Based on TDC measurements of the prototypes, we infer that the jitter added by the clock receiver and distribution circuits is less than 2.25 ps-rms. This performance meets the requirements of many future precision timing systems. The clock receiver and on-chip pseudo-differential driver were fabricated in commercial 28-nm CMOS technology and occupy 2288 µm 2 .

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

Modeling the Impacts of Material Properties on Oscillatory Neuron Behavior

In this study, neuromorphic computing, which mimics the functions of biological brains, offers improvements in both latency and energy efficiency over typical von Neumann computing architectures. Spiking neural networks can be especially power-efficient because they encode information temporally and can use more sparse electrical inputs. Here, we study the design of volatile memristors (variable resistors with memory) for neuronal devices, with particular consideration toward the feasibility of all-on-chip oscillation using built-in capacitance. We use circuit simulations to model the behavior of oscillator neurons with a range of realistic material properties. We find that energy inputs increase with insulating-phase resistivity, thermal conductivity, and device aspect ratio. However, we also find that the minimum capacitance needed for oscillation decreases with increasing insulating-phase resistivity, which opposes the constraints for power efficiency. Based on published data on NbO 2 , VO 2 , and EuNiO 3 , we find that existing materials can be engineered for all-on-chip spiking using their parasitic capacitance.

36 MATERIALS SCIENCE↗