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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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349 records · Page 20

Virtual Self-Excited Induction Generator-Based Grid-Forming Inverter Control for Robust Voltage Regulation Under Nonideal Loading

This paper presents a generator-inspired control methodology for grid-forming (GFM) inverters that deliberately emulates a self-excited induction generator so that the inverter can hold its voltage and frequency under difficult loading and severe terminal disturbances across wide voltage and frequency ranges. The design integrates a Lyapunov energy function-based inner loop to provide high bandwidth and strong disturbance rejection, and it complements this with a passivity-based argument that furnishes a coherent large-signal stability guarantee beyond small-signal limits. Analytical insights are developed via the Krylov-Bogoliubov-Mitropolsky averaging method, which reveals an intrinsic resistive droop characteristic; these closed-form relations both explain the observed dynamics and yield simple, decentralized tuning rules. The methodology is validated on a controller-hardware-in-the-loop platform and exercised in real time across balanced, unbalanced, and nonlinear loads, as well as during parallel operation. Across these scenarios, the inverter maintains balanced three-phase voltages, limits harmonic content, settles quickly with well-damped transients, and remains resilient when multiple units operate in parallel. The contributions are a self-excited-machine-inspired GFM controller with enhanced dynamic performance and robustness, a single stability rationale grounded in passivity, closed-form expressions that guide tuning, and comprehensive hardware-in-the-loop validations demonstrating effectiveness and superiority under challenging operating conditions.

24 POWER TRANSMISSION AND DISTRIBUTION↗

WAMS-Based HVDC Damping Control for Cyber Attack Defense

Owing to the fast and large power regulating the capacity of the HVDC system, the wide-area measurement system (WAMS) based high voltage direct current (HVDC) system has been regarded as a prospective solution to deal with the low-frequency oscillation issue. However, due to the vulnerability of the WAMS communication, WAMS based HVDC system control can be a prime target of malicious penetrations that could lead to disastrous events. To remediate this adverse effect, an improved WAMS based HVDC damping control framework is proposed in this paper. First, a lightweight network named Attack Shuffle convolutional neural Networks (ASNet) is proposed to learn the characteristics of cyber attacks. Then, a model-free-based cyber attack defense framework is introduced to quickly identify the attack types based on the continuous wavelet transform and ASNet. Additionally, an improved control framework of the WAMS and HVDC-based wide-area power oscillation damping control (WH-PODC) is developed to provide different response control for mitigation of the impact of cyber attacks. Finally, the performance of the proposed WH-PODC control framework is evaluated with real PMU data in multiple scenarios in RTDS, where the results indicate that the response intensity can be kept under multiple types of cyber attacks while providing similar effectiveness in oscillation suppression to conventional controls.

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Nanosecond Gated CMOS Camera (NSGCC) ICD (Rev. 2.1)

The Ultra-Fast X-ray Imager (UXI) program is an ongoing effort at Sandia National Laboratories to create high speed, multi-frame, time-gated Read Out Integrated Circuits (ROICs), and a corresponding suite of photodetectors to image a wide variety of High Energy Density (HED) physics experiments on both Sandia’s Z-Machine and LLNL’s National Ignition Facility (NIF). Several cameras have been designed over the length of the program; one of the most recent is the Icarus, which is an improvement on past imagers (Furi and Hippogriff). A second sensor that can be connected is the Daedalus sensor. The Icarus is a 1024 × 512-pixel array with either 25 μm or 8 µm spatial resolution containing four frames of storage per pixel and has improved timing generation and distribution components while achieved 2 ns time gating. The Daedalus sensor is also a 1024 x 512-pixel array with 25 µm special resolution containing three frames of storage per pixel and has an increased set of features for a wider variety of applications from interlacing of rows in each frame to configurability of all shutters. See Section 14 for details regarding the Icarus implementation of the firmware and Section 15 for details regarding the Daedalus implementation. Due to the unique test environments UXI sensors are targeted for, full custom hardware was required to physically mount an Icarus or Daedalus sensor, manage its various functions, and read out pixel data for transfer to a host computer. Beyond experimental functionality, the hardware also needed to accommodate sensor characterization requirements. Lawrence Livermore National Laboratory’s ‘Version 4.0 Board’ was the result of these efforts. It mounts all the components required to fully utilize the Icarus and Daedalus sensors including analog to digital converters to convert pixel data and various system voltages to digital form for readout and analysis, DAC channels for remote configuration of critical bias voltages, static random-access memories to buffer pixel data, RS422 and Gigabit Ethernet communications for remote access, and an FPGA to tie these components together. This document describes the FPGA electrical interfaces in detail to allow the reader a greater understanding of the device, and to facilitate implementation of custom software to control and manage it. The Version 4.0 Board is a continuation of the Nano-second Gated CMOS hardware design that retains much of the functionality of the Version 1.0 Board while adding features including a DAC instead of digital potentiometers, as well as sensors for pressure and radiation. The Version 4.0 board is intended for applications requiring tight form-factor enclosures. It is composed of two stacking boards; one holds the FPGA and regulators to power the various components of the board while the other contains the mating connector to the sensor, image-readoff ADCs, the DAC, and other components.

42 ENGINEERING↗

Solid State Transformer Architecture and Control Compensation for Common Mode Currents

A high-altitude electromagnetic pulse (HEMP) or similar geomagnetic disturbance (GMD) has the potential to impact the operation of large-scale electric power grids. By introducing low-frequency common-mode (CM) currents, these events can degrade the performance of critical system components, such as large power transformers by introducing CM currents which can lead to magnetic saturation of the transformer core. In this work, a solid-state transformer (SST) is developed to replace susceptible equipment and improve grid resiliency by safely absorbing these CM disturbances. This device will be referred to as a common-mode solid-state transformer (CM-SST). An SST architecture based on a four-legged AC/DC converter is developed. This architecture enables active control of CM signals without disturbing the AC voltages or the real and reactive power delivery capabilities. A system-level model of this architecture is created, and time-domain simulations are performed to evaluate the SST’s performance in response to simulated CM disturbances. A control strategy for mitigating CM current is also investigated. Hamiltonian surface shaping and power flow control (HSSPFC) is used to design a nonlinear controller for the SST’s output inverter. The objectives of the controller are to suppress CM-induced AC current offsets and regulate AC currents to desired setpoints. Nonlinear system analysis is applied to design and validate the controller. Two cases are tested: (a) the proposed four-leg inverter and (b) a standard three-leg inverter. The results show that the proposed controller rapidly mitigates CM disturbances while maintaining high-quality AC current waveforms in the four-leg configuration. Finally, the hardware performance of an SST prototype is evaluated. In particular, the ability of the SST to safely redirect and absorb CM currents is demonstrated, showing how it can protect neighboring conventional transformers in the system. The study confirms that appropriate control laws allow the SST to protect both itself and adjacent transformers during a HEMP or GMD event.

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Reliability and Safety Assessment of Urban Air Mobility Concept Vehicles

The following work was commissioned by the National Aeronautics and Space Administration (NASA) to guide industry and future regulation related to urban air mobility (UAM). Prior studies compared the relative safety of NASA concept vehicles, Figure ES1, designed for UAM and provided recommendations for industry research, aircraft architectural improvements, and regulatory updates. After the prior study completed, the European Aviation Safety Agency (EASA) released regulatory guidance in the form of a special condition (SC), SC-VTOL-01, for multirotors with distributed propulsion and flight controls (DPFC). The objective of the current work was to develop DPFC architectures that will comply with SC-VTOL-01. Vehicle designs, DPFC architectures, and stability & control (S&C) models were developed to find limitations and trends to guide industry. To guide this task, NASA developed quad, hex, and an octorotor to better define vehicle attributes and trade space. Aircraft for study included electric, hybrid-electric, and turboshaft powerplants and collective and RPM control schemes. Assessments are in terms of the safety level achieved, and/or aircraft component/features needed to meet SC-VTOL-01. The most challenging criteria being the catastrophic failure rate, ≤10-9 catastrophic failures per flight hour, and that no single failures may result in a catastrophic event. A disciplined process was followed, similar to that in Aerospace Recommended Practice (ARP) 4761. A preliminary system safety assessment (PSSA) leveraged prior work as a basis of creating failure rate budgets for system design teams. System designs were updated and iterated upon, working with reliability and safety subject matter experts to develop SC-VTOL-01 compliant designs. Design changes were reflected in updated PSSAs for initial verification of compliance. The DPFC architecture was broken into four system design teams, the (1) flight control system (FCS), (2) drive and power system, (3) thermal management system (TMS), and (4) electrical power and distribution system. The FCS including elements necessary to control the aircraft, drive and power including elements necessary to generate and transmit shaft power, the TMS including elements necessary to maintain temperature limits in all operating environments, and electrical pow-er and distribution including equipment necessary to store and transmit electrical energy. Results found that all aircraft evaluated may have paths to comply with SC-VTOL-01, Figure ES2. However, S&C models showed large power transients that must be addressed and PSSA results show that future work is needed in single load path structures, high voltage power storage and distribution, and in motor/rotor overspeed protection.

Boeing↗

Synchronous Machine Governor Upgrade

Conventional generation sources play a critical role in the stability and reliability of the electrical grid, particularly as we transition towards more renewable energy sources. To understand and accurately emulate their behavior for optimizing grid operations and ensuring seamless integration with renewable technologies, it is essential to better emulate the grid- and plant-level impacts of conventional generation sources, such as natural gas (NG) driven heat recovery steam generators (HRSGs) and combustion turbines (CTs). Therefore, a governor model is developed in a programmable logic controller (PLC) to investigate the performance of the conventional generator under various dynamic operating conditions and to identify the impact on grid stability in a controlled environment. The governor model aims to enable the hardware-in-the-loop (HIL) based emulation of these conventional generation sources using the existing 2 MVA synchronous machine/generator that is driven by a flexible 2.5 MW variable speed drive. This setup will allow us to replicate the dynamic characteristics and response behaviors of NG-driven HRSGs and CTs. The controls for the emulated conventional plants follow the industry standard and are adjustable, ensuring they accurately reflect the operational capabilities and limitations of real-world systems. These controls include load-following capabilities, ramp rates, startup and shutdown sequences, and emissions characteristics. By incorporating these adjustable controls, we aim to capture the nuanced impacts of conventional generation, such as their ability to provide ancillary services like frequency regulation, voltage support, and spinning reserve. In this report, we simulate two types of dynamic operations: grid-connected and islanding. For each dynamic operation, representative starting sequences are tested, including turbine purge, ignition, speed ramping up, generator excitation and synchronizing, and breaker close. The HIL based tests provides insights for field deployment, specifically the high-fidelity governor model provides results to predict the potential stability and reliability risk and suggest possible integration measures (e.g., generation and load balancing, tuning of governor control parameters). Ultimately, this enhanced emulation capability will be integrated into our Advanced Research on Integrated Energy Systems (ARIES), enabling us to conduct comprehensive studies on the interactions between conventional and renewable energy sources. By better understanding these interactions, we can develop strategies to optimize the overall performance and reliability of the grid. This will support the deployment of advanced grid management techniques, such as demand response, grid-forming inverters, and energy storage systems. The main contributions are summarized as follows: (1) This report introduces a PLC-based governor model for gas turbines. This model accurately simulates the dynamic behavior of conventional generation sources under various operational scenarios; (2) The model is integrated with an HIL testbed that includes a 2.5 MW variable speed drive and a 2 MVA synchronous machine. This setup enables realistic, real-time emulation of conventional power plants, particularly NG driven HRSGs and CTs; (3) The developed model is adaptable to various gas turbine configurations and allows for precise control over parameters such as MW ramp rates. This flexibility makes it a valuable tool for future research and industry collaboration; and (4) By incorporating the model into the National Renewable Energy Laboratory's Advanced Research on Integrated Energy Systems, the report lays the groundwork for future studies on interactions between conventional and renewable energy sources, enhancing the ability to develop advanced grid management strategies.

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Hardware in the Loop Testing of an Iodine-Fed Hall Thruster

CUBESATS are relatively new spacecraft platforms that are typically deployed from a launch vehicle as a secondary payload,1 providing low-cost access to space for a wide range of end-users. These satellites are comprised of building blocks having dimensions of 10x10x10 cm cu and a mass of 1.33 kg (a 1-U size). While providing low-cost access to space, a major operational limitation is the lack of a propulsion system that can fit within a CubeSat and is capable of executing high delta v maneuvers. This makes it difficult to use CubeSats on missions requiring certain types of maneuvers (i.e. formation flying, spacecraft rendezvous). Recently, work has been performed investigating the use of iodine as a propellant for Hall-effect thrusters (HETs) 2 that could subsequently be used to provide a high specific impulse path to CubeSat propulsion. Iodine stores as a dense solid at very low pressures, making it acceptable as a propellant on a secondary payload. It has exceptionally high ρIsp (density times specific impulse), making it an enabling technology for small satellite near-term applications and providing the potential for systems-level advantages over mid-term high power electric propulsion options. Iodine flow can also be thermally regulated, subliming at relatively low temperature ( less than100 C) to yield I2 vapor at or below 50 torr. At low power, the measured performance of an iodine-fed HET is very similar to that of a state-of-the-art xenon-fed thruster. Just as importantly, the current-voltage discharge characteristics of low power iodine-fed and xenon-fed thrusters are remarkably similar, potentially reducing development and qualifications costs by making it possible to use an already-qualified xenon-HET PPU in an iodine-fed system. Finally, a cold surface can be installed in a vacuum test chamber on which expended iodine propellant can deposit. In addition, the temperature doesn't have to be extremely cold to maintain a low vapor pressure in the vacuum chamber (it is under 10(exp -6) torr at -75 C), making it possible to 'cryopump' the propellant with lower-cost recirculating refrigerant-based systems as opposed to using liquid nitrogen or low temperature gaseous helium cryopanels. In the present paper, we describe testing performed using an iodine-fed 200 W Hall thruster mounted to a thrust stand and operated in conjunction with MSFCs Small Projects Rapid Integration and Test Environment (SPRITE) Portable Hardware In the Loop (PHIL) hardware. This work is performed in support of the iodine satellite (iSAT) project, which aims to fly a 200-W iodine-fed thruster on a 12-U CubeSat. The SPRITE PHIL hardware allows a given vehicle to do a checkout of its avionics algorithm by allowing it to monitor and feed data to simulated sensors and effectors in a digital environment. These data are then used to determine the attitude of the vehicle and a separate computer is used to interpret the data set and visualize it using a 3D graphical interface. The PHIL hardware allows the testing of the vehicles bus by providing 'real' hardware interfaces (in the case of this test a real RS422 bus) and specific components can be modeled to show their interactions with the avionics algorithm (e.g. a thruster model). For the iSAT project the PHIL is used to visualize the operating cycle of the thruster and the subsequent effect this thrusting has on the attitude of the satellite over a given period of time. The test is controlled using software running on an Andrews Space Cortex 160 flight computer. This computer is the current baseline for a full iSAT mission. While the test could be conducted with a lab computer and software, the team chose to exercise the propulsion system with a representative CubeSat-class computer. For purposes of this test, the "flight" software monitored the propulsion and PPU systems, controlled operation of the thruster, and provided thruster state data to the PHIL simulation. Commands to operate the thruster were initiated from an operator's workstation outside the vacuum chamber and passed through the Cortex 160 to exercise portions of the flight avionics. Two custom-designed pieces of electronics hardware have been designed to operate the propellant feed system. One piece of hardware is an auxiliary board that controls a latch valve, proportional flow control valves (PFCVs) and valve heaters as well as measuring pressures, temperatures and PFCV feedback voltage. An onboard FPGA provides a serial link for issuing commands and manages all lower level input-output functions. The other piece of hardware is a power distribution board, which accepts a standard bus voltage input and converts this voltage into all the different current-voltage types required to operate the auxiliary board. These electronics boards are located in the vacuum chamber near the thruster, exposing this hardware to both the vacuum and plasma environments they would encounter during a mission, with these components communicating to the flight computer through an RS-422 interface. The auxiliary board FPGA provides a 28V MOSFET switch circuit with a 20ms pulse to open or close the iodine propellant feed system latch valve. The FPGA provides a pulse width modulation (PWM) signal to a DC/DC boost converter to produce the 12-120V needed for control of the proportional flow control valve. There are eight MOSFET-switched heating circuits in the system. Heaters are 28V and located in the latch valve, PFCV, propellant tank and propellant feed lines. Both the latch valve and PFCV have thermistors built into them for temperature monitoring. There are also seven resistance temperature device (RTD) circuits on the auxiliary board that can be used to measure the propellant tank and feedline temperatures. The signals are conditioned and sent to an analog to digital converter (ADC), which is directly commanded and controlled by the FPGA.

Polzin, Kurt A.↗