Portable Software For Numerically Controlled Machining
P-APT, Portable APT, is revised version of APT written to conform to FORTRAN 77 standard. Machine-dependent code replaced or isolated and documented.
Poland, J.↗
SEARCH · Engineering Papers
Results for “code portability”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Direct broadcast satellite-audio, portable and mobile reception tradeoffs
This paper reports on the findings of a systems tradeoffs study on direct broadcast satellite-radio (DBS-R). Based on emerging advanced subband and transform audio coding systems, four ranges of bit rates: 16-32 kbps, 48-64 kbps, 96-128 kbps and 196-256 kbps are identified for DBS-R. The corresponding grades of audio quality will be subjectively comparable to AM broadcasting, monophonic FM, stereophonic FM, and CD quality audio, respectively. The satellite EIRP's needed for mobile DBS-R reception in suburban areas are sufficient for portable reception in most single family houses when allowance is made for the higher G/T of portable table-top receivers. As an example, the variation of the space segment cost as a function of frequency, audio quality, coverage capacity, and beam size is explored for a typical DBS-R system.
Golshan, Nasser↗
Simulation of Attitude and Trajectory Dynamics and Control of Multiple Spacecraft
Agora software is a simulation of spacecraft attitude and orbit dynamics. It supports spacecraft models composed of multiple rigid bodies or flexible structural models. Agora simulates multiple spacecraft simultaneously, supporting rendezvous, proximity operations, and precision formation flying studies. The Agora environment includes ephemerides for all planets and major moons in the solar system, supporting design studies for deep space as well as geocentric missions. The environment also contains standard models for gravity, atmospheric density, and magnetic fields. Disturbance force and torque models include aerodynamic, gravity-gradient, solar radiation pressure, and third-body gravitation. In addition to the dynamic and environmental models, Agora supports geometrical visualization through an OpenGL interface. Prototype models are provided for common sensors, actuators, and control laws. A clean interface accommodates linking in actual flight code in place of the prototype control laws. The same simulation may be used for rapid feasibility studies, and then used for flight software validation as the design matures. Agora is open-source and portable across computing platforms, making it customizable and extensible. It is written to support the entire GNC (guidance, navigation, and control) design cycle, from rapid prototyping and design analysis, to high-fidelity flight code verification. As a top-down design, Agora is intended to accommodate a large range of missions, anywhere in the solar system. Both two-body and three-body flight regimes are supported, as well as seamless transition between them. Multiple spacecraft may be simultaneously simulated, enabling simulation of rendezvous scenarios, as well as formation flying. Built-in reference frames and orbit perturbation dynamics provide accurate modeling of precision formation control.
Stoneking, Eric T.↗
Digital Image Correlation Engine v.3.0
DICe is an open source digital image correlation (DIC) tool intended for use as a module in an external application or as a standalone analysis code. It's primary capability is computing full-field displacements and strains from sequences of digital These images are typically of a material sample undergoing a materials characterization experiment, but DICe is also useful for other applications (for example, trajectory tracking). DICe is machine portable (Windows, Linux and Mac) and can be effectively deployed on a high performance computing platform. Capabilities from DICe can be invoked through a library interface, via source code integration of DICe classes or through a graphical user interface.
Turner, Dan↗
Autotuning in High-Performance Computing Applications
Autotuning refers to the automatic generation of a search space of possible implementations of a computation that are evaluated through models and/or empirical measurement to identify the most desirable implementation. Autotuning has the potential to dramatically improve the performance portability of petascale and exascale applications. To date, autotuning has been used primarily in high-performance applications through tunable libraries or previously tuned application code that is integrated directly into the application. This paper draws on the authors' extensive experience applying autotuning to high-performance applications, describing both successes and future challenges. If autotuning is to be widely used in the HPC community, researchers must address the software engineering challenges, manage configuration overheads, and continue to demonstrate significant performance gains and portability across architectures. In particular, tools that configure the application must be integrated into the application build process so that tuning can be reapplied as the application and target architectures evolve.
97 MATHEMATICS AND COMPUTING↗
On the Efficacy of Source Code Optimizations for Cache-Based Systems
Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize temporal and spatial locality of memory references by reusing data and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive impact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates - as reported by a cache simulation tool, and confirmed by hardware counters - only partially explain the results. By contrast, the compiler-generated assembly code provides more insight by revealing the importance of processor-specific instructions and of compiler maturity, both of which strongly, and sometimes unexpectedly, influence performance. We conclude that it is difficult to obtain performance portability on modern cache-based computers, and comment on the implications of this result.
VanderWijngaart, Rob F.↗
On the Efficacy of Source Code Optimizations for Cache-Based Systems
Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize temporal and spatial locality of memory references by reusing data and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive impact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates-as reported by a cache simulation tool, and confirmed by hardware counters-only partially explain the results. By contrast, the compiler-generated assembly code provides more insight by revealing the importance of processor-specific instructions and of compiler maturity, both of which strongly, and sometimes unexpectedly, influence performance. We conclude that it is difficult to obtain performance portability on modern cache-based computers, and comment on the implications of this result.
VanderWijngaart, Rob F.↗
SurFE-XD (Surface curvature-driven Finite Elements model for Diffusion under eXtreme conditions)
SurFE-XD is a mesoscale finite element framework to model surface diffusion under mutliphysics environments. The code uses legacy C++ library dolphin wrapped with python in a FEniCS driven unified form language and just-in-time (JIT) compilation setting. The purpose of the release is to attract wide-ranging usage of the code along with publication supplementation to support reproducibility of scientific data. SurFE-XD has been originally conceived under the LDRD-DR funding for “High-Gradient (C-BAND) Breakdown tolerant accelerator materials project. Currently SrFE-XD support electrostatics and Thermo-elasticity driven surface diffusion kernels. Releasing the code will also enable to include contributions from other physical regimes e.g., plasticity and electrodynamics etc as well portability to GPU-based platforms.
Bagchi, Soumendu↗
LLVM Infrastructure and Tools Project Summary
This project works with the open source LLVM Compiler Infrastructure (http://llvm.org) to provide tools and capabilities that address needs and challenges faced by ECP community (applications, libraries, and other components of the software stack). Our focus is on providing a more productive development environment that enables (i) improved compilation times and code generation for parallelism, (ii) additional features/capabilities within the design and implementations of LLVM components for improved platform/performance portability and (iii) improved aspects related to composition of the underlying implementation details of the programming environment, capturing resource utilization, overheads, etc. -- including runtime systems that are often not easily addressed by application and library developers.
97 MATHEMATICS AND COMPUTING↗
A qualitative analysis of the neutron population in fresh and spent fuel assemblies during simulated interrogation using the differential die-away technique
In this study, Monte Carlo simulations were performed for the differential die-away (DDA) technique to analyse the time-dependent behaviour of the neutron population in fresh and spent nuclear fuel assemblies as part of the Next Generation Safeguards Initiative Spent Fuel (NGSI-SF) Project. Simulations were performed to investigate both a possibly portable as well as a permanent DDA instrument. Taking advantage of a custom made modification to the MCNPX code, the variation in the neutron population, simultaneously in time and space, was examined. The motivation for this research was to improve the design of the DDA instrument, as it is be ing considered for possible deployment at the Central Storage of Spent Nuclear Fuel and Encapsulation Plant in Sweden (Clab), as well as to assist in the interpretation of the both simulated and measured signals.
98 NUCLEAR DISARMAMENT, SAFEGUARDS, AND PHYSICAL P↗
Achieving performance portability in Gaussian basis set density functional theory on accelerator based architectures in NWChemEx
The numerical integration of the exchange–correlation (XC) potential is one of the primary computational bottlenecks in Gaussian basis set Kohn–Sham density functional theory (KS-DFT). To achieve optimal performance and accuracy, care must be taken in this numerical integration to preserve local sparsity as to allow for near linear weak scaling with system size. This leads to an integration scheme with several performance critical kernels which must be hand optimized for each architecture of interest. As the set of available accelerator hardware goes more diverse, a key challenge for developers of KS-DFT software is to maintain performance portability across a wide range of computational architectures. In this article, we examine a modular software design pattern which decouples the implementation details of performance critical kernels from the expression of high-level algorithmic workflows in a device-agnostic language such as C++; thus allowing for developers to target existing and emerging accelerator hardware within a single code base. We consider the efficacy of such a design pattern in the numerical integration of the XC potential by demonstrating its ability to achieve performance portability across a set of accelerator architectures which are representative of those on current and future U.S. Department of Energy Leadership Computing Facilities.
97 MATHEMATICS AND COMPUTING↗
Development of MGMC: A proxy Multi-Group Monte Carlo Particle Transport Application
This document details the development and current state of MGMC: a proxy Multi-Group Monte Carlo transport application. The goal of this work was to develop a light-weight Monte Carlo transport solver that could be easily reconfigured to test parallelization strategies targeting advanced architectures and heterogeneous computing environments. Additionally, MGMC is able to act as a proxy-app for testing the development of algorithms and the integration of other libraries and into Monte Carlo transport codes. MGMC is currently able to run in parallel using OpenMP for CPU threads or CUDA for NVIDIA GPUs. MGMC was also used to investigate the using SYCL for portable parallelization targeting either CPU threads, vender-agnostic GPUs, and ARM chips, detailed in Section II. In the process of developing MGMC, several other C++ libraries have been created with the intent for re-use in future research projects and potential inclusion in production-level codes, detailed in Section III. The physics capabilities in MGMC are detailed in Section IV, code verification is detailed in Section V, and performance results are detailed in Section VI.
97 MATHEMATICS AND COMPUTING↗
Algorithmic Improvements for Portable Event-Based Monte Carlo Transport Using the Nvidia Thrust Library
High performance computing environments are progressively moving towards many-core computing architectures. The Los Alamos National Laboratory Trinity machine, available in late 2016, will use both Intel Xeon Haswell processors and Intel Xeon Phi Knights Landing many integrated core (MIC) coprocessors. The Lawrence Livermore National Laboratory Sierra machine, available in 2018, will use an IBM PowerPC architecture along with Nvidia graphics processing units (GPUs). Applications that must work in this supercomputing environment must continue to adapt in order to take advantage of the diverse hardware architectures that are coming. A significant consideration is not only the performance of the application on a given platform but also the portability of the application to other platforms. The algorithmic improvements presented in this paper build upon recently-reported work on event-based Monte Carlo transport in the ALPSMC code that models particle transport in one-dimensional binary stochastic media. That paper discussed the lack of available vectorization in the traditional history-based algorithm used for Monte Carlo transport and presented a data parallel event-based algorithm implemented using the Nvidia Thrust library for portability. The performance of the data parallel event-based algorithm implemented using Thrust was compared to a native CUDA implementation. The conclusions from that work were that the Thrust library abstraction technique caused too significant a loss in performance but that the event-based method was a viable option that should be further investigated. In this paper, we describe algorithmic improvements to the data parallel event-based algorithm previously presented. We made further algorithmic optimizations to the event-based CUDA implementation, most notably: data structure changes, a new conditional particle removal scheme in the event-based process, and the use of multiple GPUs. In addition to improvements to the algorithm, we re-implemented the Thrust version from the now further optimized CUDA version, giving a greater chance for success at a performant abstraction. Finally, we revisited our previous assumptions about the inability of the history-based method to achieve performance on vector style architectures such as the MICs and GPUs, with surprising and promising results. (authors)
73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
Tacho
SAND2022-7470 O Tacho is a performance portable sparse direct solver for use with various sparse matrix problems which typically arise from finite element methods. The code relies on the Kokkos parallel programming model porting to both CPUs and GPUs. It is also part of the Trilinos library. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.
Kim, Kyungjoo↗
PHOENIX Electrostatic Design
PHOENIX (Portable, High-efficiency, Optimal ENergy Imaging X-rays) is a quasi-DC, electrostatic, vacuum-diode designed as a portable x-ray source with national defense and commercial applications. The patent-pending PHOENIX concept combines a megavoltage, Cockroft-Walton voltage multiplier with a Van de-Graaff electrostatic charge-storage dome to create a vacuum-diode suitable for x-ray production. Naturally this structure must minimize internal electric fields to reduce electrical breakdown while simultaneously reducing size and weight to enhance portability. In this paper we describe the optimization process and model results obtained using the COMSOL multi-physics code. We describe three models: a prototype model built to demonstrate the PHOENIX concept as part of Laboratory Directed Research and Development (LDRD) Mission Foundation Research (MFR) Phase-I , a “back-of-the-envelope” design used as a starting point for further COMSOL optimization, and finally, the optimized geometry implemented in the MFR Phase-II. In all cases compromises resulting from cost, schedule, and manufacturing constraints were taken into account as the design progressed.
42 ENGINEERING↗
Surveying the LLNL WSC/CP DevOps Landscape - FY23 DevOps L2: Advanced Simulation and Computing (ASC) L2 Milestone 8542, "Spack Utilization in IC Code Projects”
This L2 milestone is a multifaceted review of DevOps practices across Weapon Simulation and Computing/Computational Physics (WSC/CP) Program, which includes Weapons, ICF, and Engineering simulation codes and supporting libraries. It complements the FY22 Spack/MARBL L2: Advanced Simulation and Computing (ASC) L2 Milestone 7904, “Workflow Portability Across Cloud Services”. The overall goal is to develop a path forward for improving DevOps practices in WSC/CP which will increase developer productivity, improve software quality, and speed up our ability to deliver capabilities to end users.
97 MATHEMATICS AND COMPUTING↗
Adaptation of Control Center Software to Commerical Real-Time Display Applications
NASA-Marshall Space Flight Center (MSFC) is currently developing an enhanced Huntsville Operation Support Center (HOSC) system designed to support multiple spacecraft missions. The Enhanced HOSC is based upon a distributed computing architecture using graphic workstation hardware and industry standard software including POSIX, X Windows, Motif, TCP/IP, and ANSI C. Southwest Research Institute (SwRI) is currently developing a prototype of the Display Services application for this system. Display Services provides the capability to generate and operate real-time data-driven graphic displays. This prototype is a highly functional application designed to allow system end users to easily generate complex data-driven displays. The prototype is easy to use, flexible, highly functional, and portable. Although this prototype is being developed for NASA-MSFC, the general-purpose real-time display capability can be reused in similar mission and process control environments. This includes any environment depending heavily upon real-time data acquisition and display. Reuse of the prototype will be a straight-forward transition because the prototype is portable, is designed to add new display types easily, has a user interface which is separated from the application code, and is very independent of the specifics of NASA-MSFC's system. Reuse of this prototype in other environments is a excellent alternative to creation of a new custom application, or for environments with a large number of users, to purchasing a COTS package.
Collier, Mark D.↗
PFLOTRAN User Manual: A Massively Parallel Reactive Flow and Transport Model for Describing Surface and Subsurface Processes
PFLOTRAN solves a system of generally nonlinear partial differential equations describing multi-phase, multicomponent and multiscale reactive flow and transport in porous materials. The code is designed to run on massively parallel computing architectures as well as workstations and laptops (e.g. Hammond et al., 2011). Parallelization is achieved through domain decomposition using the PETSc (Portable Extensible Toolkit for Scientific Computation) libraries for the parallelization framework (Balay et al., 1997). PFLOTRAN has been developed from the ground up for parallel scalability and has been run on up to 218 processor cores with problem sizes up to 2 billion degrees of freedom. Written in object oriented Fortran 90, the code requires the latest compilers compatible with Fortran 2003. At the time of this writing this requires gcc 4.7.x, Intel 12.1.x and PGC compilers. As a requirement of running problems with a large number of degrees of freedom, PFLOTRAN allows reading input data that is too large to fit into memory allotted to a single processor core. The current limitation to the problem size PFLOTRAN can handle is the limitation of the HDF5 file format used for parallel IO to 32 bit integers. Noting that 2 32 = 4; 294; 967; 296, this gives an estimate of the maximum problem size that can be currently run with PFLOTRAN. Hopefully this limitation will be remedied in the near future.
58 GEOSCIENCES↗