Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Programmable devices”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 361 records · Page 20

Extending SEER for Extreme Heterogeneity

Heterogeneous and multi-device nodes are increasingly common in high-performance computing and data centers, yet existing programming models often lack simple, transparent, and portable support for these diverse architectures. The main contribution of this work is the development of novel SEER capabilities to address this challenge by providing a descriptive programming model that allows applications to seamlessly leverage heterogeneous nodes across various device types. SEER uses efficient memory management and can select the proper device[s] depending on the computational cost of the applications. This is completely transparent to the programmer, thereby providing a highly productive programming environment. Integrating extreme heterogeneity into the SEER library as shown with the use of NVIDIA and AMD GPUs simultaneously allows it to expand and exploit the performance possibilities. Our analysis based on the well-known Conjugate Gradient algorithm reports accelerations above 1.5 × on computationally demanding steps of such an algorithm by using both architectures simultaneously.

Teranishi, Keita [ORNL] (ORCID:0000000166472690)↗

Optimized Data Transfers Based on the OpenCL Event Management Mechanism

In standard OpenCL programming, hosts are supposed to control their compute devices. Since compute devices are dedicated to kernel computation, only hosts can execute several kinds of data transfers such as internode communication and file access. These data transfers require one host to simultaneously play two or more roles due to the need for collaboration between the host and devices. The codes for such data transfers are likely to be system-specific, resulting in low portability. Here, this article proposes an OpenCL extension that incorporates such data transfers into the OpenCL event management mechanism. Unlike the current OpenCL standard, the main thread running on the host is not blocked to serialize dependent operations. Hence, an application can easily use the opportunities to overlap parallel activities of hosts and compute devices. In addition, the implementation details of data transfers are hidden behind the extension, and application programmers can use the optimized data transfers without any tricky programming techniques. The evaluation results show that the proposed extension can use the optimized data transfer implementation and thereby increase the sustained data transfer performance by about 18% for a real application accessing a big data file.

97 MATHEMATICS AND COMPUTING↗

A device-dependent interface for interactive image display

The structure of the device independent Display Management Subsystem (DMS) and the interface routines that are available to the applications programmer for use in developing a set of portable image display utility programs are described.

Perkins, D. C.↗

A device-independent interface for image display software

The structure of the device independent Display Management Subsystem (DMS) and the interface routines that are available to the applications programmer for use in developing a set of portable image display utility programs are described.

Perkins, D. C.↗

Visual display and alarm system for wind tunnel static and dynamic loads

A wind tunnel balance monitor and alarm system developed at NASA Ames Research Center will produce several beneficial results. The costs of wind tunnel delays because of inadvertent balance damage and the costs of balance repair or replacement can be greatly reduced or eliminated with better real-time information on the balance static and dynamic loading. The wind tunnel itself will have enhanced utility with the elimination of overly cautious limits on test conditions. The microprocessor-based system features automatic scaling and 16 multicolored LED bargraphs to indicate both static and dynamic components of the signals from eight individual channels. Five individually programmable alarm levels are available with relay closures for internal or external visual and audible warning devices and other functions such as automatic activation of external recording devices, model positioning mechanisms, or tunnel shutdown.

Hanly, Richard D.↗

Visual display and alarm system for wind tunnel static and dynamic loads

A wind tunnel balance monitor and alarm system developed at NASA Ames Research Center will produce several beneficial results. The costs of wind tunnel delays because of inadvertent balance damage and the costs of balance repair or replacement can be greatly reduced or eliminated with better real-time information on the balance static and dynamic loading. The wind tunnel itself will have enhanced utility with the elimination of overly cautious limits on test conditions. The microprocessor-based system features automatic scaling and 16 multicolored LED bargraphs to indicate both static and dynamic components of the signals from eight individual channels. Five individually programmable alarm levels are available with relay closures for internal or external visual and audible warning devices and other functions such as automatic activation of external recording devices, model positioning mechanism, or tunnel shutdown.

Hanly, Richard D.↗

Virtual Frame Buffer Interface Program

Virtual Frame Buffer Interface program makes all frame buffers appear as generic frame buffer with specified set of characteristics, allowing programmers to write codes that run unmodified on all supported hardware. Converts generic commands to actual device commands. Consists of definition of capabilities and FORTRAN subroutines called by application programs. Developed in FORTRAN 77 for DEC VAX 11/780 or DEC VAX 11/750 computer under VMS 4.X.

Wolfe, Thomas L.↗

Dynamic virtualized field-programmable gate array resource control for performance and reliability

A method for allocating field-programmable gate array (FPGA) resources includes monitoring a first operating metric for one or more computing devices, identifying a first portion of plurality of macro components of a set of one or more FPGA devices in the one or more computing devices, where the first portion is allocated for implementing one or more user defined functions. The method also includes, in response to a first change in the first operating metric, reallocating the first portion of the macro components for implementing a system function associated with the first operating metric, and generating a first notification indicating the reallocation of the first portion.

97 MATHEMATICS AND COMPUTING↗

Programmable Cryogenic Memory in a Ge/GeSi Heterostructure

Programmable memory components that operate optimally at cryogenic temperatures are essential for cryogenic computing architectures that seek to implement computing-in-memory. In this work, we demonstrate highly programmable memory in a Ge/GeSi heterostructure field-effect transistor (HFET). To operate, the HFET is gated to introduce positive carriers within the Ge quantum well, creating a high-conductance state. We show that this device can be set to a low-conductance state by sweeping a negative bias on the device drain, and reset it to its high-conductance state by sweeping a more positive bias on the device gate, thereby creating memory. We then determine that the device can be programmed within a 103 range of conductances using either the SET or the RESET operation. We propose that memory is achieved through charge trapping as carriers tunnel out of the quantum well, and that altering the density and spatial distribution of carriers modulates the device conductance. This mechanism exhibits endurance over 1000 cycles at temperatures ≤ 25 K, suggesting that the carrier traps are located at the oxide-semiconductor interface. As a first demonstration of programmable conductance in a Ge/GeSi HFET, this work highlights the potential of group-IV HFETs to perform as analog cryogenic memory components.

cryogenic memory↗

Single Event Effects Test Results for Advanced Field Programmable Gate Arrays

Reconfigurable Field Programmable Gate Arrays (FPGAs) from Altera and Actel and an FPGA-based quick-turnApplication Specific Integrated Circuit (ASIC) from Altera were subjected to single-event testing using heavy ions. Both Altera devices (Stratix II and HardCopy II) exhibited a low latchup threshold (below an LET of 3 MeV-cm2/mg) and thus are not recommended for applications in the space radiation environment. The flash-based Actel ProASIC Plus device did not exhibit latchup to an effective LET of 75 MeV-cm2/mg at room temperature. In addition, these tests did not show flash cell charge loss (upset) or retention damage. Upset characterization of the design-level flip-flops yielded an LET threshold below 10 MeV-cm2/mg and a high LET cross section of about lxlO-6 cm2/bit for storing ones and about lxl0-7 cm2/bit for storing zeros . Thus, the ProASIC device may be suitable for critical flight applications with appropriate triple modular redundancy mitigation techniques.

Field Programmable Gate Arrays↗

Perovskite nanowire–block copolymer composites with digitally programmable polarization anisotropy

One-dimensional (1D) nanomaterials with highly anisotropic optoelectronic properties are key components in energy harvesting, flexible electronics, and biomedical imaging devices. 3D patterning methods that precisely assemble nanowires with locally controlled composition and orientation would enable new optoelectronic device designs. As an exemplar, we have created and 3D-printed nanocomposite inks composed of brightly emitting colloidal cesium lead halide perovskite (CsPbX 3 , X = Cl, Br, and I) nanowires suspended in a polystyrene-polyisoprene-polystyrene block copolymer matrix. The nanowire alignment is defined by the programmed print path, resulting in optical nanocomposites that exhibit highly polarized absorption and emission properties. Several devices have been produced to highlight the versatility of this method, including optical storage, encryption, sensing, and full-color displays.

36 MATERIALS SCIENCE↗

Enhancing Kokkos with OpenACC

C++ template metaprogramming has emerged as a prominent approach for achieving performance portability in heterogeneous computing. Kokkos represents a notable paradigm in this domain, offering programmers a suite of high-level abstractions for generic programming while deferring much of the device-specific code generation and optimization to the compiler through template specializations. Kokkos furnishes a range of device-specific code specializations across multiple back ends, including CUDA and HIP. Diverging from conventional back ends, the OpenACC implementation presents a high-level, multicompiler, multidevice, and directive-based programming model. This paper presents recent advancements in the OpenACC back end for Kokkos (i.e., KokkACC) and focuses on its integration into the Kokkos ecosystem, exploration of automatic device selection capabilities to enhance productivity, and performance evaluation on modern hardware such as NVIDIA H100 GPUs. The study includes implementation details and a thorough performance assessment across various computational benchmarks, including minibenchmarks (AXPY and DOT product), miniapps (LULESH, MiniFE, and SNAP-LAMMPS), and a scientific kernel based on the lattice Boltzmann method.

Valero Lara, Pedro↗

Integration, Testing and Performance of the Infrared Multi-Object Spectrometer

The Infrared Multi-Object Spectrometer (IRMOS) is a principle investigator-class instrument for the Kitt Peak National Observatory 2.1 m and Mayall 3.8 m telescopes. IRMOS is a near-IR (0.8 - 2.5 micron) spectrometer with low-to mid-resolving power (R = lambda/delta lambda = 300 - 3000). On the 3.8 m telescope, IRMOS produces simultaneous spectra of approximately 100 objects in its approximately 3 x 2 arcmin field of view using a commercial micro electro-mechanical systems (MEMS) digital micro-mirror device (DMD) from Texas Instruments. The multi-mirror array DMD operates as a real-time programmable slit mask. The all-reflective optical design consists of two imaging subsystems. The focal reducer images the focal plane of the telescope onto the DMD field stop, and the spectrograph images the DMD onto a large-format detector. The instrument operates at approximately 80 K, cooled by a single electro-mechanical cryocooler. The bench and all components are made from aluminum 6061-T651. There are three cryogenic mechanisms. We describe laboratory integration and test of IRMOS before shipment to Kitt Peak. We give an overview of the optical alignment technique and integration of optical, mechanical, electrical and cryogenic subsystems. We compare optical test results to model predictions of point spread function size and morphology, contrast, and stray light. We discuss some lessons learned and conclude with a prediction for performance on the telescope.

Ohl, Raymond G.↗

Programmable 2-D Addressable Cryogenic Aperture Masks

We are developing a two-dimensional array of square microshutters (programmable aperture mask) for a multi-object spectrometer for the James Webb Space Telescope (JWST). This device will provide random access selection of the areas in the field to be studied. The device is in essence a close packed array of square slits, each of which can be opened independently to select areas of the sky for detailed study.The device is produced using a 100-micron thick silicon wafer as a substrate with 0.5-micron thick silicon nitride shutters on top of it. Silicon nitride has been selected as the blade and flexure material because its stiffness allows thinner and lighter structures than single crystal Si, the chief alternative, and because of its ease of manufacture. The 100 micron silicon wafer is backetched in a high aspect ratio Deep Reactive Ion Etching (Deep RIE) to leave only a support grid for the shutters and the address electronics. The shutter actuation is done magnetically whereas addressing is electrostatic. 128x128 format microshutter arrays have been produced. Their operation has been demostarted on 32x32 subarrays. Good reliability of the fabrication process and good quality of the microshutters has been achieved. The mechanical behavior and optical performance of the fabricated arrays at cryogenic temperature are being studied.

Kutyrev, A. S.↗

Spacesuit Data Display and Management System

A prototype embedded avionics system has been designed for the next generation of NASA extra-vehicular-activity (EVA) spacesuits. The system performs biomedical and other sensor monitoring, image capture, data display, and data transmission. An existing NASA Phase I and II award winning design for an embedded computing system (ZIN vMetrics - BioWATCH) has been modified. The unit has a reliable, compact form factor with flexible packaging options. These innovations are significant, because current state-of-the-art EVA spacesuits do not provide capability for data displays or embedded data acquisition and management. The Phase 1 effort achieved Technology Readiness Level 4 (high fidelity breadboard demonstration). The breadboard uses a commercial-grade field-programmable gate array (FPGA) with embedded processor core that can be upgraded to a space-rated device for future revisions.

Hall, David G.↗

Synchronous micromechanically resonant programmable photonic circuits

Abstract Programmable photonic integrated circuits (PICs) are emerging as powerful tools for control of light, with applications in quantum information processing, optical range finding, and artificial intelligence. Low-power implementations of these PICs involve micromechanical structures driven capacitively or piezoelectrically but are often limited in modulation bandwidth by mechanical resonances and high operating voltages. Here we introduce a synchronous, micromechanically resonant design architecture for programmable PICs and a proof-of-principle 1×8 photonic switch using piezoelectric optical phase shifters. Our design purposefully exploits high-frequency mechanical resonances and optically broadband components for larger modulation responses on the order of the mechanical quality factor Q m while maintaining fast switching speeds. We experimentally show switching cycles of all 8 channels spaced by approximately 11 ns and operating at 4.6 dB average modulation enhancement. Future advances in micromechanical devices with high Q m , which can exceed 10000, should enable an improved series of low-voltage and high-speed programmable PICs.

42 ENGINEERING↗

Using a Commercial Ethernet PHY Device in a Radiation Environment

This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation-tested and free of destructive latchup errors. The commercial Ethernet PHY's own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY's input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device's power and ground) from taking down the board's main power. Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY's interrupt line, and the status of the Ethernet's switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn't work, the logic device power-cycles the FPGA by toggling the regulator's enable input. This should clear almost all radiation induced errors provided the device is not latched up.

Parks, Jeremy↗