Europa Clipper Magnetometer Thermal Design Evolution, Validation and Verification
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Caron, Ryan↗
SEARCH · Engineering Papers
Results for “Design verification”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Spherical Parameter Estimation and MPDV Applications
A new algebraic least square approach is presented for estimating effective zero center for verification of MPDV(Multichannel Photon Doppler Velocimetry) probe designs. Unlike previous algebraic least square methods for spherical parameter estimation, the new method can be shown to be concise in mathematic formulations, easy of computations, invariant under rigid -body transformations, no need for numerical approximations, and precise in dealing with precise data.
97 MATHEMATICS AND COMPUTING↗
SSME HPFTP/AT Turbine Blade Platform Featherseal Damper Design
During the Space Shuttle Main Engines (SSM) HPFtP/AT development program, engine hot fire testing resulted in turbine blade fatigue cracks. The cracks were noted after only a few tests and a several hundred seconds versus the design goal of 60 tests and >30,000 seconds. Subsequent investigation attributed the distress to excessive steady and dynamic loads. To address these excessive turbine blade loads, Pratt & Whitney Liquid Space Propulsion engineers designed and developed retrofitable turbine blade to blade platform featherseal dampers. Since incorporation of these dampers, along with other turbine blade system improvements, there has been no observed SSME HPFTP/AT turbine blade fatigue cracking. The high time HPFTP/AT blade now has accumulated 32 starts and 19,200 seconds hot fire test time. Figure #1 illustrates the HPFTP/AT turbine blade platform featherseal dampers. The approached selected was to improve the turbine blade structural capability while simultaneously reducing loads. To achieve this goal, the featherseal dampers were designed to seal the blade to blade platform gap and damp the dynamic motions. Sealing improves the steady stress margins by increasing turbine efficiency and improving turbine blade attachment thermal conditioning. Load reduction was achieved through damping. Thin Haynes 188 sheet metal was selected based on its material properties (hydrogen resistance, elongation, tensile strengths, etc.). The 36,000 rpm wheel speed of the rotor result in a normal load of 120#/blade. The featherseals then act as micro-slip dampers during actual SSME operation. After initial design and analysis (prior to full engine testing), the featherseal dampers were tested in P&W's spin rig facility in West Palm Beach, Florida. Both dynamic strain gages and turbine blade tip displacement measurements were utilized to quantify the featherseal damper effectiveness. Full speed (36,000 rpm), room temperature rig testing verified the elimination of fundamental mode (i.e, modes 1 & 2) resonant response. The reduction in turbine blade dynamic response is shown for a typical turbine blade. This paper discusses the design and verification of these dampers. The numerous benefits associated with this design concept warrants consideration in existing and future turbomachinery applications.
Montgomery, S. K.↗
An Analysis of Heavy-Ion Single Event Effects for a Variety of Finite State-Machine Mitigation Strategies
Finite state-machines (FSMs) are used to control operational flow in application specific integrated circuits (ASICs) and field programmable gate array (FPGA) devices. Because of their ease of interpretation, FSMs simplify the design and verification process and consequently are significant components in a synchronous design.
Field Programmable Gate Array (FPGA)↗
Crewed Space Vehicle Battery Safety Requirements
This requirements document is applicable to all batteries on crewed spacecraft, including vehicle, payload, and crew equipment batteries. It defines the specific provisions required to design a battery that is safe for ground personnel and crew members to handle and/or operate during all applicable phases of crewed missions, safe for use in the enclosed environment of a crewed space vehicle, and safe for use in launch vehicles, as well as in unpressurized spaces adjacent to the habitable portion of a space vehicle. The required provisions encompass hazard controls, design evaluation, and verification. The extent of the hazard controls and verification required depends on the applicability and credibility of the hazard to the specific battery design and applicable missions under review. Evaluation of the design and verification program results shall be completed prior to certification for flight and ground operations. This requirements document is geared toward the designers of battery systems to be used in crewed vehicles, crew equipment, crew suits, or batteries to be used in crewed vehicle systems and payloads (or experiments). This requirements document also applies to ground handling and testing of flight batteries. Specific design and verification requirements for a battery are dependent upon the battery chemistry, capacity, complexity, charging, environment, and application. The variety of battery chemistries available, combined with the variety of battery-powered applications, results in each battery application having specific, unique requirements pertinent to the specific battery application. However, there are basic requirements for all battery designs and applications, which are listed in section 4. Section 5 includes a description of hazards and controls and also includes requirements.
Jeevarajan, Judith A.↗
Designing and Executing Measurement and Verification Standards for C-PACE Programs: Lessons Learned from Leading C-PACE Programs
This brief seeks to inform Commercial Property Assessed Clean Energy (C-PACE) program administrators about design and execution of measurement and verification (M&V) standards by leveraging the experience of existing C-PACE programs. It also serves as a resource for state and local jurisdictions interested in establishing new C-PACE programs that incorporate M&V standards. It defines M&V standards in broad terms as technical standards to verify and demonstrate performance of C-PACE projects and programs, regardless of whether the programs require performance guarantees or ongoing post-project M&V.
29 ENERGY PLANNING, POLICY, AND ECONOMY↗
Design and execution of a verification, validation, and uncertainty quantification plan for a numerical model of left ventricular flow after LVAD implantation
Left ventricular assist devices (LVADs) are implantable pumps that act as a life support therapy for patients with severe heart failure. Despite improving the survival rate, LVAD therapy can carry major complications. Particularly, the flow distortion introduced by the LVAD in the left ventricle (LV) may induce thrombus formation. While previous works have used numerical models to study the impact of multiple variables in the intra-LV stagnation regions, a comprehensive validation analysis has never been executed. The main goal of this work is to present a model of the LV-LVAD system and to design and follow a verification, validation and uncertainty quantification (VVUQ) plan based on the ASME V&V40 and V&V20 standards to ensure credible predictions. The experiment used to validate the simulation is the SDSU cardiac simulator, a bench mock-up of the cardiovascular system that allows mimicking multiple operation conditions for the heart-LVAD system. The numerical model is based on Alya, the BSC’s in-house platform for numerical modelling. Alya solves the Navier-Stokes equation with an Arbitrary Lagrangian-Eulerian (ALE) formulation in a deformable ventricle and includes pressure-driven valves, a 0D Windkessel model for the arterial output and a LVAD boundary condition modeled through a dynamic pressure-flow performance curve. The designed VVUQ plan involves: (a) a risk analysis and the associated credibility goals; (b) a verification stage to ensure correctness in the numerical solution procedure; (c) a sensitivity analysis to quantify the impact of the inputs on the four quantities of interest (QoIs) (average aortic root flow $Q^{avg}_{Ao}$, maximum aortic root flow $Q^{max}_{Ao}$, average LVAD flow $Q^{avg}_{VAD}$, and maximum LVAD flow $Q^{max}_{VAD}$; (d) an uncertainty quantification using six validation experiments that include extreme operating conditions. Numerical code verification tests ensured correctness of the solution procedure and numerical calculation verification showed a grid convergence index (GCI)95% <3.3%. The total Sobol indices obtained during the sensitivity analysis demonstrated that the ejection fraction, the heart rate, and the pump performance curve coefficients are the most impactful inputs for the analysed QoIs. The Minkowski norm is used as validation metric for the uncertainty quantification. It shows that the midpoint cases have more accurate results when compared to the extreme cases. The total computational cost of the simulations was above 100 [core-years] executed in around three weeks time span in Marenostrum IV supercomputer. This work details a novel numerical model for the LV-LVAD system, that is supported by the design and execution of a VVUQ plan created following recognised international standards. We present a methodology demonstrating that stringent VVUQ according to ASME standards is feasible but computationally expensive.
59 BASIC BIOLOGICAL SCIENCES↗
Range 7 Scanner Integration with PaR Robot Scanning System
An interface bracket and coordinate transformation matrices were designed to allow the Range 7 scanner to be mounted on the PaR Robot detector arm for scanning the heat shield or other object placed in the test cell. A process was designed for using Rapid Form XOR to stitch data from multiple scans together to provide an accurate 3D model of the object scanned. An accurate model was required for the design and verification of an existing heat shield. The large physical size and complex shape of the heat shield does not allow for direct measurement of certain features in relation to other features. Any imaging devices capable of imaging the entire heat shield in its entirety suffers a reduced resolution and cannot image sections that are blocked from view. Prior methods involved tools such as commercial measurement arms, taking images with cameras, then performing manual measurements. These prior methods were tedious and could not provide a 3D model of the object being scanned, and were typically limited to a few tens of measurement points at prominent locations. Integration of the scanner with the robot allows for large complex objects to be scanned at high resolution, and for 3D Computer Aided Design (CAD) models to be generated for verification of items to the original design, and to generate models of previously undocumented items. The main components are the mounting bracket for the scanner to the robot and the coordinate transformation matrices used for stitching the scanner data into a 3D model. The steps involve mounting the interface bracket to the robot's detector arm, mounting the scanner to the bracket, and then scanning sections of the object and recording the location of the tool tip (in this case the center of the scanner's focal point). A novel feature is the ability to stitch images together by coordinates instead of requiring each scan data set to have overlapping identifiable features. This setup allows models of complex objects to be developed even if the object is large and featureless, or has sections that don't have visibility to other parts of the object for use as a reference. In addition, millions of points can be used for creation of an accurate model [i.e. within 0.03 in. (=0.8 mm) over a span of 250 in. (=635 mm)].
Schuler, Jason↗
Automated biowaste sampling system urine subsystem operating model, part 1
The urine subsystem automatically provides for the collection, volume sensing, and sampling of urine from six subjects during space flight. Verification of the subsystem design was a primary objective of the current effort which was accomplished thru the detail design, fabrication, and verification testing of an operating model of the subsystem.
Fogal, G. L.↗
High heat transfer oxidizer heat exchanger design and analysis
The RL10-2B engine, a derivative of the RL10, is capable of multimode thrust operation. This engine operates at two low thrust levels: tank head idle (THI), which is approximately 1 to 2% of full thrust, and pumped idle (PI), which is 10% of full thrust. Operation at THI provides vehicle propellant settling thrust and efficient engine thermal conditioning; PI operation provides vehicle tank pre-pressurization and maneuver thrust for low-g deployment. Stable combustion of the RL10-2B engine during the low thrust operating modes can be accomplished by using a heat exchanger to supply gaseous oxygen to the propellant injector. The oxidizer heat exchanger (OHE) vaporizes the liquid oxygen using hydrogen as the energy source. The design, concept verification testing and analysis for such a heat exchanger is discussed. The design presented uses a high efficiency compact core to vaporize the oxygen, and in the self-contained unit, attenuates any pressure and flow oscillations which result from unstable boiling in the core. This approach is referred to as the high heat transfer design. An alternative approach which prevents unstable boiling of the oxygen by limiting the heat transfer is referred to as the low heat transfer design and is reported in Pratt & Whitney report FR-19135-2.
Kmiec, Thomas D.↗
Test bed design for evaluating the Space Station ECLSS Water Recovery System
The design of the Phase III Environmental Control and Life Support System (ECLSS) Water Recovery System (WRS) test bed is in progress at the Marshall Space Flight Center (MSFC), building 4755, in Huntsville, Alabama. The overall design for the ECLSS WRS test bed will be discussed. Described within this paper are the design, fabrication, placement, and testing of the supporting facility which will provide the test bed for the ECLSS subsystems. Topics to be included are sterilization system design, component selection, microbial design considerations, and verification of test bed design prior to initiating WRS testing.
Ezell, Timothy G.↗
Program Model Checking as a New Trend
This paper introduces a special section of STTT (International Journal on Software Tools for Technology Transfer) containing a selection of papers that were presented at the 7th International SPIN workshop, Stanford, August 30 - September 1, 2000. The workshop was named SPIN Model Checking and Software Verification, with an emphasis on model checking of programs. The paper outlines the motivation for stressing software verification, rather than only design and model verification, by presenting the work done in the Automated Software Engineering group at NASA Ames Research Center within the last 5 years. This includes work in software model checking, testing like technologies and static analysis.
Havelund, Klaus↗
Robotics System Process and Concept for On-orbit Assembly for Potential Mars Sample Return
Proposed Mars Sample Return (MSR) missions would require on-orbit assembly of containment vessels to meet backward Planetary Protection requirements and transfer of the sample container through various stations and positions. Some operations would have to be performed autonomously, and others would require ground-in-loop decision-making stages and verification processes. One concept design for an Earth Return Orbiter (ERO) Capture, Contain, and Return System (CCRS) Transfer Mechanism (TM) is a multi-Degree of Freedom (DOF) manipulator that utilizes a passive End Effector (EE) to assist in containment vessel assembly. To converge on a feasible design, a robotic system process has been instantiated. This process is composed of three main phases: robotic problem definition (operating environment, operations/functions, system goals), robotic solution selection (trade studies on the number of degrees of freedom, number of mechanisms, types of mechanisms), robotic solution design, implementation, and verification and validation (kinematic configuration, robotic and kinematic analysis and topology optimization of components). As a final product of this process, a half-scale functional prototype of the TM was developed to demonstrate the end-to-end operation capability.
Strahle, Jackson W↗
Terminal Descent Radar System Testbed for Future Planetary Landers
Terminal Descent Radars (TDR), or landing radars, have been an integral element of Guidance, Navigation and Control (GN\&C) sensor suites of robotic exploration missions to the Moon and Mars. As plans for new, exciting exploration missions to the Moon, Mars and other planetary bodies are being developed, there is a need for a new generation of TDRs that are smaller, consume less power and are less expensive than previous sensors. The challenge of designing such a landing sensor is twofold: the first is to have well-vetted software tools that allow us to explore the design space for a particular mission scenario and analyze performance of relevant radar architectures. The second challenge is to reduce mass and power requirements of a landing radar without compromising reliability and performance. New design approaches that address these challenges need to be tested and demonstrated in realistic Entry-Descent-Landing (EDL)/Deorbit-Descent-Landing (DDL) scenarios. In this paper, we describe a TDR testbed developed at the Jet Propulsion Laboratory. The testbed is a closed-loop design, analysis and verification capability used to design and evaluate the next generation of landing radars for a variety of EDL/DDL scenarios.
Tope, Michael↗
Terminal Descent Radar System Testbed for Future Planetary Landers
Terminal Descent Radars (TDR), or landing radars, have been an integral element of Guidance, Navigation and Control (GN\&C) sensor suites of robotic exploration missions to the Moon and Mars. As plans for new, exciting exploration missions to the Moon, Mars and other planetary bodies are being developed, there is a need for a new generation of TDRs that are smaller, consume less power and are less expensive than previous sensors. The challenge of designing such a landing sensor is twofold: the first is to have well-vetted software tools that allow us to explore the design space for a particular mission scenario and analyze performance of relevant radar architectures. The second challenge is to reduce mass and power requirements of a landing radar without compromising reliability and performance. New design approaches that address these challenges need to be tested and demonstrated in realistic Entry-Descent-Landing (EDL)/Deorbit-Descent-Landing (DDL) scenarios. In this paper, we describe a TDR testbed developed at the Jet Propulsion Laboratory. The testbed is a closed-loop design, analysis and verification capability used to design and evaluate the next generation of landing radars for a variety of EDL/DDL scenarios.
Tope, Michael↗
Even Higher-Level Synthesis: An Exploration of AI Hardware Accelerators using HLS4ML
With the rise of artificial intelligence, the popularization of deep learning, and a constantly evolving industry, the demand for flexible and efficient tools has never been greater. As algorithms grow more complex, their runtime and energy consumption increase exponentially. Customized hardware accelerators, long used for specific mathematical operations, remain essential for managing modern applications' computational and power demands. Hardware accelerators can speed up complex computations by orders of magnitude, but their manual design and verification processes are often challenging and time-consuming. High-Level Synthesis (HLS) provides a solution by transforming high-level algorithm descriptions, typically written in C++ or SystemC, into synthesizable RTL suitable for hardware implementation. This approach reduces development time for RTL engineers while offering flexibility beyond what traditional handwritten RTL can provide. We extended this capability to the machine-learning domain with the open-source framework hls4ml, which allows neural networks trained in Python frameworks like Tensorflow or PyTorch to be synthesized into efficient hardware representations for the traditional FPGA and ASIC flows. This breakthrough addresses the growing need for reduced design turnaround and easy verification of ML hardware accelerators with low latency and power efficiency constraints. During this tutorial, we will demonstrate how Python complements HLS by simplifying the ML design process, bridging the gap between software and hardware development. Attendees will explore how we translate neural networks modeled in Python into fixed-point C++ models suitable for HLS workflows. We will dive into strategies like Value-Range Analysis and Quantization-Aware Training, which optimize these designs for deployment and evaluate their accuracy, power consumption, and energy efficiency. To exemplify these concepts, experts from Fermilab will share their experiences applying this technology to high-energy physics experiments, where real-time, low-latency processing is critical. Over the years, Fermilab engineers have demonstrated how deep neural networks, optimized for hardware using hls4ml, can meet the stringent requirements of trigger systems at the CERN Large Hadron Collider. These systems rely on rapid decision-making to process immense data volumes while retaining only the most relevant events for further analysis. The application of hls4ml has also been extended to innovative technologies like smart pixel arrays. These smart pixels integrate ML inference capabilities directly into sensor devices, enabling localized data processing at the pixel level. This approach drastically reduces the need to transmit raw data to external processing units, significantly decreasing power consumption and latency. By embedding neural networks within the pixel architecture, the smart pixels can identify and prioritize relevant data in real time, providing a highly efficient solution for edge computing in scenarios such as particle detectors and imaging systems. Fermilab's work highlights the potential of hardware-accelerated ML in scenarios where both speed and power efficiency are mission-critical. Through this tutorial, attendees will gain valuable insights into the challenges and solutions of deploying ML in hardware. Understanding how HLS and hls4ml streamline the development of neural network-based hardware accelerators is fundamental for the industry's future. Participants will learn how these technologies are shaping the future of AI and scientific computing.
Di Guglielmo, Giuseppe [Fermilab]↗
HDL to verification logic translator
The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.
Gambles, J. W.↗
Propel: Tools and Methods for Practical Source Code Model Checking
The work reported here is an overview and snapshot of a project to develop practical model checking tools for in-the-loop verification of NASA s mission-critical, multithreaded programs in Java and C++. Our strategy is to develop and evaluate both a design concept that enables the application of model checking technology to C++ and Java, and a model checking toolset for C++ and Java. The design concept and the associated model checking toolset is called Propel. It builds upon the Java PathFinder (JPF) tool, an explicit state model checker for Java applications developed by the Automated Software Engineering group at NASA Ames Research Center. The design concept that we are developing is Design for Verification (D4V). This is an adaption of existing best design practices that has the desired side-effect of enhancing verifiability by improving modularity and decreasing accidental complexity. D4V, we believe, enhances the applicability of a variety of V&V approaches; we are developing the concept in the context of model checking. The model checking toolset, Propel, is based on extending JPF to handle C++. Our principal tasks in developing the toolset are to build a translator from C++ to Java, productize JPF, and evaluate the toolset in the context of D4V. Through all these tasks we are testing Propel capabilities on customer applications.
Mansouri-Samani, Massoud↗