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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Synthesis and electrical behavior of VO 2 thin films grown on SrRuO 3 electrode layers

VO 2 thin films were grown on conducting oxide underlayer SrRuO 3 buffered SrTiO 3 (111) and Si/SiO 2 substrates, respectively, using sputtering. X-ray diffraction phi-scans revealed the epitaxial nature of the VO 2 films grown on SrRuO 3 buffered SrTiO 3 and polycrystalline structure for films grown on SrRuO 3 buffered Si/SiO 2 . X-ray photoelectron spectroscopy confirms a dominant presence of V 4+ in both films and establishes a high-quality growth of single-phase VO 2 films. Temperature and electric-field driven metal-insulator-transition in both the in-plane and out-of-plane configurations were investigated. Depending on the configuration, the resistance change across the metal-insulator-transition varies from a factor of 1.57–3. The measured resistance in each state as well as the magnitude of resistance change were similar during temperature and electric-field driven metal-insulator-transition. To shed light on the suppressed metal-insulator-transition characteristics due to the current shunting effect from conducting SrRuO 3 bottom electrode, a distributed resistance network model is proposed and benchmarked against reports from the literature. Here, the results demonstrate the growth of high-quality VO 2 on conducting SrRuO 3 layers and their electrical behavior, which is of particular interest for all-oxide electronic devices utilizing phase transitions such as resistive memory and neuromorphic oscillators.

36 MATERIALS SCIENCE↗
DOE OSTI2020

3D-ReG: A 3D ReRAM-based Heterogeneous Architecture for Training Deep Neural Networks

Deep neural network (DNN) models are being expanded to a broader range of applications. The computational capability of traditional hardware platforms cannot accommodate the growth of model complexity. Among recent technologies to accelerate DNN, resistive memory (ReRAM)-based processing-in-memory (PIM) emerged as a promising solution for DNN inference due to its high efficiency for matrix-based computation. We face two major technical challenges in extending the use of ReRAM-based accelerators for training: (1) full-precision data is essential in back-propagation; (2) the need to support both feed-forward and back-propagation aggravates the data-movement burden. We propose a heterogeneous architecture named as 3D-ReG, which leverages full-precision GPU to ensure training accuracy and low-overhead 3D integration to provide low-cost data movements. Moreover, we introduce conservative and aggressive task-mapping schemes, which partition the computation phases in different ways to balance execution efficiency and training accuracy. We evaluate 3D-ReG implemented with two 3D integration technologies, through-silicon vias (TSVs) and monolithic inter-tier vias (MIVs), and compare them with GPU-only and PIM-only counterparts. Various GPU-only platforms using two main-memory technologies (DRAM, ReRAM) and three interconnect technologies (2D, TSV, MIV) are evaluated as well. Experimental results show that 3D-ReG can achieve on average 5.64× training speedup and 3.56× higher energy efficiency compared with the GPU with DRAM as main memory, at the cost of 0.05%–3.39% accuracy drop. We define a new metric, gain-loss ratio (GLR), which quantitatively evaluates the capability of a DNN training hardware in terms of the model accuracy and hardware efficiency. The results of our comparison show that the aggressive task-mapping scheme on MIV-based 3D-ReG outperforms the other methods.

Computer Science↗
DOE OSTI2023

A Hardware and Software Co-design Framework for Energy Efficient Neuromorphic Systems

Neuromorphic systems can be realized by a variety of algorithms and architectures. A common understanding is that spiking neuromorphic designs, which encode information into spatio-temporal spiking events, are both a biologically-accurate and efficient way of processing information. However, representing the information through timing relationships induces sophisticated circuit designs in traditional CMOS-based implementations. In recent years, high-capacity resistive memory (RRAM, aka, memristor) has demonstrated great potential in mimicking synaptic behaviors. Several RRAM-based spiking neuromorphic designs exist, most of which focus on rate coding schemes. These designs simplify circuit implementations of neuron models and explore challenges such as unsatisfactory speed, resolution, and performance. As an alternative, we will explore temporal coding spiking neuromorphic systems that encode information as the relative timing of neuron activations (spikes), which have been proven to be more adaptive and energy-efficient. Developing a neuromorphic system for spiking neural network (SNN) inference and online training, however, faces some major technical challenges: (1) It lacks circuit implementation support for temporal-coding SNN to achieve satisfying power efficiency and accuracy; (2) Although existing research works have investigated memristive synapse and neuron designs for spike-timing-dependent plasticity, the non-ideal conditions in implementation, such as device variations and signal degradation, degrade online learning accuracy of large scale systems; and (3) Non-optimized, inter-layer data traffic in SNNs, leads to unnecessary data communication costs. In this project, we plan to address these challenges by a hardware and software co-design framework that incorporates solutions at the circuit, architecture, and algorithm levels. At the circuit-level, we will elaborate on the in-situ SNN processing element designs for supporting both inference and online training modes. Variation-aware schemes will be studied to improve reliability. At the architecture level, we propose a pipelined, asynchronous architecture to retain the timing resolution of spikes. At the algorithm level, we will investigate an innovative SNN training algorithm for enabling activation sparsification and reducing unnecessary data communication costs. This neuromorphic system will provide an effective solution to real-life energy-constrained applications and significantly contribute to the exploration of next-generation high-performance computing systems under the DOE context.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Controlling reversible phase transitions in rare-earth nickelates for novel memory devices

Resistive switching in correlated complex oxides is lucrative for emerging applications in neuromorphic computing, and densely scaled non-volatile memory. Electrical conductance of such complex oxides can be controllable switched across multiple orders of magnitude by either (a) electroforming a conduction channel (e.g., in tungsten oxide), or (b) inducing Mott-Hubbard transition (e.g., in rare-earth nickelates)– both via controlled migration of defects (such as oxygen vacancies) under applied bias. Nevertheless, the promise of such defect-driven electronic transitions are far from realized due to a lack of fundamental understanding of the atomic-scale processes that underlie migration and spatiotemporal evolution of oxygen vacancies over nano-to-mesoscopic length/timescales under applied electric field. In this project, we employ a synergistic integration of density functional theory (DFT) calculations, ab initio/classical molecular dynamics (AIMD/CMD) simulations, machine learning (ML), precision synthesis, and multi-modal X-ray imaging experiments to address this knowledge gap. Such an integrated approach offers to elucidate the correlations between subtle structural distortion and oxidation states; treat localized charge carriers; describe defect/ion transport in the presence of electric field; and, in turn, greatly advance the current understanding of microstructural evolution in complex oxides under applied bias. The fundamental knowledge gained from this work will enable precise control over hierarchical defect structures and unravel new routes to manipulate resistance states in complex oxides. This, in turn, will accelerate design of novel devices with desired set of neural functionalities, and high-speed densely-scaled resistive random access memory technologies.

36 MATERIALS SCIENCE↗
DOE OSTI2022

New Total-Ionizing-Dose Resistant Data Storing Technique for NAND Flash Memory

This paper describes a new non-charge-based data storing technique in NAND flash memory called watermark that encodes read-only data in the form of physical properties of flash memory cells. Unlike traditional charge-based data storing method in flash memory, the proposed technique is resistant to total ionizing dose (TID) effects. To evaluate its resistance to irradiation effects, we analyze data stored in several commercial single-level-cell (SLC) flash memory chips from different vendors and technology nodes. These chips are irradiated using a Co-60 gamma-ray source array for up to 100 krad(Si) at Sandia National Laboratories. Experimental evaluation performed on a flash chip from Samsung shows that the intrinsic bit error rate (BER) of watermark increases from 0.8% for TID = 0 krad(Si) to 1% for TID = 100 krad(Si). Conversely, the BER of charge-based data stored on the same chip increases from 0% at TID = 0 krad(Si) to 1.5% at TID = 100 krad(Si). Overall, the results imply that the proposed technique may potentially offer significant improvements in data integrity relative to traditional charge-based data storage for very high radiation (TID > 100 krad(Si)) environments. These gains in data integrity relative to the charge-based data storage are useful in radiation-prone environments, but they come at the cost of increased write times and higher BERs before irradiation.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Nonvolatile electrochemical memory at 600°C enabled by composition phase separation

Silicon-based microelectronics are limited to ~150°C and therefore not suitable for the extremely high temperatures in aerospace, energy, and space applications. While wide-band-gap semiconductors can provide high-temperature logic, nonvolatile memory devices at high temperatures have been challenging. In this work, we develop a nonvolatile electrochemical memory cell that stores and retains analog and digital information at temperatures as high as 600°C. Through correlative scanning transmission electron microscopy, we show that this high-temperature information retention is a result of composition phase separation between the oxidized and reduced forms of amorphous tantalum oxide. This result demonstrates a memory concept that is resilient at extreme temperatures and reveals phase separation as the principal mechanism that enables nonvolatile information storage in these electrochemical memory cells.

42 ENGINEERING↗
DOE OSTI2022

Learning the Temporal Effect in Infrared Thermal Videos With Long Short-Term Memory for Quality Prediction in Resistance Spot Welding

With the advances of sensing technology, in-situ infrared thermal videos can be collected from Resistance Spot Welding (RSW) processes. Each video records the formulation process of a weld nugget. The nugget evolution creates a “temporal effect” across the frames, which can be leveraged for real-time, nondestructive evaluation (NDE) of the weld quality. Currently, quality prediction with imaging data mainly focuses on optical feature extraction with Convolutional Neural Network (CNN) but does not make the most of such temporal effect. In this study, pixels corresponding to critical locations on the weld nugget surface are extracted from a video to form multivariate time series (MTS). Multivariate Adaptive Regression Splines (MARS) is used in MTS processing to remove noisy signals related to uninformative frames. A Stacked Long Short-Term Memory (LSTM) model is developed to learn from the processed MTS and then predicts weld nugget size and thickness in real-time NDE. Results from a case study on RSW of Boron steel demonstrates the improvement in prediction accuracy and computational time with the proposed method, as compared to CNN-based weld quality prediction.

Guo, Shenghan↗
DOE OSTI2022

ECRAM Materials, Devices, Circuits and Architectures: A Perspective

Abstract Non‐von‐Neumann computing using neuromorphic systems based on two‐terminal resistive nonvolatile memory elements has emerged as a promising approach, but its full potential has not been realized due to the lack of materials and devices with the appropriate attributes. Unlike memristors, which require large write currents to drive phase transformations or filament growth, electrochemical random access memory (ECRAM) decouples the “write” and “read” operations using a “gate” electrode to tune the conductance state through charge‐transfer reactions, and every electron transferred through the external circuit in ECRAM corresponds to the migration of ≈1 ion used to store analogue information. Like static dopants in traditional semiconductors, electrochemically inserted ions modulate the conductivity by locally perturbing a host's electronic structure; however, ECRAM does so in a dynamic and reversible manner. The resulting change in conductance can span orders of magnitude, from gradual increments needed for analog elements, to large, abrupt changes for dynamically reconfigurable adaptive architectures. In this in‐depth perspective, the history of ECRAM, the recent progress in devices spanning organic, inorganic, and 2D materials, circuits, architectures, the rich portfolio of challenging, fundamental questions, and how ECRAM can be harnessed to realize a new paradigm for low‐power neuromorphic computing are discussed.

Talin, A. Alec↗
DOE OSTI2021

Operando characterization of conductive filaments during resistive switching in Mott VO 2

Significance To perform hardware-based neuromorphic computing, novel materials exhibiting a wide variety of electronic properties are currently being explored. VO 2 is well known to exhibit an insulator-to-metal transition as well as volatile resistive switching. Many questions regarding the basic mechanism of the nonvolatile switching in this material are unanswered. In this work, the formation and relaxation of conductive filaments through nonvolatile resistive switching in VO 2 devices have been realized. The V 5 O 9 Magnéli phase conductive filament has been identified. Our results demonstrate that both resistive switching behaviors can be achieved in a single material, crucial for future technology like resistive switching memories or neuromorphic logic.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Progress and Challenges for Memtransistors in Neuromorphic Circuits and Systems

Due to the increasing importance of artificial intelligence (AI), significant recent effort has been devoted to the development of neuromorphic circuits that seek to emulate the energy-efficient information processing of the brain. While non-volatile memory (NVM) based on resistive switches, phase-change memory, and magnetic tunnel junctions has shown potential for implementing neural networks, additional multi-terminal device concepts are required for more sophisticated bio-realistic functions. Of particular interest are memtransistors based on low-dimensional nanomaterials, which are capable of electrostatically tuning memory and learning behavior at the device level. Herein, a conceptual overview of the memtransistor is provided in the context of neuromorphic circuits. Recent progress is surveyed for memtransistors and related multi-terminal NVM devices including dual-gated floating-gate memories, dual-gated ferroelectric transistors, and dual-gated van der Waals heterojunctions. Further, the different materials systems and device architectures are classified based on the degree of control and relative tunability of synaptic behavior, with an emphasis on device concepts that harness the reduced dimensionality, weak electrostatic screening, and phase-changes properties of nanomaterials. Finally, strategies for achieving wafer-scale integration of memtransistors and multi-terminal NVM devices are delineated, with specific attention given to the materials challenges for practical neuromorphic circuits.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Analysis and mitigation of parasitic resistance effects for analog in-memory neural network acceleration

To support the increasing demands for efficient deep neural network processing, accelerators based on analog in-memory computation of matrix multiplication have recently gained significant attention for reducing the energy of neural network inference. However, analog processing within memory arrays must contend with the issue of parasitic voltage drops across the metal interconnects, which distort the results of the computation and limit the array size. This work analyzes how parasitic resistance affects the end-to-end inference accuracy of state-of-the-art convolutional neural networks, and comprehensively studies how various design decisions at the device, circuit, architecture, and algorithm levels affect the system's sensitivity to parasitic resistance effects. Here, a set of guidelines are provided for how to design analog accelerator hardware that is intrinsically robust to parasitic resistance, without any explicit compensation or re-training of the network parameters.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS↗
DOE OSTI2022

Artificial spin ice phase-change memory resistors

Abstract We present a proposal for realization of an electrical memory reminiscent of a memristor in connected Kagome artificial spin ice. We show that current flowing through the system alters the magnetic ensemble, which in turns controls the overall resistance thus leaving memory of current passage in the system. This introduces a current-dependent effect for a dynamic resistive state. We simulate a spin-induced thermal phase-change mechanism, and an athermal domain-wall spin inversion. In both cases we observe electrical memory behavior with an I – V hysteretic pinched loop, typical of memristors. These results can be extended to the more complex geometries in which artificial spin ice can be designed to engineer the hysteresis curve.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

Ligand Substituent Effects on the Electronic Properties of Lindqvist‐Type Polyoxometalate Multi‐Level‐Switches in the Gas Phase, Solution and on Surfaces

Abstract Although the intrinsic electronic properties of polyoxometalates (POMs) can be greatly influenced by modifying them with organic substituents, their resistive switching behavior on surfaces dependent on the organic substituents remains largely unexplored. In this work, we assessed the importance of electron‐withdrawing and electron‐donating ligand substituents on the material properties of a series of hybrid Lindqvist‐type hexavanadates TBA 2 [V 6 O 13 ((OCH 2 ) 3 CCH 2 OH) 2 ] (TBA 2 V 6 ‐OH), TBA 2 [V 6 O 13 ((OCH 2 ) 3 CMe) 2 ] (TBA 2 V 6 ‐Me), TBA 2 [V 6 O 13 ((OCH 2 ) 3 CNHCOCH 2 Cl) 2 ] (TBA 2 V 6 ‐Cl), and TBA 2 [V 6 O 13 ((OCH 2 ) 3 CNHCOCH 2 ‐OOCC 10 H 15 ) 2 ] (TBA 2 V 6 ‐Ad) as potential resistive random‐access memory (ReRAM) components. Compared to their redox behavior in solution, changing the ligand substituents on surfaces results in no significant effect on the potential and, thus, no effect on the resistance steps in the current‐voltage profiles. However, while the current‐voltage characteristics do not change, the peripheral metal‐free substituents in the trisalkoxide framework of Lindqvist‐type hexavanadate molecules influence the adsorption and switching stability of these POMs on gold. This work highlights the noticeable differences between hexavanadate's redox properties in solution (which follow the trend observed in the gas phase) and hexavanadate's resistive switching properties on conducting surfaces. Importantly, their multi‐state switching behavior is not significantly altered by the different type of substituent at the periphery of the trisalkoxo ligands.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Resistance drift in Ge 2 Sb 2 Te 5 phase change memory line cells at low temperatures and its response to photoexcitation

Resistance drift in amorphous Ge 2 Sb 2 Te 5 is experimentally characterized in melt-quenched line cells in the range of 300 K to 125 K and is observed to follow the previously reported power-law behavior with drift coefficients in the range of 0.07 to 0.11 in the dark, linearly decreasing with 1/kT. While these drift coefficients measured in the dark are similar to commonly observed drift coefficients (~0.1) at and above room temperature, measurements under light show a significantly lower drift coefficient (0.05 under illumination vs 0.09 in the dark at 150 K). Periodic on/off switching of light shows a sudden decrease/increase in resistance, attributed to photo-excited carriers, followed by a very slow response (~30 min at 150 K) attributed to contribution of electron traps and slow trap-to-trap charge exchanges. A device-level electronic model is used to relate these experimental findings to gradual charging of electron traps in amorphous Ge 2 Sb 2 Te 5 , which gives rise to growth of a potential barrier for holes in time and, hence, resistance drift.

42 ENGINEERING↗
DOE OSTI2022

Progress toward picosecond on-chip magnetic memory

Here, we offer a perspective on the prospects of ultrafast spintronics and opto-magnetism as a pathway to high-performance, energy-efficient, and non-volatile embedded memory in digital integrated circuit applications. Conventional spintronic devices, such as spin-transfer-torque magnetic-resistive random-access memory (STT-MRAM) and spin–orbit torque MRAM, are promising due to their non-volatility, energy-efficiency, and high endurance. STT-MRAMs are now entering into the commercial market; however, they are limited in write speed to the nanosecond timescale. Improvement in the write speed of spintronic devices can significantly increase their usefulness as viable alternatives to the existing CMOS-based devices. In this article, we discuss recent studies that advance the field of ultrafast spintronics and opto-magnetism. An optimized ferromagnet–ferrimagnet exchange-coupled magnetic stack, which can serve as the free layer of a magnetic tunnel junction (MTJ), can be optically switched in as fast as ~3 ps. Integration of ultrafast magnetic switching of a similar stack into an MTJ device has enabled electrical readout of the switched state using a relatively larger tunneling magnetoresistance ratio. Purely electronic ultrafast spin–orbit torque induced switching of a ferromagnet has been demonstrated using ~6 ps long charge current pulses. We conclude our Perspective by discussing some of the challenges that remain to be addressed to accelerate ultrafast spintronics technologies toward practical implementation in high-performance digital information processing systems.

42 ENGINEERING↗