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At least 37 records · Page 2

Reconfiguring DNA Nanotube Architectures via Selective Regulation of Terminating Structures

Molecular assemblies inside cells often undergo structural reconfiguration in response to stimuli to alter their function. Adaptive reconfiguration of cytoskeletal networks, for example, enables cellular shape change, movement, and cargo transport and plays a key role in driving complex processes such as division and differentiation. The cellular cytoskeleton is a self-assembling polymer network composed of simple filaments, so reconfiguration often occurs through the rearrangement of its component filaments’ connectivities. DNA nanotubes have emerged as promising building blocks for constructing programmable synthetic analogs of cytoskeletal networks. Nucleating seeds can control when and where nanotubes grow and capping structures can bind nanotube ends to stop growth. Such seeding and capping structure, collectively called termini, can organize nanotubes into larger architectures. However, these structures cannot be selectively activated or inactivated in response to specific stimuli to rearrange nanotube architectures, a key property of cytoskeletal networks. Here we demonstrate how selective regulation of the binding affinity of DNA nanotube termini for DNA nanotube monomers or nanotube ends can direct the reconfiguration of nanotube architectures. Using DNA hybridization and strand displacement reactions that specifically activate or inactivate four orthogonal nanotube termini, we demonstrate that nanotube architectures can be reconfigured by selective addition or removal of unique termini. Lastly, we show how terminus activation could be a sensitive detector and amplifier of a DNA sequence signal. These results could enable the development of adaptive and multifunctional materials or diagnostic tools.

59 BASIC BIOLOGICAL SCIENCES↗

Tailoring Spin-Wave Channels in a Reconfigurable Artificial Spin Ice

Artificial spin ices are ensembles of geometrically arranged interacting nanomagnets that have shown promising potential for the realization of reconfigurable magnonic crystals. Such systems allow for the manipulation of spin waves on the nanoscale and their potential use as information carriers. However, there are presently two general obstacles to the realization of artificial spin-ice-based magnonic crystals: the magnetic state of artificial spin ices is difficult to reconfigure and the magnetostatic interactions between the nanoislands are often weak, preventing mode coupling. We demonstrate, using micromagnetic modeling, that coupling a reconfigurable artificial spin-ice geometry made of weakly interacting nanomagnets to a soft magnetic underlayer creates a complex system exhibiting dynamically coupled modes. These give rise to spin-wave channels in the underlayer at well-defined frequencies, based on the artificial spin-ice magnetic state, which can be reconfigured. Finally, these findings open the door to the realization of reconfigurable magnonic crystals with potential applications for data transport and processing in magnonic-based logic architectures.

25 ENERGY STORAGE↗

DynPaC: Coarse-Grained, Dynamic, and Partially Reconfigurable Array for Streaming Applications

Coarse-grained reconfigurable arrays (CGRAs) provide higher flexibility than application-specific integrated circuits (ASICs) and higher efficiency than fine-grained reconfigurable devices such as Field Programmable Gate Arrays (FPGAs). However, CGRAs are generally designed to support offloading of a single kernel. While their design, based on communicating functional units, appears to naturally suit streaming applications composed of multiple cooperating kernels, current approaches only statically partition the resources across kernels. However, streaming applications often are data-dependent, leading to variable kernel execution times depending on the input data and impacting the throughput of the entire pipeline if resources are statically allocated. Therefore, in this paper, we discuss the design of DynPaC — a coarse-grained, dynamically, and partially reconfigurable array for data-dependent streaming applications. We discuss the required software and hardware components to manage partial dynamic reconfiguration. We demonstrate that by supporting partial dynamic reconfiguration, we can obtain an average speedup of 1.44X for a representative set of applications w.r.t. static partitioning, with a limited area overhead (6.4% of the entire chip).

Tan, Cheng↗

Optimal reconfiguration strategy for a degradable multimodule computing system

The present quantitative approach to the problem of reconfiguring a degradable multimode system assigns some modules to computation and arranges others for reliability. By using expected total reward as the optimal criterion, there emerges an active reconfiguration strategy based not only on the occurrence of failure but the progression of the given mission. This reconfiguration strategy requires specification of the times at which the system should undergo reconfiguration, and the configurations to which the system should change. The optimal reconfiguration problem is converted to integer nonlinear knapsack and fractional programming problems.

Lee, Yann-Hang↗

Updated Results of Deterministic Reconfigurable Control Design for the X-33 Vehicle

In the event of a control surface failure, the purpose of a reconfigurable control system is to redistribute the control effort among the remaining working surfaces such that satisfactory stability and performance are retained. An Off-line Nonlinear General Constrained Optimization approach was used for the reconfigurable X-33 control design method. Three examples of failure are shown using a high fidelity 6 DOF simulation (case 1: ascent with a left body flap jammed at 25 deg.; case 2: entry with a right inboard elevon jam at 25 deg. and case 3: landing (TAEM) (Terminal Area Energy Management) with a left rudder jam at -30 deg.) Failure comparisons between responses with the nominal controller and reconfigurable controllers show the benefits of reconfiguration. Single jam aerosurface failures were considered, and failure detection and identification is considered accomplished in the actuator controller. The X-33 flight control system will incorporate reconfigurable flight control in the baseline system.

Cotting, M. Christopher↗

Full Envelope Reconfigurable Control Design for the X-33 Vehicle

In the event of a control surface failure, the purpose of a reconfigurable control system is to redistribute the control effort among the remaining working surfaces such that satisfactory stability and performance are retained. An Off-line Nonlinear General Constrained Optimization (ONCO) approach was used for the reconfigurable X-33 control design method. Three example failures are shown using a high fidelity 6 DOF simulation (case I ascent with a left body flap jammed at 25 deg.; case 2 entry with a right inboard elevon jam at 25 deg.; and case 3, landing (TAEM) with a left rudder jam at -30 deg.) Failure comparisons between responses with the nominal controller and reconfigurable controllers show the benefits of reconfiguration. Single jam aerosurface failures were considered, and failure detection and identification is considered accomplished in the actuator controller. The X-33 flight control system will incorporate reconfigurable flight control in the baseline system.

Cotting, M. Christopher↗

Application of Reconfigurable Computing Technology to Multi-KiloHertz Micro-Laser Altimeter (MMLA) Data Processing

The Multi-KiloHertz Micro-Laser Altimeter (MMLA) is an aircraft based instrument developed by NASA Goddard Space Flight Center with several potential spaceflight applications. This presentation describes how reconfigurable computing technology was employed to perform MMLA signal extraction in real-time under realistic operating constraints. The MMLA is a "single-photon-counting" airborne laser altimeter that is used to measure land surface features such as topography and vegetation canopy height. This instrument has to date flown a number of times aboard the NASA P3 aircraft acquiring data at a number of sites in the Mid-Atlantic region. This instrument pulses a relatively low-powered laser at a very high rate (10 kHz) and then measures the time-of-flight of discrete returns from the target surface. The instrument then bins these measurements into a two-dimensional array (vertical height vs. horizontal ground track) and selects the most likely signal path through the array. Return data that does not correspond to the selected signal path are classified as noise returns and are then discarded. The MMLA signal extraction algorithm is very compute intensive in that a score must be computed for every possible path through the two dimensional array in order to select the most likely signal path. Given a typical array size with 50 x 6, up to 33 arrays must be processed per second. And for each of these arrays, roughly 12,000 individual paths must be scored. Furthermore, the number of paths increases exponentially with the horizontal size of the array, and linearly with the vertical size. Yet, increasing the horizontal and vertical sizes of the array offer science advantages such as improved range, resolution, and noise rejection. Due to the volume of return data and the compute intensive signal extraction algorithm, the existing PC-based MMLA data system has been unable to perform signal extraction in real-time unless the array is limited in size to one column, This limits the ability of the MMLA to operate in environments with sparse signal returns and a high number of noise return. However, under an IR&D project, an FPGA-based, reconfigurable computing data system has been developed that has been demonstrated to perform real-time signal extraction under realistic operating constraints. This reconfigurable data system is based on the commercially available Firebird Board from Annapolis Microsystems. This PCI board consists of a Xilinx Virtex 2000E FPGA along with 36 MB of SRAM arranged in five separately addressable banks. This board is housed in a rackmount PC with dual 850MHz Pentium processors running the Windows 2000 operating system. This data system performs all signal extraction in hardware on the Firebird, but also runs the existing "software based" signal extraction in tandem for comparison purposes. Using a relatively small amount of the Virtex XCV2000E resources, the reconfigurable data system has demonstrated to improve performance improvement over the existing software based data system by an order of magnitude. Performance could be further improved by employing parallelism. Ground testing and a preliminary engineering test flight aboard the NASA P3 has been performed, during which the reconfigurable data system has been demonstrated to match the results of the existing data system.

Powell, Wesley↗

Evaluation of Advanced Computing Techniques and Technologies: Reconfigurable Computing

The focus of this project was to survey the technology of reconfigurable computing determine its level of maturity and suitability for NASA applications. To better understand and assess the effectiveness of the reconfigurable design paradigm that is utilized within the HAL-15 reconfigurable computer system. This system was made available to NASA MSFC for this purpose, from Star Bridge Systems, Inc. To implement on at least one application that would benefit from the performance levels that are possible with reconfigurable hardware. It was originally proposed that experiments in fault tolerance and dynamically reconfigurability would be perform but time constraints mandated that these be pursued as future research.

Wells, B. Earl↗

Pilots Rate Augmented Generalized Predictive Control for Reconfiguration

The objective of this paper is to report the results from the research being conducted in reconfigurable fight controls at NASA Ames. A study was conducted with three NASA Dryden test pilots to evaluate two approaches of reconfiguring an aircraft's control system when failures occur in the control surfaces and engine. NASA Ames is investigating both a Neural Generalized Predictive Control scheme and a Neural Network based Dynamic Inverse controller. This paper highlights the Predictive Control scheme where a simple augmentation to reduce zero steady-state error led to the neural network predictor model becoming redundant for the task. Instead of using a neural network predictor model, a nominal single point linear model was used and then augmented with an error corrector. This paper shows that the Generalized Predictive Controller and the Dynamic Inverse Neural Network controller perform equally well at reconfiguration, but with less rate requirements from the actuators. Also presented are the pilot ratings for each controller for various failure scenarios and two samples of the required control actuation during reconfiguration. Finally, the paper concludes by stepping through the Generalized Predictive Control's reconfiguration process for an elevator failure.

Soloway, Don↗

Design Tools for Reconfigurable Hardware in Orbit (RHinO)

The Reconfigurable Hardware in Orbit (RHinO) project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. These tools leverage an established FPGA design environment and focus primarily on space effects mitigation and power optimization. The project is creating software to automatically test and evaluate the single-event-upsets (SEUs) sensitivities of an FPGA design and insert mitigation techniques. Extensions into the tool suite will also allow evolvable algorithm techniques to reconfigure around single-event-latchup (SEL) events. In the power domain, tools are being created for dynamic power visualiization and optimization. Thus, this technology seeks to enable the use of Reconfigurable Hardware in Orbit, via an integrated design tool-suite aiming to reduce risk, cost, and design time of multimission reconfigurable space processors using SRAM-based FPGAs.

French, Mathew↗

Reconfigurable Processing Module

To accommodate a wide spectrum of applications and technologies, NASA s Exploration System's Missions Directorate has called for reconfigurable and modular technologies to support future missions to the moon and Mars. In response, Langley Research Center is leading a program entitled Reconfigurable Scaleable Computing (RSC) that is centered on the development of FPGA-based computing resources in a stackable form factor. This paper details the architecture and implementation of the Reconfigurable Processing Module (RPM), which is the key element of the RSC system. The RPM is an FPGA-based, space-qualified printed circuit assembly leveraging terrestrial/commercial design standards into the space applications domain. The form factor is similar to, and backwards compatible with, the PCI-104 standard utilizing only the PCI interface. The size is expanded to accommodate the required functionality while still better than 30% smaller than a 3U CompactPCI(TradeMark)card and without the overhead of the backplane. The architecture is built around two FPGA devices, one hosting PCI and memory interfaces, and another hosting mission application resources; both of which are connected with a high-speed data bus. The PCI interface FPGA provides access via the PCI bus to onboard SDRAM, flash PROM, and the application resources; both configuration management as well as runtime interaction. The reconfigurable FPGA, referred to as the Application FPGA - or simply "the application" - is a radiation-tolerant Xilinx Virtex-4 FX60 hosting custom application specific logic or soft microprocessor IP. The RPM implements various SEE mitigation techniques including TMR, EDAC, and configuration scrubbing of the reconfigurable FPGA. Prototype hardware and formal modeling techniques are used to explore the performability trade space. These models provide a novel way to calculate quality-of-service performance measures while simultaneously considering fault-related behavior due to SEE soft errors.

Somervill, Kevin↗

Diagnosis and Reconfiguration using Bayesian Networks: An Electrical Power System Case Study

Automated diagnosis and reconfiguration are important computational techniques that aim to minimize human intervention in autonomous systems. In this paper, we develop novel techniques and models in the context of diagnosis and reconfiguration reasoning using causal Bayesian networks (BNs). We take as starting point a successful diagnostic approach, using a static BN developed for a real-world electrical power system. We discuss in this paper the extension of this diagnostic approach along two dimensions, namely: (i) from a static BN to a dynamic BN; and (ii) from a diagnostic task to a reconfiguration task. More specifically, we discuss the auto-generation of a dynamic Bayesian network from a static Bayesian network. In addition, we discuss subtle, but important, differences between Bayesian networks when used for diagnosis versus reconfiguration. We discuss a novel reconfiguration agent, which models a system causally, including effects of actions through time, using a dynamic Bayesian network. Though the techniques we discuss are general, we demonstrate them in the context of electrical power systems (EPSs) for aircraft and spacecraft. EPSs are vital subsystems on-board aircraft and spacecraft, and many incidents and accidents of these vehicles have been attributed to EPS failures. We discuss a case study that provides initial but promising results for our approach in the setting of electrical power systems.

Knox, W. Bradley↗

Evolution of a Reconfigurable Processing Platform for a Next Generation Space Software Defined Radio

The National Aeronautics and Space Administration (NASA)Harris Ka-Band Software Defined Radio (SDR) is the first, fully reprogrammable space-qualified SDR operating in the Ka-Band frequency range. Providing exceptionally higher data communication rates than previously possible, this SDR offers in-orbit reconfiguration, multi-waveform operation, and fast deployment due to its highly modular hardware and software architecture. Currently in operation on the International Space Station (ISS), this new paradigm of reconfigurable technology is enabling experimenters to investigate navigation and networking in the space environment.The modular SDR and the NASA developed Space Telecommunications Radio System (STRS) architecture standard are the basis for Harris reusable, digital signal processing space platform trademarked as AppSTAR. As a result, two new space radio products are a synthetic aperture radar payload and an Automatic Detection Surveillance Broadcast (ADS-B) receiver. In addition, Harris is currently developing many new products similar to the Ka-Band software defined radio for other applications. For NASAs next generation flight Ka-Band radio development, leveraging these advancements could lead to a more robust and more capable software defined radio.The space environment has special considerations different from terrestrial applications that must be considered for any system operated in space. Each space mission has unique requirements that can make these systems unique. These unique requirements can make products that are expensive and limited in reuse. Space systems put a premium on size, weight and power. A key trade is the amount of reconfigurability in a space system. The more reconfigurable the hardware platform, the easier it is to adapt to the platform to the next mission, and this reduces the amount of non-recurring engineering costs. However, the more reconfigurable platforms often use more spacecraft resources. Software has similar considerations to hardware. Having an architecture standard promotes reuse of software and firmware. Space platforms have limited processor capability, which makes the trade on the amount of amount of flexibility paramount.

Telecommunication↗

Reconfiguration of power grids during abnormal conditions using reclosers and distributed energy resources

Apparatus and methods are disclosed for restoring operation of a power grid comprising a plurality of reclosers and distributed energy resources (DERs) responsive to abnormal conditions by determining and implementing a reconfiguration for the power grid. The reconfiguration can specify respective new statuses for one or more of the reclosers and/or respective quantities of reactive power to be supplied by one or more of the DERs. The reconfiguration can be determined based on a plurality of constraints using an objective function, the constraints being determined based at least in part on recloser status data and/or DER power generation capability data. Respective cleared quantities of reactive power for the DERs to supply to the reconfigured power grid can be determined via a transactive control scheme, and the reconfiguration can be updated prior to implementation based on the results of the transactive control scheme.

Radhakrishnan, Nikitha↗

Reconfigurable Electrical Networks within a Conductive Hydrogel Composite

Soft materials that exhibit compliance, programmability, and reconfigurability can have a transformative impact as electronic skin for applications in wearable electronics/soft robotics. There has been significant progress in soft conductive materials; however, achieving electrically controlled and reversible changes in conductivity and circuit connectivity remains challenging. To overcome this limitation, a soft material architecture with reconfigurable conductive networks of silver flakes embedded within a hydrogel matrix is presented. The conductive networks can be reversibly created/disconnected through various stimuli, including current, humidity, or temperature. Such stimuli affect electrical connectivity of the hydrogel by controlling its water content, which can be modulated by evaporation under ambient conditions (passive dehydration), evaporation through electrical Joule heating (active dehydration), or absorption of additional water (rehydration). The resulting change in electrical conductivity is reversible and repeatable, endowing the composite with on-demand reconfigurable conductivity. To highlight this material's unique properties, it is shown that conductive traces can be reconfigured after severe damage and revert to lower conductivity after rehydration. Additionally, a quadruped robot is demonstrated that can respond to stimuli by changing direction following exposure to excess water, thereby achieving reprogrammable locomotion behaviors.

36 MATERIALS SCIENCE↗

Networked Microgrid Topology Reconfiguration to Promote Fairness in Proactive Load Shedding

Increasing occurrences of natural disasters and grid emergency events consistently challenge the safe and reliable operations of power systems. During such emergency situations, system operators may proactively shed load to mitigate risks. However, uncoordinated implementation of load shedding may disrupt electricity supply and even lead to cascading failures. Meanwhile, it is crucial to address potential biases affecting different customers when executing load shedding. This paper addresses the dynamic topology reconfiguration problem for networked microgrids with distributed energy resources under emergency conditions. Specifically, we propose a novel rolling-horizon optimization model that integrates fairness-aware constraints into the networked microgrid topology reconfiguration. Unlike existing approaches that focus solely on efficiency or apply fairness considerations in static settings, our method explicitly incorporates temporal fairness constraints to restrict repeated or excessive load curtailment for load blocks. Moreover, the fairness-aware constraints are specifically developed for the context of dynamic networked microgrid topology reconfiguration, and are designed to be convex or amenable to linear reformulations, which offers a more tractable alternative to traditional models with non-convex formulations. Numerical studies on a modified IEEE 13-bus system and a larger-sized SMART-DS networked microgrid system demonstrate the performance of the proposed algorithm towards more fairness-aware networked microgrid topology reconfiguration decision-making.

24 POWER TRANSMISSION AND DISTRIBUTION↗

ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing

The next generation HPC and data centers are likely to be reconfigurable and data-centric due to the trend of hardware specialization and the emergence of data-driven applications. In this work, we propose ARENA – an asynchronous reconfigurable accelerator ring architecture as a potential scenario on how the future HPC and data centers will be like. Despite using the coarse-grained reconfigurable arrays (CGRAs) as the substrate platform, our key contribution is not only the CGRA-cluster design itself, but also the ensemble of a new architecture and programming model that enables asynchronous tasking across a cluster of reconfigurable nodes, so as to bring specialized computation to the data rather than the reverse. We presume distributed data storage without asserting any prior knowledge on the data distribution. Hardware specialization occurs at runtime when a task finds the majority of data it requires are available at the present node. In other words, we dynamically generate specialized CGRA accelerators where the data reside. The asynchronous tasking for bringing computation to data is achieved by circulating the task token, which describes the dataflow graphs to be executed for a task, among the CGRA cluster connected by a fast ring network. Evaluations on a set of HPC and data-driven applications across different domains show that ARENA can provide better parallel scalability with reduced data movement (53.9 percent). Compared with contemporary compute-centric parallel models, ARENA can bring on average 4.37× speedup. The synthesized CGRAs and their task-dispatchers only occupy 2.93mm 2 chip area under 45nm process technology and can run at 800MHz with on average 759.8mW power consumption. ARENA also supports the concurrent execution of multi-applications, offering ideal architectural support for future high-performance parallel computing and data analytics systems.

97 MATHEMATICS AND COMPUTING↗

Temperature-Adaptive Circuits on Reconfigurable Analog Arrays

Demonstration of a self-reconfigurable Integrated Circuit (IC) that would operate under extreme temperature (-180 C and 120 C) and radiation (300krad), without the protection of thermal controls and radiation shields. Self-Reconfigurable Electronics platform: a) Evolutionary Processor (EP) to run reconfiguration mechanism; b) Reconfigurable chip (FPGA, FPAA, etc).

self-recovery↗